staging: comedi: ni_mio_common: remove forward declaration 24
Move some functions to remove the need for the remaining forward declarations. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten
Greg Kroah-Hartman
parent
624b161f7e
commit
2ffb247691
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@ -194,13 +194,6 @@ static const struct comedi_lrange *const ni_range_lkup[] = {
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[ai_gain_6143] = &range_bipolar5
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};
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#ifndef PCIDMA
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static void ni_handle_fifo_half_full(struct comedi_device *dev);
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static int ni_ao_fifo_half_empty(struct comedi_device *dev,
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struct comedi_subdevice *s);
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#endif
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static void ni_handle_fifo_dregs(struct comedi_device *dev);
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enum aimodes {
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AIMODE_NONE = 0,
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AIMODE_HALF_FULL = 1,
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@ -771,6 +764,259 @@ static int ni_ao_wait_for_dma_load(struct comedi_device *dev)
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}
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#endif /* PCIDMA */
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#ifndef PCIDMA
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static void ni_ao_fifo_load(struct comedi_device *dev,
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struct comedi_subdevice *s, int n)
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{
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const struct ni_board_struct *board = comedi_board(dev);
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struct comedi_async *async = s->async;
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struct comedi_cmd *cmd = &async->cmd;
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int chan;
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int i;
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unsigned short d;
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u32 packed_data;
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int range;
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int err = 1;
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chan = async->cur_chan;
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for (i = 0; i < n; i++) {
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err &= comedi_buf_get(s, &d);
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if (err == 0)
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break;
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range = CR_RANGE(cmd->chanlist[chan]);
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if (board->reg_type & ni_reg_6xxx_mask) {
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packed_data = d & 0xffff;
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/* 6711 only has 16 bit wide ao fifo */
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if (board->reg_type != ni_reg_6711) {
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err &= comedi_buf_get(s, &d);
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if (err == 0)
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break;
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chan++;
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i++;
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packed_data |= (d << 16) & 0xffff0000;
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}
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ni_writel(packed_data, DAC_FIFO_Data_611x);
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} else {
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ni_writew(d, DAC_FIFO_Data);
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}
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chan++;
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chan %= cmd->chanlist_len;
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}
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async->cur_chan = chan;
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if (err == 0)
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async->events |= COMEDI_CB_OVERFLOW;
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}
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/*
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* There's a small problem if the FIFO gets really low and we
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* don't have the data to fill it. Basically, if after we fill
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* the FIFO with all the data available, the FIFO is _still_
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* less than half full, we never clear the interrupt. If the
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* IRQ is in edge mode, we never get another interrupt, because
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* this one wasn't cleared. If in level mode, we get flooded
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* with interrupts that we can't fulfill, because nothing ever
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* gets put into the buffer.
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*
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* This kind of situation is recoverable, but it is easier to
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* just pretend we had a FIFO underrun, since there is a good
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* chance it will happen anyway. This is _not_ the case for
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* RT code, as RT code might purposely be running close to the
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* metal. Needs to be fixed eventually.
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*/
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static int ni_ao_fifo_half_empty(struct comedi_device *dev,
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struct comedi_subdevice *s)
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{
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const struct ni_board_struct *board = comedi_board(dev);
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int n;
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n = comedi_buf_read_n_available(s);
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if (n == 0) {
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s->async->events |= COMEDI_CB_OVERFLOW;
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return 0;
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}
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n /= sizeof(short);
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if (n > board->ao_fifo_depth / 2)
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n = board->ao_fifo_depth / 2;
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ni_ao_fifo_load(dev, s, n);
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s->async->events |= COMEDI_CB_BLOCK;
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return 1;
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}
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static int ni_ao_prep_fifo(struct comedi_device *dev,
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struct comedi_subdevice *s)
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{
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const struct ni_board_struct *board = comedi_board(dev);
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struct ni_private *devpriv = dev->private;
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int n;
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/* reset fifo */
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devpriv->stc_writew(dev, 1, DAC_FIFO_Clear);
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if (board->reg_type & ni_reg_6xxx_mask)
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ni_ao_win_outl(dev, 0x6, AO_FIFO_Offset_Load_611x);
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/* load some data */
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n = comedi_buf_read_n_available(s);
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if (n == 0)
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return 0;
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n /= sizeof(short);
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if (n > board->ao_fifo_depth)
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n = board->ao_fifo_depth;
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ni_ao_fifo_load(dev, s, n);
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return n;
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}
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static void ni_ai_fifo_read(struct comedi_device *dev,
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struct comedi_subdevice *s, int n)
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{
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const struct ni_board_struct *board = comedi_board(dev);
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struct ni_private *devpriv = dev->private;
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struct comedi_async *async = s->async;
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int i;
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if (board->reg_type == ni_reg_611x) {
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unsigned short data[2];
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u32 dl;
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for (i = 0; i < n / 2; i++) {
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dl = ni_readl(ADC_FIFO_Data_611x);
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/* This may get the hi/lo data in the wrong order */
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data[0] = (dl >> 16) & 0xffff;
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data[1] = dl & 0xffff;
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cfc_write_array_to_buffer(s, data, sizeof(data));
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}
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/* Check if there's a single sample stuck in the FIFO */
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if (n % 2) {
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dl = ni_readl(ADC_FIFO_Data_611x);
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data[0] = dl & 0xffff;
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cfc_write_to_buffer(s, data[0]);
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}
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} else if (board->reg_type == ni_reg_6143) {
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unsigned short data[2];
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u32 dl;
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/* This just reads the FIFO assuming the data is present, no checks on the FIFO status are performed */
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for (i = 0; i < n / 2; i++) {
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dl = ni_readl(AIFIFO_Data_6143);
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data[0] = (dl >> 16) & 0xffff;
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data[1] = dl & 0xffff;
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cfc_write_array_to_buffer(s, data, sizeof(data));
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}
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if (n % 2) {
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/* Assume there is a single sample stuck in the FIFO */
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ni_writel(0x01, AIFIFO_Control_6143); /* Get stranded sample into FIFO */
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dl = ni_readl(AIFIFO_Data_6143);
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data[0] = (dl >> 16) & 0xffff;
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cfc_write_to_buffer(s, data[0]);
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}
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} else {
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if (n > sizeof(devpriv->ai_fifo_buffer) /
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sizeof(devpriv->ai_fifo_buffer[0])) {
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comedi_error(dev, "bug! ai_fifo_buffer too small");
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async->events |= COMEDI_CB_ERROR;
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return;
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}
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for (i = 0; i < n; i++) {
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devpriv->ai_fifo_buffer[i] =
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ni_readw(ADC_FIFO_Data_Register);
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}
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cfc_write_array_to_buffer(s, devpriv->ai_fifo_buffer,
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n *
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sizeof(devpriv->ai_fifo_buffer[0]));
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}
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}
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static void ni_handle_fifo_half_full(struct comedi_device *dev)
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{
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const struct ni_board_struct *board = comedi_board(dev);
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struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
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int n;
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n = board->ai_fifo_depth / 2;
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ni_ai_fifo_read(dev, s, n);
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}
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#endif
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/*
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Empties the AI fifo
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*/
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static void ni_handle_fifo_dregs(struct comedi_device *dev)
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{
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const struct ni_board_struct *board = comedi_board(dev);
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struct ni_private *devpriv = dev->private;
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struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
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unsigned short data[2];
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u32 dl;
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unsigned short fifo_empty;
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int i;
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if (board->reg_type == ni_reg_611x) {
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while ((devpriv->stc_readw(dev,
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AI_Status_1_Register) &
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AI_FIFO_Empty_St) == 0) {
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dl = ni_readl(ADC_FIFO_Data_611x);
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/* This may get the hi/lo data in the wrong order */
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data[0] = (dl >> 16);
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data[1] = (dl & 0xffff);
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cfc_write_array_to_buffer(s, data, sizeof(data));
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}
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} else if (board->reg_type == ni_reg_6143) {
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i = 0;
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while (ni_readl(AIFIFO_Status_6143) & 0x04) {
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dl = ni_readl(AIFIFO_Data_6143);
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/* This may get the hi/lo data in the wrong order */
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data[0] = (dl >> 16);
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data[1] = (dl & 0xffff);
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cfc_write_array_to_buffer(s, data, sizeof(data));
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i += 2;
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}
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/* Check if stranded sample is present */
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if (ni_readl(AIFIFO_Status_6143) & 0x01) {
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ni_writel(0x01, AIFIFO_Control_6143); /* Get stranded sample into FIFO */
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dl = ni_readl(AIFIFO_Data_6143);
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data[0] = (dl >> 16) & 0xffff;
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cfc_write_to_buffer(s, data[0]);
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}
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} else {
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fifo_empty =
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devpriv->stc_readw(dev,
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AI_Status_1_Register) & AI_FIFO_Empty_St;
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while (fifo_empty == 0) {
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for (i = 0;
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i <
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sizeof(devpriv->ai_fifo_buffer) /
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sizeof(devpriv->ai_fifo_buffer[0]); i++) {
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fifo_empty =
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devpriv->stc_readw(dev,
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AI_Status_1_Register) &
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AI_FIFO_Empty_St;
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if (fifo_empty)
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break;
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devpriv->ai_fifo_buffer[i] =
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ni_readw(ADC_FIFO_Data_Register);
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}
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cfc_write_array_to_buffer(s, devpriv->ai_fifo_buffer,
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i *
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sizeof(devpriv->
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ai_fifo_buffer[0]));
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}
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}
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}
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static void get_last_sample_611x(struct comedi_device *dev)
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{
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const struct ni_board_struct *board = comedi_board(dev);
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@ -1040,259 +1286,6 @@ static void handle_b_interrupt(struct comedi_device *dev,
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cfc_handle_events(dev, s);
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}
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#ifndef PCIDMA
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static void ni_ao_fifo_load(struct comedi_device *dev,
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struct comedi_subdevice *s, int n)
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{
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const struct ni_board_struct *board = comedi_board(dev);
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struct comedi_async *async = s->async;
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struct comedi_cmd *cmd = &async->cmd;
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int chan;
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int i;
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unsigned short d;
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u32 packed_data;
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int range;
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int err = 1;
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chan = async->cur_chan;
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for (i = 0; i < n; i++) {
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err &= comedi_buf_get(s, &d);
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if (err == 0)
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break;
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range = CR_RANGE(cmd->chanlist[chan]);
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if (board->reg_type & ni_reg_6xxx_mask) {
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packed_data = d & 0xffff;
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/* 6711 only has 16 bit wide ao fifo */
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if (board->reg_type != ni_reg_6711) {
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err &= comedi_buf_get(s, &d);
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if (err == 0)
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break;
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chan++;
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i++;
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packed_data |= (d << 16) & 0xffff0000;
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}
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ni_writel(packed_data, DAC_FIFO_Data_611x);
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} else {
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ni_writew(d, DAC_FIFO_Data);
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}
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chan++;
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chan %= cmd->chanlist_len;
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}
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async->cur_chan = chan;
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if (err == 0)
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async->events |= COMEDI_CB_OVERFLOW;
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}
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/*
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* There's a small problem if the FIFO gets really low and we
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* don't have the data to fill it. Basically, if after we fill
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* the FIFO with all the data available, the FIFO is _still_
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* less than half full, we never clear the interrupt. If the
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* IRQ is in edge mode, we never get another interrupt, because
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* this one wasn't cleared. If in level mode, we get flooded
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* with interrupts that we can't fulfill, because nothing ever
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* gets put into the buffer.
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*
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* This kind of situation is recoverable, but it is easier to
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* just pretend we had a FIFO underrun, since there is a good
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* chance it will happen anyway. This is _not_ the case for
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* RT code, as RT code might purposely be running close to the
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* metal. Needs to be fixed eventually.
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*/
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static int ni_ao_fifo_half_empty(struct comedi_device *dev,
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struct comedi_subdevice *s)
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{
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const struct ni_board_struct *board = comedi_board(dev);
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int n;
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n = comedi_buf_read_n_available(s);
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if (n == 0) {
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s->async->events |= COMEDI_CB_OVERFLOW;
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return 0;
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}
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n /= sizeof(short);
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if (n > board->ao_fifo_depth / 2)
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n = board->ao_fifo_depth / 2;
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ni_ao_fifo_load(dev, s, n);
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s->async->events |= COMEDI_CB_BLOCK;
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return 1;
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}
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static int ni_ao_prep_fifo(struct comedi_device *dev,
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struct comedi_subdevice *s)
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{
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const struct ni_board_struct *board = comedi_board(dev);
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struct ni_private *devpriv = dev->private;
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int n;
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/* reset fifo */
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devpriv->stc_writew(dev, 1, DAC_FIFO_Clear);
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if (board->reg_type & ni_reg_6xxx_mask)
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ni_ao_win_outl(dev, 0x6, AO_FIFO_Offset_Load_611x);
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/* load some data */
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n = comedi_buf_read_n_available(s);
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if (n == 0)
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return 0;
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n /= sizeof(short);
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if (n > board->ao_fifo_depth)
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n = board->ao_fifo_depth;
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ni_ao_fifo_load(dev, s, n);
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return n;
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}
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static void ni_ai_fifo_read(struct comedi_device *dev,
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struct comedi_subdevice *s, int n)
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{
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const struct ni_board_struct *board = comedi_board(dev);
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struct ni_private *devpriv = dev->private;
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struct comedi_async *async = s->async;
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int i;
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if (board->reg_type == ni_reg_611x) {
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unsigned short data[2];
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u32 dl;
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for (i = 0; i < n / 2; i++) {
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dl = ni_readl(ADC_FIFO_Data_611x);
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/* This may get the hi/lo data in the wrong order */
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data[0] = (dl >> 16) & 0xffff;
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data[1] = dl & 0xffff;
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cfc_write_array_to_buffer(s, data, sizeof(data));
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}
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/* Check if there's a single sample stuck in the FIFO */
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if (n % 2) {
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dl = ni_readl(ADC_FIFO_Data_611x);
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data[0] = dl & 0xffff;
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cfc_write_to_buffer(s, data[0]);
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}
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} else if (board->reg_type == ni_reg_6143) {
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unsigned short data[2];
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u32 dl;
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/* This just reads the FIFO assuming the data is present, no checks on the FIFO status are performed */
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for (i = 0; i < n / 2; i++) {
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dl = ni_readl(AIFIFO_Data_6143);
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data[0] = (dl >> 16) & 0xffff;
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data[1] = dl & 0xffff;
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cfc_write_array_to_buffer(s, data, sizeof(data));
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}
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if (n % 2) {
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/* Assume there is a single sample stuck in the FIFO */
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ni_writel(0x01, AIFIFO_Control_6143); /* Get stranded sample into FIFO */
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dl = ni_readl(AIFIFO_Data_6143);
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data[0] = (dl >> 16) & 0xffff;
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cfc_write_to_buffer(s, data[0]);
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}
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} else {
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if (n > sizeof(devpriv->ai_fifo_buffer) /
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sizeof(devpriv->ai_fifo_buffer[0])) {
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comedi_error(dev, "bug! ai_fifo_buffer too small");
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async->events |= COMEDI_CB_ERROR;
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return;
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}
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for (i = 0; i < n; i++) {
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devpriv->ai_fifo_buffer[i] =
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ni_readw(ADC_FIFO_Data_Register);
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}
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cfc_write_array_to_buffer(s, devpriv->ai_fifo_buffer,
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n *
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sizeof(devpriv->ai_fifo_buffer[0]));
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}
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}
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static void ni_handle_fifo_half_full(struct comedi_device *dev)
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{
|
||||
const struct ni_board_struct *board = comedi_board(dev);
|
||||
struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
|
||||
int n;
|
||||
|
||||
n = board->ai_fifo_depth / 2;
|
||||
|
||||
ni_ai_fifo_read(dev, s, n);
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
Empties the AI fifo
|
||||
*/
|
||||
static void ni_handle_fifo_dregs(struct comedi_device *dev)
|
||||
{
|
||||
const struct ni_board_struct *board = comedi_board(dev);
|
||||
struct ni_private *devpriv = dev->private;
|
||||
struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
|
||||
unsigned short data[2];
|
||||
u32 dl;
|
||||
unsigned short fifo_empty;
|
||||
int i;
|
||||
|
||||
if (board->reg_type == ni_reg_611x) {
|
||||
while ((devpriv->stc_readw(dev,
|
||||
AI_Status_1_Register) &
|
||||
AI_FIFO_Empty_St) == 0) {
|
||||
dl = ni_readl(ADC_FIFO_Data_611x);
|
||||
|
||||
/* This may get the hi/lo data in the wrong order */
|
||||
data[0] = (dl >> 16);
|
||||
data[1] = (dl & 0xffff);
|
||||
cfc_write_array_to_buffer(s, data, sizeof(data));
|
||||
}
|
||||
} else if (board->reg_type == ni_reg_6143) {
|
||||
i = 0;
|
||||
while (ni_readl(AIFIFO_Status_6143) & 0x04) {
|
||||
dl = ni_readl(AIFIFO_Data_6143);
|
||||
|
||||
/* This may get the hi/lo data in the wrong order */
|
||||
data[0] = (dl >> 16);
|
||||
data[1] = (dl & 0xffff);
|
||||
cfc_write_array_to_buffer(s, data, sizeof(data));
|
||||
i += 2;
|
||||
}
|
||||
/* Check if stranded sample is present */
|
||||
if (ni_readl(AIFIFO_Status_6143) & 0x01) {
|
||||
ni_writel(0x01, AIFIFO_Control_6143); /* Get stranded sample into FIFO */
|
||||
dl = ni_readl(AIFIFO_Data_6143);
|
||||
data[0] = (dl >> 16) & 0xffff;
|
||||
cfc_write_to_buffer(s, data[0]);
|
||||
}
|
||||
|
||||
} else {
|
||||
fifo_empty =
|
||||
devpriv->stc_readw(dev,
|
||||
AI_Status_1_Register) & AI_FIFO_Empty_St;
|
||||
while (fifo_empty == 0) {
|
||||
for (i = 0;
|
||||
i <
|
||||
sizeof(devpriv->ai_fifo_buffer) /
|
||||
sizeof(devpriv->ai_fifo_buffer[0]); i++) {
|
||||
fifo_empty =
|
||||
devpriv->stc_readw(dev,
|
||||
AI_Status_1_Register) &
|
||||
AI_FIFO_Empty_St;
|
||||
if (fifo_empty)
|
||||
break;
|
||||
devpriv->ai_fifo_buffer[i] =
|
||||
ni_readw(ADC_FIFO_Data_Register);
|
||||
}
|
||||
cfc_write_array_to_buffer(s, devpriv->ai_fifo_buffer,
|
||||
i *
|
||||
sizeof(devpriv->
|
||||
ai_fifo_buffer[0]));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void ni_ai_munge(struct comedi_device *dev, struct comedi_subdevice *s,
|
||||
void *data, unsigned int num_bytes,
|
||||
unsigned int chan_index)
|
||||
|
|
|
|||
Loading…
Reference in New Issue