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perf: arm_cspmu: Split 64-bit write to 32-bit writes 

commit 8c282414ca6209977cb6d6cc66470ca2d1e56bf6 upstream.

Split the 64-bit register accesses if 64-bit access is not supported
by the PMU.

Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
Reviewed-by: Besar Wicaksono <bwicaksono@nvidia.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230913233941.9814-2-ilkka@os.amperecomputing.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Huang Cun <cunhuang@tencent.com>
This commit is contained in:
Ilkka Koskinen 2023-09-13 16:39:38 -07:00 committed by Huang Cun
parent 8365e42c05
commit 2fddeaf9e6
1 changed files with 4 additions and 1 deletions
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5
drivers/perf/arm_cspmu/arm_cspmu.c
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@ -722,7 +722,10 @@ static void arm_cspmu_write_counter(struct perf_event *event, u64 val)
if (use_64b_counter_reg(cspmu)) {
offset = counter_offset(sizeof(u64), event->hw.idx);
writeq(val, cspmu->base1 + offset);
if (cspmu->has_atomic_dword)
writeq(val, cspmu->base1 + offset);
else
lo_hi_writeq(val, cspmu->base1 + offset);
} else {
offset = counter_offset(sizeof(u32), event->hw.idx);