Renesas ARM r8a7779 SoC update for v3.10
Update to the r8a7779 SoC: * Add SH Ethernet support * Add comment describing clock ratios This pull request is based on: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJRXjspAAoJENfPZGlqN0++hK8P/1IPQUnrKWrySDJmDjgMVd6P yayOvZ5OAAHuhzvON+gkIk1VZ2Ic6fLcE0rPwTU+2WWjRfQ7Be7TRED73Ukl+/oN AOsUkOuuxILit/XQ+6LnMqFJMCz18Y6ZIQc9qgselMUVplNcYsDeHC1sawS9mBdi B13WPQU2mEEWhso7JLgNiIdLauf74N74hnzRDK6Xml7dOTgUBnH6QEOL7gud4jqP ymaauSfdkI58/swZY4DtIbnnchiVmrg4doTa1tdpaCQORYACTD1ahJaEfBxuScjy WK1O8XBDzYPVYhcVMXzu/PSKTkHtb+SJWVz81OthhNX4PFzk9bQuVXWqWz9kEiEY PFFRuPM8SMLFajtjsDVfj2EWUhbRagoAAIHKfL+yaDUXFGWwwOrRuoHKHtegx53o ArMwkYTDcD3UfHZhlVabtvG2Y/DabowYStamZjjtDP9pFERIvhXcZVaw8kcNZxpC ysj6bsA4lazoIa2v0g68TJSjxPPhzCgjJB+VcTE8Coe+voyP27CQwbMelFzyDl/z Grfi13UCly29MtqLH85txD3J4k40OCrKinnrblxk6RQBVRkHezMT5YLIVrdSu4FI oub/dsZi2scCHRb/5vS4/4sQIcoknDhE/0s5d1V51N6cu2AxspBRI/kbziDhQa9j X1jSjcp+/sbOkHq9y85H =YyOX -----END PGP SIGNATURE----- Merge tag 'renesas-soc-r8a7779-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2 From Simon Horman <horms+renesas@verge.net.au>: Renesas ARM r8a7779 SoC update for v3.10 Update to the r8a7779 SoC: * Add SH Ethernet support * Add comment describing clock ratios This pull request is based on: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10 * tag 'renesas-soc-r8a7779-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: R8A7779: add Ether support ARM: shmobile: r8a7779: add each clocks ratio on comment area Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
2fce7e1106
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@ -26,6 +26,25 @@
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#include <mach/clock.h>
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#include <mach/common.h>
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/*
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* MD1 = 1 MD1 = 0
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* (PLLA = 1500) (PLLA = 1600)
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* (MHz) (MHz)
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*------------------------------------------------+--------------------
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* clkz 1000 (2/3) 800 (1/2)
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* clkzs 250 (1/6) 200 (1/8)
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* clki 750 (1/2) 800 (1/2)
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* clks 250 (1/6) 200 (1/8)
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* clks1 125 (1/12) 100 (1/16)
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* clks3 187.5 (1/8) 200 (1/8)
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* clks4 93.7 (1/16) 100 (1/16)
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* clkp 62.5 (1/24) 50 (1/32)
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* clkg 62.5 (1/24) 66.6 (1/24)
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* clkb, CLKOUT
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* (MD2 = 0) 62.5 (1/24) 66.6 (1/24)
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* (MD2 = 1) 41.6 (1/36) 50 (1/32)
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*/
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#define MD(nr) BIT(nr)
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#define FRQMR IOMEM(0xffc80014)
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@ -93,7 +112,7 @@ static struct clk *main_clks[] = {
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};
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enum { MSTP323, MSTP322, MSTP321, MSTP320,
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MSTP115,
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MSTP115, MSTP114,
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MSTP103, MSTP101, MSTP100,
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MSTP030,
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MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
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@ -107,6 +126,7 @@ static struct clk mstp_clks[MSTP_NR] = {
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[MSTP321] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 21, 0), /* SDHI2 */
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[MSTP320] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 20, 0), /* SDHI3 */
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[MSTP115] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 15, 0), /* SATA */
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[MSTP114] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 14, 0), /* Ether */
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[MSTP103] = SH_CLK_MSTP32(&clks_clk, MSTPCR1, 3, 0), /* DU */
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[MSTP101] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 1, 0), /* USB2 */
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[MSTP100] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 0, 0), /* USB0/1 */
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@ -143,6 +163,7 @@ static struct clk_lookup lookups[] = {
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/* MSTP32 clocks */
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CLKDEV_DEV_ID("sata_rcar", &mstp_clks[MSTP115]), /* SATA */
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CLKDEV_DEV_ID("fc600000.sata", &mstp_clks[MSTP115]), /* SATA w/DT */
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CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */
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CLKDEV_DEV_ID("ehci-platform.1", &mstp_clks[MSTP101]), /* USB EHCI port2 */
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CLKDEV_DEV_ID("ohci-platform.1", &mstp_clks[MSTP101]), /* USB OHCI port2 */
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CLKDEV_DEV_ID("ehci-platform.0", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
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@ -3,6 +3,7 @@
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#include <linux/sh_clk.h>
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#include <linux/pm_domain.h>
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#include <linux/sh_eth.h>
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struct platform_device;
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@ -31,6 +32,7 @@ extern void r8a7779_earlytimer_init(void);
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extern void r8a7779_add_early_devices(void);
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extern void r8a7779_add_standard_devices(void);
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extern void r8a7779_add_standard_devices_dt(void);
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extern void r8a7779_add_ether_device(struct sh_eth_plat_data *pdata);
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extern void r8a7779_clock_init(void);
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extern void r8a7779_pinmux_init(void);
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extern void r8a7779_pm_init(void);
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@ -1,8 +1,9 @@
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/*
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* r8a7779 processor support
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*
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* Copyright (C) 2011 Renesas Solutions Corp.
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* Copyright (C) 2011, 2013 Renesas Solutions Corp.
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* Copyright (C) 2011 Magnus Damm
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* Copyright (C) 2013 Cogent Embedded, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -393,6 +394,18 @@ static struct platform_device sata_device = {
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},
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};
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/* Ether */
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static struct resource ether_resources[] = {
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{
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.start = 0xfde00000,
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.end = 0xfde003ff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = gic_iid(0xb4),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device *r8a7779_devices_dt[] __initdata = {
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&scif0_device,
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&scif1_device,
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@ -428,6 +441,14 @@ void __init r8a7779_add_standard_devices(void)
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ARRAY_SIZE(r8a7779_late_devices));
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}
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void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
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{
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platform_device_register_resndata(&platform_bus, "sh_eth", -1,
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ether_resources,
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ARRAY_SIZE(ether_resources),
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pdata, sizeof(*pdata));
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}
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/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
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void __init __weak r8a7779_register_twd(void) { }
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