spi: rockchip: clear interrupt status in error handler

The interrupt status bit of the previous error data transmition will
affect the next operation and cause continuous SPI transmission failure.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20220216014028.8123-7-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jon Lin 2022-02-16 09:40:28 +08:00 committed by Mark Brown
parent e882575efc
commit 2fcdde56c4
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1 changed files with 2 additions and 1 deletions

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@ -278,8 +278,9 @@ static void rockchip_spi_handle_err(struct spi_controller *ctlr,
*/ */
spi_enable_chip(rs, false); spi_enable_chip(rs, false);
/* make sure all interrupts are masked */ /* make sure all interrupts are masked and status cleared */
writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR);
writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR);
if (atomic_read(&rs->state) & TXDMA) if (atomic_read(&rs->state) & TXDMA)
dmaengine_terminate_async(ctlr->dma_tx); dmaengine_terminate_async(ctlr->dma_tx);