spi: rockchip: clear interrupt status in error handler
The interrupt status bit of the previous error data transmition will affect the next operation and cause continuous SPI transmission failure. Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20220216014028.8123-7-jon.lin@rock-chips.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -278,8 +278,9 @@ static void rockchip_spi_handle_err(struct spi_controller *ctlr,
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*/
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*/
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spi_enable_chip(rs, false);
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spi_enable_chip(rs, false);
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/* make sure all interrupts are masked */
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/* make sure all interrupts are masked and status cleared */
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writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR);
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writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR);
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writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR);
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if (atomic_read(&rs->state) & TXDMA)
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if (atomic_read(&rs->state) & TXDMA)
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dmaengine_terminate_async(ctlr->dma_tx);
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dmaengine_terminate_async(ctlr->dma_tx);
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