drm/nouveau/gr/gf117-: assume no PPC if NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK is zero
fdo#92761 Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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ccb7b6ba07
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2fb2b3c6e4
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@ -207,6 +207,8 @@ gf117_grctx_generate_attrib(struct gf100_grctx *info)
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const u32 b = beta * gr->ppc_tpc_nr[gpc][ppc];
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const u32 b = beta * gr->ppc_tpc_nr[gpc][ppc];
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const u32 t = timeslice_mode;
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const u32 t = timeslice_mode;
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const u32 o = PPC_UNIT(gpc, ppc, 0);
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const u32 o = PPC_UNIT(gpc, ppc, 0);
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if (!(gr->ppc_mask[gpc] & (1 << ppc)))
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continue;
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mmio_skip(info, o + 0xc0, (t << 28) | (b << 16) | ++bo);
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mmio_skip(info, o + 0xc0, (t << 28) | (b << 16) | ++bo);
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mmio_wr32(info, o + 0xc0, (t << 28) | (b << 16) | --bo);
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mmio_wr32(info, o + 0xc0, (t << 28) | (b << 16) | --bo);
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bo += grctx->attrib_nr_max * gr->ppc_tpc_nr[gpc][ppc];
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bo += grctx->attrib_nr_max * gr->ppc_tpc_nr[gpc][ppc];
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@ -1530,6 +1530,8 @@ gf100_gr_oneinit(struct nvkm_gr *base)
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gr->ppc_nr[i] = gr->func->ppc_nr;
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gr->ppc_nr[i] = gr->func->ppc_nr;
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for (j = 0; j < gr->ppc_nr[i]; j++) {
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for (j = 0; j < gr->ppc_nr[i]; j++) {
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u8 mask = nvkm_rd32(device, GPC_UNIT(i, 0x0c30 + (j * 4)));
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u8 mask = nvkm_rd32(device, GPC_UNIT(i, 0x0c30 + (j * 4)));
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if (mask)
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gr->ppc_mask[i] |= (1 << j);
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gr->ppc_tpc_nr[i][j] = hweight8(mask);
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gr->ppc_tpc_nr[i][j] = hweight8(mask);
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}
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}
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}
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}
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@ -97,6 +97,7 @@ struct gf100_gr {
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u8 tpc_nr[GPC_MAX];
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u8 tpc_nr[GPC_MAX];
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u8 tpc_total;
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u8 tpc_total;
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u8 ppc_nr[GPC_MAX];
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u8 ppc_nr[GPC_MAX];
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u8 ppc_mask[GPC_MAX];
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u8 ppc_tpc_nr[GPC_MAX][4];
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u8 ppc_tpc_nr[GPC_MAX][4];
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struct nvkm_memory *unk4188b4;
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struct nvkm_memory *unk4188b4;
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