ALSA: hda: Add support of Zhaoxin NB HDAC

zhaoxin inclusion
category: feature

-------------------

Add the new PCI ID 0x1d17 0x9141/0x9142/0x9144 Zhaoxin NB HDAC
support. And add some special initialization for Zhaoxin NB HDAC.

Signed-off-by: LeoLiu-oc <leoliu-oc@zhaoxin.com>
This commit is contained in:
LeoLiu-oc 2024-10-21 13:54:13 +08:00
parent 67bfb6833c
commit 2fa2a551f9
3 changed files with 85 additions and 2 deletions

View File

@ -1104,6 +1104,16 @@ void azx_stop_chip(struct azx *chip)
}
EXPORT_SYMBOL_GPL(azx_stop_chip);
static void azx_rirb_zxdelay(struct azx *chip, int enable)
{
if (chip->remap_diu_addr) {
if (!enable)
writel(0x0, (char *)chip->remap_diu_addr + 0x490a8);
else
writel(0x1000000, (char *)chip->remap_diu_addr + 0x490a8);
}
}
/*
* interrupt handler
*/
@ -1163,9 +1173,14 @@ irqreturn_t azx_interrupt(int irq, void *dev_id)
azx_writeb(chip, RIRBSTS, RIRB_INT_MASK);
active = true;
if (status & RIRB_INT_RESPONSE) {
if (chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND)
if ((chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND) ||
(chip->driver_caps & AZX_DCAPS_RIRB_PRE_DELAY)) {
azx_rirb_zxdelay(chip, 1);
udelay(80);
}
snd_hdac_bus_update_rirb(bus);
if (chip->driver_caps & AZX_DCAPS_RIRB_PRE_DELAY)
azx_rirb_zxdelay(chip, 0);
}
}
} while (active && ++repeat < 10);

View File

@ -45,6 +45,7 @@
#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */
#define AZX_DCAPS_NO_MSI64 (1 << 29) /* Stick to 32-bit MSIs */
#define AZX_DCAPS_SEPARATE_STREAM_TAG (1 << 30) /* capture and playback use separate stream tag */
#define AZX_DCAPS_RIRB_PRE_DELAY (1 << 31) /* Put a delay before read */
enum {
AZX_SNOOP_TYPE_NONE,
@ -147,6 +148,7 @@ struct azx {
/* GTS present */
unsigned int gts_present:1;
void __iomem *remap_diu_addr;
#ifdef CONFIG_SND_HDA_DSP_LOADER
struct azx_dev saved_azx_dev;

View File

@ -239,7 +239,8 @@ MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
"{VIA, VT8237A},"
"{SiS, SIS966},"
"{ULI, M5461},"
"{ZX, ZhaoxinHDA}}");
"{ZX, ZhaoxinHDA},"
"{ZX, ZhaoxinHDMI}}");
MODULE_DESCRIPTION("Intel HDA driver");
#if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
@ -271,6 +272,7 @@ enum {
AZX_DRIVER_CTHDA,
AZX_DRIVER_CMEDIA,
AZX_DRIVER_ZHAOXIN,
AZX_DRIVER_ZXHDMI,
AZX_DRIVER_GENERIC,
AZX_NUM_DRIVERS, /* keep this as last entry */
};
@ -396,6 +398,7 @@ static char *driver_short_names[] = {
[AZX_DRIVER_CTHDA] = "HDA Creative",
[AZX_DRIVER_CMEDIA] = "HDA C-Media",
[AZX_DRIVER_ZHAOXIN] = "HDA Zhaoxin",
[AZX_DRIVER_ZXHDMI] = "HDA GFX",
[AZX_DRIVER_GENERIC] = "HD-Audio Generic",
};
@ -417,6 +420,32 @@ static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
pci_write_config_byte(pci, reg, data);
}
static int azx_init_chip_zx(struct azx *chip)
{
struct snd_card *card = chip->card;
unsigned int diu_reg;
struct pci_dev *diu_pci = NULL;
azx_bus(chip)->polling_mode = 1;
diu_pci = pci_get_device(0x1d17, 0x3a03, NULL);
if (!diu_pci) {
dev_err(card->dev, "hda no KX-5000 device.\n");
return -ENXIO;
}
pci_read_config_dword(diu_pci, PCI_BASE_ADDRESS_0, &diu_reg);
chip->remap_diu_addr = ioremap_nocache(diu_reg, 0x50000);
dev_info(card->dev, "hda %x %p\n", diu_reg, chip->remap_diu_addr);
pci_dev_put(diu_pci);
return 0;
}
static void azx_free_chip_zx(struct azx *chip)
{
if (chip->remap_diu_addr)
iounmap(chip->remap_diu_addr);
}
static void azx_init_pci(struct azx *chip)
{
int snoop_type = azx_get_snoop_type(chip);
@ -1408,6 +1437,9 @@ static void azx_free(struct azx *chip)
hda->init_failed = 1; /* to be sure */
complete_all(&hda->probe_wait);
if (chip->driver_type == AZX_DRIVER_ZXHDMI)
azx_free_chip_zx(chip);
if (use_vga_switcheroo(hda)) {
if (chip->disabled && hda->probe_continued)
snd_hda_unlock_devices(&chip->bus);
@ -1747,6 +1779,8 @@ static int default_bdl_pos_adj(struct azx *chip)
case AZX_DRIVER_ICH:
case AZX_DRIVER_PCH:
return 1;
case AZX_DRIVER_ZXHDMI:
return 128;
default:
return 32;
}
@ -1868,6 +1902,11 @@ static int azx_first_init(struct azx *chip)
}
#endif
chip->remap_diu_addr = NULL;
if (chip->driver_type == AZX_DRIVER_ZXHDMI)
azx_init_chip_zx(chip);
err = pci_request_regions(pci, "ICH HD audio");
if (err < 0)
return err;
@ -1977,6 +2016,7 @@ static int azx_first_init(struct azx *chip)
chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
chip->capture_streams = ATIHDMI_NUM_CAPTURE;
break;
case AZX_DRIVER_ZXHDMI:
case AZX_DRIVER_GENERIC:
default:
chip->playback_streams = ICH6_NUM_PLAYBACK;
@ -2693,6 +2733,19 @@ static const struct pci_device_id azx_ids[] = {
{ PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
/* VIA GFX VT6122/VX11 */
{ PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
{ PCI_DEVICE(0x1106, 0x9141), .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_NO_64BIT },
{ PCI_DEVICE(0x1106, 0x9142),
.driver_data = AZX_DRIVER_ZXHDMI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_NO_MSI |
AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_NO_64BIT },
{ PCI_DEVICE(0x1106, 0x9144),
.driver_data = AZX_DRIVER_ZXHDMI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_NO_MSI |
AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_NO_64BIT },
{ PCI_DEVICE(0x1106, 0x9145),
.driver_data = AZX_DRIVER_ZXHDMI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_NO_MSI |
AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_NO_64BIT },
{ PCI_DEVICE(0x1106, 0x9146),
.driver_data = AZX_DRIVER_ZXHDMI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_NO_MSI |
AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_NO_64BIT },
/* SIS966 */
{ PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
/* ULI M5461 */
@ -2748,6 +2801,19 @@ static const struct pci_device_id azx_ids[] = {
.driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
/* Zhaoxin */
{ PCI_DEVICE(0x1d17, 0x3288), .driver_data = AZX_DRIVER_ZHAOXIN },
{ PCI_DEVICE(0x1d17, 0x9141), .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_NO_64BIT },
{ PCI_DEVICE(0x1d17, 0x9142),
.driver_data = AZX_DRIVER_ZXHDMI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_NO_MSI |
AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_NO_64BIT },
{ PCI_DEVICE(0x1d17, 0x9144),
.driver_data = AZX_DRIVER_ZXHDMI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_NO_MSI |
AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_NO_64BIT },
{ PCI_DEVICE(0x1d17, 0x9145),
.driver_data = AZX_DRIVER_ZXHDMI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_NO_MSI |
AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_NO_64BIT },
{ PCI_DEVICE(0x1d17, 0x9146),
.driver_data = AZX_DRIVER_ZXHDMI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_NO_MSI |
AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_NO_64BIT },
{ 0, }
};
MODULE_DEVICE_TABLE(pci, azx_ids);