ARM: cns3xxx: enable sparse IRQ support
This trivially enables sparse IRQ on cns3xxx by moving the nr_irqs definition from mach/irqs.h into the machine descriptor. These interrupts will still get statically assigned, so nothing changes here. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -390,6 +390,7 @@ config ARCH_CNS3XXX
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select MIGHT_HAVE_CACHE_L2X0
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select MIGHT_HAVE_PCI
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select PCI_DOMAINS if PCI
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select SPARSE_IRQ
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help
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Support for Cavium Networks CNS3XXX platform.
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@ -246,6 +246,7 @@ static void __init cns3420_map_io(void)
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MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
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.atag_offset = 0x100,
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.nr_irqs = NR_IRQS_CNS3XXX,
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.map_io = cns3420_map_io,
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.init_irq = cns3xxx_init_irq,
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.init_time = cns3xxx_timer_init,
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@ -1,24 +0,0 @@
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/*
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* Copyright 2000 Deep Blue Solutions Ltd.
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* Copyright 2003 ARM Limited
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* Copyright 2008 Cavium Networks
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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* published by the Free Software Foundation.
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*/
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#ifndef __MACH_IRQS_H
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#define __MACH_IRQS_H
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#define IRQ_LOCALTIMER 29
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#define IRQ_LOCALWDOG 30
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#define IRQ_TC11MP_GIC_START 32
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#include <mach/cns3xxx.h>
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#ifndef NR_IRQS
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#error "NR_IRQS not defined by the board-specific files"
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#endif
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#endif
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