ASoC: rl6231: avoid using divisible by 3 for DMIC clk

Few codecs will meet no DMIC clock output issue when select a divided
number which is divisible by 3. To prevent this issue, the patch ignore
the numbers when calculating the DMIC clock divider.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Bard Liao 2015-11-10 14:40:55 +08:00 committed by Mark Brown
parent 6ff33f3902
commit 2f64b6ed44
1 changed files with 2 additions and 0 deletions

View File

@ -80,6 +80,8 @@ int rl6231_calc_dmic_clk(int rate)
}
for (i = 0; i < ARRAY_SIZE(div); i++) {
if ((div[i] % 3) == 0)
continue;
/* find divider that gives DMIC frequency below 3MHz */
if (3000000 * div[i] >= rate)
return i;