PCI: dwc: Drop support for config space in 'ranges'
Since commit a0fd361db8
("PCI: dwc: Move "dbi", "dbi2", and
"addr_space" resource setup into common code"), the code
setting dbi_base when the config space is defined in 'ranges' property
instead of 'reg' is dead code as dbi_base is never NULL.
Rather than fix this, let's just drop the code. Using ranges has been
deprecated since 2014. The only platforms using this were exynos5440,
i.MX6 and Spear13xx. Exynos5440 is dead and has been removed. i.MX6 and
Spear13xx had PCIe support added just before this was deprecated and
were fixed within a kernel release or 2.
Link: https://lore.kernel.org/r/20201215194149.86831-1-robh@kernel.org
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
parent
6104033bd2
commit
2f5ab5afe0
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@ -305,8 +305,13 @@ int dw_pcie_host_init(struct pcie_port *pp)
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if (cfg_res) {
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pp->cfg0_size = resource_size(cfg_res);
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pp->cfg0_base = cfg_res->start;
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} else if (!pp->va_cfg0_base) {
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pp->va_cfg0_base = devm_pci_remap_cfg_resource(dev, cfg_res);
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if (IS_ERR(pp->va_cfg0_base))
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return PTR_ERR(pp->va_cfg0_base);
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} else {
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dev_err(dev, "Missing *config* reg space\n");
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return -ENODEV;
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}
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if (!pci->dbi_base) {
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@ -322,38 +327,12 @@ int dw_pcie_host_init(struct pcie_port *pp)
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pp->bridge = bridge;
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/* Get the I/O and memory ranges from DT */
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resource_list_for_each_entry(win, &bridge->windows) {
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switch (resource_type(win->res)) {
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case IORESOURCE_IO:
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pp->io_size = resource_size(win->res);
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pp->io_bus_addr = win->res->start - win->offset;
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pp->io_base = pci_pio_to_address(win->res->start);
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break;
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case 0:
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dev_err(dev, "Missing *config* reg space\n");
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pp->cfg0_size = resource_size(win->res);
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pp->cfg0_base = win->res->start;
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if (!pci->dbi_base) {
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pci->dbi_base = devm_pci_remap_cfgspace(dev,
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pp->cfg0_base,
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pp->cfg0_size);
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if (!pci->dbi_base) {
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dev_err(dev, "Error with ioremap\n");
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return -ENOMEM;
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}
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}
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break;
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}
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}
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if (!pp->va_cfg0_base) {
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pp->va_cfg0_base = devm_pci_remap_cfgspace(dev,
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pp->cfg0_base, pp->cfg0_size);
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if (!pp->va_cfg0_base) {
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dev_err(dev, "Error with ioremap in function\n");
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return -ENOMEM;
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}
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/* Get the I/O range from DT */
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win = resource_list_first_type(&bridge->windows, IORESOURCE_IO);
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if (win) {
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pp->io_size = resource_size(win->res);
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pp->io_bus_addr = win->res->start - win->offset;
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pp->io_base = pci_pio_to_address(win->res->start);
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}
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if (pci->link_gen < 1)
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