ath10k: fix rfc1042 header retrieval in QCA4019 with eth decap mode
Chipset from QCA99X0 onwards (QCA99X0, QCA9984, QCA4019 & future) rx_hdr_status is not padded to align in 4-byte boundary. Define a new hw_params field to handle different alignment behaviour between different hw. This patch fixes improper retrieval of rfc1042 header with QCA4019. This patch along with "ath10k: Properly remove padding from the start of rx payload" will fix traffic failure in ethernet decap mode for QCA4019. Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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@ -68,6 +68,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
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},
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.hw_ops = &qca988x_ops,
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.decap_align_bytes = 4,
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},
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{
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.id = QCA9887_HW_1_0_VERSION,
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@ -87,6 +88,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
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},
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.hw_ops = &qca988x_ops,
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.decap_align_bytes = 4,
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},
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{
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.id = QCA6174_HW_2_1_VERSION,
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@ -105,6 +107,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
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},
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.hw_ops = &qca988x_ops,
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.decap_align_bytes = 4,
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},
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{
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.id = QCA6174_HW_2_1_VERSION,
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@ -123,6 +126,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
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},
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.hw_ops = &qca988x_ops,
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.decap_align_bytes = 4,
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},
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{
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.id = QCA6174_HW_3_0_VERSION,
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@ -141,6 +145,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
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},
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.hw_ops = &qca988x_ops,
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.decap_align_bytes = 4,
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},
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{
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.id = QCA6174_HW_3_2_VERSION,
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@ -160,6 +165,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
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},
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.hw_ops = &qca988x_ops,
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.decap_align_bytes = 4,
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},
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{
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.id = QCA99X0_HW_2_0_DEV_VERSION,
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@ -184,6 +190,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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},
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.sw_decrypt_mcast_mgmt = true,
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.hw_ops = &qca99x0_ops,
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.decap_align_bytes = 1,
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},
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{
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.id = QCA9984_HW_1_0_DEV_VERSION,
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@ -208,6 +215,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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},
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.sw_decrypt_mcast_mgmt = true,
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.hw_ops = &qca99x0_ops,
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.decap_align_bytes = 1,
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},
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{
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.id = QCA9888_HW_2_0_DEV_VERSION,
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@ -231,6 +239,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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},
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.sw_decrypt_mcast_mgmt = true,
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.hw_ops = &qca99x0_ops,
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.decap_align_bytes = 1,
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},
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{
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.id = QCA9377_HW_1_0_DEV_VERSION,
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@ -249,6 +258,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
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},
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.hw_ops = &qca988x_ops,
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.decap_align_bytes = 4,
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},
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{
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.id = QCA9377_HW_1_1_DEV_VERSION,
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@ -267,6 +277,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
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},
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.hw_ops = &qca988x_ops,
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.decap_align_bytes = 4,
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},
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{
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.id = QCA4019_HW_1_0_DEV_VERSION,
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@ -292,6 +303,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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},
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.sw_decrypt_mcast_mgmt = true,
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.hw_ops = &qca99x0_ops,
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.decap_align_bytes = 1,
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},
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};
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@ -1103,6 +1103,7 @@ static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
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size_t hdr_len, crypto_len;
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void *rfc1042;
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bool is_first, is_last, is_amsdu;
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int bytes_aligned = ar->hw_params.decap_align_bytes;
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rxd = (void *)msdu->data - sizeof(*rxd);
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hdr = (void *)rxd->rx_hdr_status;
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@ -1119,8 +1120,8 @@ static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
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hdr_len = ieee80211_hdrlen(hdr->frame_control);
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crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
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rfc1042 += round_up(hdr_len, 4) +
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round_up(crypto_len, 4);
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rfc1042 += round_up(hdr_len, bytes_aligned) +
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round_up(crypto_len, bytes_aligned);
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}
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if (is_amsdu)
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@ -408,6 +408,9 @@ struct ath10k_hw_params {
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bool sw_decrypt_mcast_mgmt;
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const struct ath10k_hw_ops *hw_ops;
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/* Number of bytes used for alignment in rx_hdr_status of rx desc. */
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int decap_align_bytes;
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};
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struct htt_rx_desc;
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