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arm64: dts: renesas: r8a779a0: Revise renesas,ipmmu-main 

Since IMSSTR register was undocumented on the latest datasheet and
dt-bindings of renesas,ipmmu-vmsa was updated about the
renesas,ipmmu-main property, revise the property on each cache IPMMU
node.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/ed4c21150e42dd23412a8f4af7976f81edc1c9c2.1680592069.git.geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven 2023-04-04 09:10:08 +02:00
parent 741f99c7ff
commit 2f04079bf5
1 changed files with 11 additions and 11 deletions
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22
arch/arm64/boot/dts/renesas/r8a779a0.dtsi
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@ -2098,7 +2098,7 @@
compatible = "renesas,ipmmu-r8a779a0",
"renesas,rcar-gen4-ipmmu-vmsa";
reg = <0 0xee480000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 10>;
renesas,ipmmu-main = <&ipmmu_mm>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
@ -2107,7 +2107,7 @@
compatible = "renesas,ipmmu-r8a779a0",
"renesas,rcar-gen4-ipmmu-vmsa";
reg = <0 0xee4c0000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 19>;
renesas,ipmmu-main = <&ipmmu_mm>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
@ -2116,7 +2116,7 @@
compatible = "renesas,ipmmu-r8a779a0",
"renesas,rcar-gen4-ipmmu-vmsa";
reg = <0 0xeed00000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
renesas,ipmmu-main = <&ipmmu_mm>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
@ -2125,7 +2125,7 @@
compatible = "renesas,ipmmu-r8a779a0",
"renesas,rcar-gen4-ipmmu-vmsa";
reg = <0 0xeed40000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 1>;
renesas,ipmmu-main = <&ipmmu_mm>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
@ -2134,7 +2134,7 @@
compatible = "renesas,ipmmu-r8a779a0",
"renesas,rcar-gen4-ipmmu-vmsa";
reg = <0 0xeed80000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 3>;
renesas,ipmmu-main = <&ipmmu_mm>;
power-domains = <&sysc R8A779A0_PD_A3IR>;
#iommu-cells = <1>;
};
@ -2143,7 +2143,7 @@
compatible = "renesas,ipmmu-r8a779a0",
"renesas,rcar-gen4-ipmmu-vmsa";
reg = <0 0xeedc0000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 12>;
renesas,ipmmu-main = <&ipmmu_mm>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
@ -2152,7 +2152,7 @@
compatible = "renesas,ipmmu-r8a779a0",
"renesas,rcar-gen4-ipmmu-vmsa";
reg = <0 0xeee80000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 14>;
renesas,ipmmu-main = <&ipmmu_mm>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
@ -2161,7 +2161,7 @@
compatible = "renesas,ipmmu-r8a779a0",
"renesas,rcar-gen4-ipmmu-vmsa";
reg = <0 0xeeec0000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 15>;
renesas,ipmmu-main = <&ipmmu_mm>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
@ -2170,7 +2170,7 @@
compatible = "renesas,ipmmu-r8a779a0",
"renesas,rcar-gen4-ipmmu-vmsa";
reg = <0 0xeee00000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 6>;
renesas,ipmmu-main = <&ipmmu_mm>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
@ -2179,7 +2179,7 @@
compatible = "renesas,ipmmu-r8a779a0",
"renesas,rcar-gen4-ipmmu-vmsa";
reg = <0 0xeef00000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 5>;
renesas,ipmmu-main = <&ipmmu_mm>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
@ -2188,7 +2188,7 @@
compatible = "renesas,ipmmu-r8a779a0",
"renesas,rcar-gen4-ipmmu-vmsa";
reg = <0 0xeef40000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 11>;
renesas,ipmmu-main = <&ipmmu_mm>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};