drm/radeon: Handle PPLL0 powerdown on DCE8
Only Bonaire has PPLL0. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1931,7 +1931,7 @@ static void atombios_crtc_disable(struct drm_crtc *crtc)
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break;
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case ATOM_PPLL0:
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/* disable the ppll */
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if (ASIC_IS_DCE61(rdev))
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if ((rdev->family == CHIP_ARUBA) || (rdev->family == CHIP_BONAIRE))
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atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id,
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0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss);
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break;
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