ARM64: perf: add support for perf registers API
This patch implements the functions required for the perf registers API, allowing the perf tool to interface kernel register dumps with libunwind in order to provide userspace backtracing. Compat mode is also supported. Only the general purpose user space registers are exported, i.e.: PERF_REG_ARM_X0, ... PERF_REG_ARM_X28, PERF_REG_ARM_FP, PERF_REG_ARM_LR, PERF_REG_ARM_SP, PERF_REG_ARM_PC and not the PERF_REG_ARM_V* registers. Signed-off-by: Jean Pihet <jean.pihet@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -39,6 +39,8 @@ config ARM64
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select HAVE_MEMBLOCK
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select HAVE_PATA_PLATFORM
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select HAVE_PERF_EVENTS
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select HAVE_PERF_REGS
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select HAVE_PERF_USER_STACK_DUMP
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select IRQ_DOMAIN
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select MODULES_USE_ELF_RELA
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select NO_BOOTMEM
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@ -68,6 +68,7 @@
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/* Architecturally defined mapping between AArch32 and AArch64 registers */
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#define compat_usr(x) regs[(x)]
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#define compat_fp regs[11]
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#define compat_sp regs[13]
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#define compat_lr regs[14]
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#define compat_sp_hyp regs[15]
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@ -9,6 +9,7 @@ header-y += byteorder.h
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header-y += fcntl.h
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header-y += hwcap.h
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header-y += kvm_para.h
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header-y += perf_regs.h
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header-y += param.h
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header-y += ptrace.h
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header-y += setup.h
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@ -0,0 +1,40 @@
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#ifndef _ASM_ARM64_PERF_REGS_H
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#define _ASM_ARM64_PERF_REGS_H
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enum perf_event_arm_regs {
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PERF_REG_ARM64_X0,
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PERF_REG_ARM64_X1,
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PERF_REG_ARM64_X2,
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PERF_REG_ARM64_X3,
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PERF_REG_ARM64_X4,
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PERF_REG_ARM64_X5,
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PERF_REG_ARM64_X6,
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PERF_REG_ARM64_X7,
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PERF_REG_ARM64_X8,
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PERF_REG_ARM64_X9,
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PERF_REG_ARM64_X10,
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PERF_REG_ARM64_X11,
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PERF_REG_ARM64_X12,
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PERF_REG_ARM64_X13,
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PERF_REG_ARM64_X14,
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PERF_REG_ARM64_X15,
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PERF_REG_ARM64_X16,
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PERF_REG_ARM64_X17,
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PERF_REG_ARM64_X18,
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PERF_REG_ARM64_X19,
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PERF_REG_ARM64_X20,
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PERF_REG_ARM64_X21,
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PERF_REG_ARM64_X22,
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PERF_REG_ARM64_X23,
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PERF_REG_ARM64_X24,
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PERF_REG_ARM64_X25,
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PERF_REG_ARM64_X26,
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PERF_REG_ARM64_X27,
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PERF_REG_ARM64_X28,
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PERF_REG_ARM64_X29,
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PERF_REG_ARM64_LR,
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PERF_REG_ARM64_SP,
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PERF_REG_ARM64_PC,
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PERF_REG_ARM64_MAX,
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};
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#endif /* _ASM_ARM64_PERF_REGS_H */
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@ -15,8 +15,9 @@ arm64-obj-$(CONFIG_COMPAT) += sys32.o kuser32.o signal32.o \
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sys_compat.o
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arm64-obj-$(CONFIG_MODULES) += arm64ksyms.o module.o
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arm64-obj-$(CONFIG_SMP) += smp.o smp_spin_table.o topology.o
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arm64-obj-$(CONFIG_PERF_EVENTS) += perf_regs.o
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arm64-obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o
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arm64-obj-$(CONFIG_HAVE_HW_BREAKPOINT)+= hw_breakpoint.o
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arm64-obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
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arm64-obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
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arm64-obj-$(CONFIG_ARM64_CPU_SUSPEND) += sleep.o suspend.o
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arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o
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@ -0,0 +1,44 @@
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/perf_event.h>
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#include <linux/bug.h>
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#include <asm/perf_regs.h>
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#include <asm/ptrace.h>
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u64 perf_reg_value(struct pt_regs *regs, int idx)
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{
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if (WARN_ON_ONCE((u32)idx >= PERF_REG_ARM64_MAX))
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return 0;
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/*
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* Compat (i.e. 32 bit) mode:
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* - PC has been set in the pt_regs struct in kernel_entry,
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* - Handle SP and LR here.
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*/
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if (compat_user_mode(regs)) {
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if ((u32)idx == PERF_REG_ARM64_SP)
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return regs->compat_sp;
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if ((u32)idx == PERF_REG_ARM64_LR)
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return regs->compat_lr;
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}
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return regs->regs[idx];
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}
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#define REG_RESERVED (~((1ULL << PERF_REG_ARM64_MAX) - 1))
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int perf_reg_validate(u64 mask)
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{
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if (!mask || mask & REG_RESERVED)
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return -EINVAL;
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return 0;
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}
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u64 perf_reg_abi(struct task_struct *task)
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{
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if (is_compat_thread(task_thread_info(task)))
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return PERF_SAMPLE_REGS_ABI_32;
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else
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return PERF_SAMPLE_REGS_ABI_64;
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}
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