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drm/i915/icl: Get pipe timings for DSI 

Transcoder timings for Gen11 DSI encoder
is available at pipe level unlike in older platform
where port specific registers need to be accessed.

v2 by Jani:
 - get timings for (!dsi || icl) instead of (dsi && icl).

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/f60e0c1aee08248e758da3219d3239898b43ba41.1543500286.git.jani.nikula@intel.com
This commit is contained in:
Madhav Chauhan 2018-11-29 16:12:28 +02:00 committed by Jani Nikula
parent 2ca711caec
commit 2eae5d6bfa
1 changed files with 2 additions and 1 deletions
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3
drivers/gpu/drm/i915/intel_display.c
View File

@ -9660,7 +9660,8 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
if (!active)
goto out;
if (!transcoder_is_dsi(pipe_config->cpu_transcoder)) {
if (!transcoder_is_dsi(pipe_config->cpu_transcoder) ||
IS_ICELAKE(dev_priv)) {
haswell_get_ddi_port_state(crtc, pipe_config);
intel_get_pipe_timings(crtc, pipe_config);
}