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usb: cdns3: Enable workaround for USB2.0 PHY Rx compliance test PHY lockup 

USB2.0 PHY hangs in Rx Compliance test when the incoming packet
amplitude is varied below and above the Squelch Level of
Receiver during the active packet multiple times.

Version 1 of the controller allows PHY to be reset when RX fail condition
is detected to work around the above issue. This feature is
disabled by default and needs to be enabled using a bit from
the newly added PHYRST_CFG register. This patch enables the workaround.

There is no way to know controller version before device controller
is started and the workaround needs to be applied for both host and
device modes, so we rely on a DT property do decide when to
apply the workaround.

Signed-off-by: Pawel Laszczak <pawell@cadence.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
This commit is contained in:
Pawel Laszczak 2020-09-15 14:45:43 +03:00 committed by Felipe Balbi
parent 5261e48f9a
commit 2eae2dfd58
4 changed files with 19 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/usb/cdns3/core.c
View File

@ -488,6 +488,8 @@ static int cdns3_probe(struct platform_device *pdev)
return -ENXIO; return -ENXIO;
} }
cdns->phyrst_a_enable = device_property_read_bool(dev, "cdns,phyrst-a-enable");
cdns->otg_res = *res; cdns->otg_res = *res;
cdns->wakeup_irq = platform_get_irq_byname_optional(pdev, "wakeup"); cdns->wakeup_irq = platform_get_irq_byname_optional(pdev, "wakeup");

1
drivers/usb/cdns3/core.h
View File

@ -87,6 +87,7 @@ struct cdns3 {
#define CDNS3_CONTROLLER_V0 0 #define CDNS3_CONTROLLER_V0 0
#define CDNS3_CONTROLLER_V1 1 #define CDNS3_CONTROLLER_V1 1
u32 version; u32 version;
bool phyrst_a_enable;
int otg_irq; int otg_irq;
int dev_irq; int dev_irq;

12
drivers/usb/cdns3/drd.c
View File

@ -42,6 +42,18 @@ int cdns3_set_mode(struct cdns3 *cdns, enum usb_dr_mode mode)
reg = readl(&cdns->otg_v1_regs->override); reg = readl(&cdns->otg_v1_regs->override);
reg |= OVERRIDE_IDPULLUP; reg |= OVERRIDE_IDPULLUP;
writel(reg, &cdns->otg_v1_regs->override); writel(reg, &cdns->otg_v1_regs->override);
/*
* Enable work around feature built into the
* controller to address issue with RX Sensitivity
* est (EL_17) for USB2 PHY. The issue only occures
* for 0x0002450D controller version.
*/
if (cdns->phyrst_a_enable) {
reg = readl(&cdns->otg_v1_regs->phyrst_cfg);
reg |= PHYRST_CFG_PHYRST_A_ENABLE;
writel(reg, &cdns->otg_v1_regs->phyrst_cfg);
}
} else { } else {
reg = readl(&cdns->otg_v0_regs->ctrl1); reg = readl(&cdns->otg_v0_regs->ctrl1);
reg |= OVERRIDE_IDPULLUP_V0; reg |= OVERRIDE_IDPULLUP_V0;

5
drivers/usb/cdns3/drd.h
View File

@ -31,7 +31,7 @@ struct cdns3_otg_regs {
__le32 simulate; __le32 simulate;
__le32 override; __le32 override;
__le32 susp_ctrl; __le32 susp_ctrl;
__le32 reserved4; __le32 phyrst_cfg;
__le32 anasts; __le32 anasts;
__le32 adp_ramp_time; __le32 adp_ramp_time;
__le32 ctrl1; __le32 ctrl1;
@ -153,6 +153,9 @@ struct cdns3_otg_common_regs {
/* Only for CDNS3_CONTROLLER_V0 version */ /* Only for CDNS3_CONTROLLER_V0 version */
#define OVERRIDE_IDPULLUP_V0 BIT(24) #define OVERRIDE_IDPULLUP_V0 BIT(24)
/* PHYRST_CFG - bitmasks */
#define PHYRST_CFG_PHYRST_A_ENABLE BIT(0)
#define CDNS3_ID_PERIPHERAL 1 #define CDNS3_ID_PERIPHERAL 1
#define CDNS3_ID_HOST 0 #define CDNS3_ID_HOST 0