drm/amdgpu: Use legacy TLB flush for gfx943
Invalidate TLBs via a legacy flush request (flush_type=0) prior to the heavyweight flush requests (flush_type=2) in gmc_v9_0.c. This is temporarily required to mitigate a bug causing CPC UTCL1 to return stale translations after invalidation requests in address range mode. v2: squash in long term fix "drm/amdgpu: disable extra gfx943 legacy flush on rev1+" Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Philip Yang <Philip.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -833,6 +833,11 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
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*/
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inv_req = gmc_v9_0_get_invalidate_req(vmid, 2);
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inv_req2 = gmc_v9_0_get_invalidate_req(vmid, flush_type);
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} else if (flush_type == 2 &&
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adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 3) &&
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adev->rev_id == 0) {
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inv_req = gmc_v9_0_get_invalidate_req(vmid, 0);
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inv_req2 = gmc_v9_0_get_invalidate_req(vmid, flush_type);
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} else {
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inv_req = gmc_v9_0_get_invalidate_req(vmid, flush_type);
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inv_req2 = 0;
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@ -976,6 +981,13 @@ static int gmc_v9_0_flush_gpu_tlb_pasid(struct amdgpu_device *adev,
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if (vega20_xgmi_wa)
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kiq->pmf->kiq_invalidate_tlbs(ring,
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pasid, 2, all_hub);
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if (flush_type == 2 &&
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adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 3) &&
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adev->rev_id == 0)
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kiq->pmf->kiq_invalidate_tlbs(ring,
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pasid, 0, all_hub);
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kiq->pmf->kiq_invalidate_tlbs(ring,
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pasid, flush_type, all_hub);
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r = amdgpu_fence_emit_polling(ring, &seq, MAX_KIQ_REG_WAIT);
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