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arm64: dts: ls208xa: add PCS MDIO and PCS PHY nodes 

Add PCS MDIO nodes for the internal MDIO buses on the LS208x SoCs, along
with their internal PCS PHYs which will be used when the DPMAC object is
in TYPE_PHY mode.
Also, rename the dpmac@x nodes to ethernet@x in order to be compliant
with the naming convention used by ethernet controllers.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Ioana Ciornei 2020-10-30 13:35:53 +02:00 committed by Shawn Guo
parent dd2ab5c8b8
commit 2e7c4c3c2f
2 changed files with 272 additions and 16 deletions
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32
arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
View File

@ -110,3 +110,35 @@
reg = <0x3>;
};
};
&pcs_mdio1 {
status = "okay";
};
&pcs_mdio2 {
status = "okay";
};
&pcs_mdio3 {
status = "okay";
};
&pcs_mdio4 {
status = "okay";
};
&pcs_mdio5 {
status = "okay";
};
&pcs_mdio6 {
status = "okay";
};
&pcs_mdio7 {
status = "okay";
};
&pcs_mdio8 {
status = "okay";
};

256
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
View File

@ -476,6 +476,214 @@
status = "disabled";
};
pcs_mdio1: mdio@8c07000 {
compatible = "fsl,fman-memac-mdio";
reg = <0x0 0x8c07000 0x0 0x1000>;
little-endian;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pcs1: ethernet-phy@0 {
reg = <0>;
};
};
pcs_mdio2: mdio@8c0b000 {
compatible = "fsl,fman-memac-mdio";
reg = <0x0 0x8c0b000 0x0 0x1000>;
little-endian;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pcs2: ethernet-phy@0 {
reg = <0>;
};
};
pcs_mdio3: mdio@8c0f000 {
compatible = "fsl,fman-memac-mdio";
reg = <0x0 0x8c0f000 0x0 0x1000>;
little-endian;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pcs3: ethernet-phy@0 {
reg = <0>;
};
};
pcs_mdio4: mdio@8c13000 {
compatible = "fsl,fman-memac-mdio";
reg = <0x0 0x8c13000 0x0 0x1000>;
little-endian;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pcs4: ethernet-phy@0 {
reg = <0>;
};
};
pcs_mdio5: mdio@8c17000 {
compatible = "fsl,fman-memac-mdio";
reg = <0x0 0x8c17000 0x0 0x1000>;
little-endian;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pcs5: ethernet-phy@0 {
reg = <0>;
};
};
pcs_mdio6: mdio@8c1b000 {
compatible = "fsl,fman-memac-mdio";
reg = <0x0 0x8c1b000 0x0 0x1000>;
little-endian;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pcs6: ethernet-phy@0 {
reg = <0>;
};
};
pcs_mdio7: mdio@8c1f000 {
compatible = "fsl,fman-memac-mdio";
reg = <0x0 0x8c1f000 0x0 0x1000>;
little-endian;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pcs7: ethernet-phy@0 {
reg = <0>;
};
};
pcs_mdio8: mdio@8c23000 {
compatible = "fsl,fman-memac-mdio";
reg = <0x0 0x8c23000 0x0 0x1000>;
little-endian;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pcs8: ethernet-phy@0 {
reg = <0>;
};
};
pcs_mdio9: mdio@8c27000 {
compatible = "fsl,fman-memac-mdio";
reg = <0x0 0x8c27000 0x0 0x1000>;
little-endian;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pcs9: ethernet-phy@0 {
reg = <0>;
};
};
pcs_mdio10: mdio@8c2b000 {
compatible = "fsl,fman-memac-mdio";
reg = <0x0 0x8c2b000 0x0 0x1000>;
little-endian;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pcs10: ethernet-phy@0 {
reg = <0>;
};
};
pcs_mdio11: mdio@8c2f000 {
compatible = "fsl,fman-memac-mdio";
reg = <0x0 0x8c2f000 0x0 0x1000>;
little-endian;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pcs11: ethernet-phy@0 {
reg = <0>;
};
};
pcs_mdio12: mdio@8c33000 {
compatible = "fsl,fman-memac-mdio";
reg = <0x0 0x8c33000 0x0 0x1000>;
little-endian;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pcs12: ethernet-phy@0 {
reg = <0>;
};
};
pcs_mdio13: mdio@8c37000 {
compatible = "fsl,fman-memac-mdio";
reg = <0x0 0x8c37000 0x0 0x1000>;
little-endian;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pcs13: ethernet-phy@0 {
reg = <0>;
};
};
pcs_mdio14: mdio@8c3b000 {
compatible = "fsl,fman-memac-mdio";
reg = <0x0 0x8c3b000 0x0 0x1000>;
little-endian;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pcs14: ethernet-phy@0 {
reg = <0>;
};
};
pcs_mdio15: mdio@8c3f000 {
compatible = "fsl,fman-memac-mdio";
reg = <0x0 0x8c3f000 0x0 0x1000>;
little-endian;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pcs15: ethernet-phy@0 {
reg = <0>;
};
};
pcs_mdio16: mdio@8c43000 {
compatible = "fsl,fman-memac-mdio";
reg = <0x0 0x8c43000 0x0 0x1000>;
little-endian;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pcs16: ethernet-phy@0 {
reg = <0>;
};
};
fsl_mc: fsl-mc@80c000000 {
compatible = "fsl,qoriq-mc";
reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
@ -500,84 +708,100 @@
#address-cells = <1>;
#size-cells = <0>;
dpmac1: dpmac@1 {
dpmac1: ethernet@1 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x1>;
pcs-handle = <&pcs1>;
};
dpmac2: dpmac@2 {
dpmac2: ethernet@2 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x2>;
pcs-handle = <&pcs2>;
};
dpmac3: dpmac@3 {
dpmac3: ethernet@3 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x3>;
pcs-handle = <&pcs3>;
};
dpmac4: dpmac@4 {
dpmac4: ethernet@4 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x4>;
pcs-handle = <&pcs4>;
};
dpmac5: dpmac@5 {
dpmac5: ethernet@5 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x5>;
pcs-handle = <&pcs5>;
};
dpmac6: dpmac@6 {
dpmac6: ethernet@6 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x6>;
pcs-handle = <&pcs6>;
};
dpmac7: dpmac@7 {
dpmac7: ethernet@7 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x7>;
pcs-handle = <&pcs7>;
};
dpmac8: dpmac@8 {
dpmac8: ethernet@8 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x8>;
pcs-handle = <&pcs8>;
};
dpmac9: dpmac@9 {
dpmac9: ethernet@9 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x9>;
pcs-handle = <&pcs9>;
};
dpmac10: dpmac@a {
dpmac10: ethernet@a {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0xa>;
pcs-handle = <&pcs10>;
};
dpmac11: dpmac@b {
dpmac11: ethernet@b {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0xb>;
pcs-handle = <&pcs11>;
};
dpmac12: dpmac@c {
dpmac12: ethernet@c {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0xc>;
pcs-handle = <&pcs12>;
};
dpmac13: dpmac@d {
dpmac13: ethernet@d {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0xd>;
pcs-handle = <&pcs13>;
};
dpmac14: dpmac@e {
dpmac14: ethernet@e {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0xe>;
pcs-handle = <&pcs14>;
};
dpmac15: dpmac@f {
dpmac15: ethernet@f {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0xf>;
pcs-handle = <&pcs15>;
};
dpmac16: dpmac@10 {
dpmac16: ethernet@10 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x10>;
pcs-handle = <&pcs16>;
};
};
};