i40e: clear only cause_ena bit
When disabling interrupts, we should only be clearing the CAUSE_ENA bit, not clearing the whole register. Clearing the whole register sets the NEXTQ_IDX field to 0 instead of 0x7ff which can confuse the Firmware in some reset sequences. Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Signed-off-by: Mitch Williams <mitch.a.williams@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -3588,14 +3588,24 @@ static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
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int base = vsi->base_vector;
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int i;
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/* disable interrupt causation from each queue */
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for (i = 0; i < vsi->num_queue_pairs; i++) {
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wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
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wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
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u32 val;
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val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
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val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
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wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
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val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
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val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
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wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
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if (!i40e_enabled_xdp_vsi(vsi))
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continue;
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wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0);
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}
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/* disable each interrupt */
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if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
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for (i = vsi->base_vector;
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i < (vsi->num_q_vectors + vsi->base_vector); i++)
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