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Qualcomm ARM64 Devicetree updates for v6.3 

This introduces support for the new Snapdragon 8 Gen 2 (SM8550)
 platform.  In addition to the adding support for the MTP on this
 platform, support the following devices is introduced:
  - GPLUS FL8005A
  - Google Zombie with LTE and NVMe
  - Google Zombie with NVMe
  - Lenovo Tab P11
  - Motorola G5 Plus
  - Motorola G7 Power
  - Motorola Moto G6
  - Samsung Galaxy J5 (2016)
  - Samsung Galaxy Tab A 8.0
  - Samsung Galaxy Tab A 9.7
  - Xiaomi Mi A1
  - Xiaomi Mi A2 Lite
  - Xiaomi Redmi 5 Plus
  - Xiaomi Redmi Note 4X
 
 On IPQ8074 the PCIe PHY register regions and PHY clock names are
 corrected.
 
 On MSM8916 DMA for the I2C controllers are introduced and blsp_dma is
 unconditionally enabled. Per-sensor calibration data is provided for the
 thermal sensor (tsens) block. The GPLUS FL8005A device is introduced and
 gains support for touchscreen and flash LED. An additional Samsung
 Galaxy J5 variant is added, and support is added for hall sensor and
 MUIC.
 
 Per-sensor calibration information is introduced for the thermal sensor
 on MSM8956 as well.
 
 On MSM8996, GPLL0 is added as a possible Kryo clock controller input, a
 carveout is added to get modem metadata out of System RAM. Missing bus
 clocks are added for agnoc2.
 SDHCI1 is enabled on the Sony Xperia Tone platform and USB is limited to
 high-speed, to make USB work.
 
 MSM8998 gains the same modem carveout as other platforms, and the
 description of the clock hierarchy is improved.
 
 On QCS404 the clock hierarchy description is improved, the CDSP PAS node
 is adjusted to match the binding and the thermal sensor (tsens) gains
 per-sensor calibration information.
 
 On SC7180 the Data Capture and Compare block is intorduced, and a
 carveout for the modem metadata is introduced, to get this out of System
 RAM. Pazquel360 gains touchscreen support, the regulator off-on-time is
 adjusted for the Trogdor eDP and touchscreen.
 Data lane and frequency properties are introduced for the DisplayPort
 links.
 
 SC7280 also gets Data Capture and Compare support, as well as the
 dedicated modem metadata region. Herobrine gains DP audio support.
 IPA description is updated so that it's only active on boards with a
 modem.
 
 On SC8280XP the display subsystem is introduced, currently with support
 for most of the DisplayPort controllers. GPR, SoundWire and LPASS is
 introduced, for audio support. Missing I2C and SPI controllers are
 introduced.
 Support for EDP is introduced for the CRD, the Lenovo ThinkPad X13s and
 the SA8295P ADP automotive board. The SA8540P Ride platform enables one
 i2c and pcie controllers.
 A CMA region is defined for the CRD and X13s, to avoid allocation issues
 from the NVMe support.
 
 Fairphone FP3 gains NFC support and the Sony Xperia Nile platform gains
 a description of simplefb.
 SDM670 gains QFPROM definition.
 
 SDM845 gains a carveout for the modem metadata and support for the Data
 Capture and Compare block is introduced.  Lenovo Yoga C630 firmware
 paths are aligned with all other Qualcomm platforms.
 
 On SM6125 apss SMMU is introduced and streams are defined for USB and
 SDHCI controllers. GPI DMA description is introduced, as well as missing
 SPI and I2C serial engines.
 On Sony Xperia 10 IIa regulator definitions are improved, SDHCI2 is
 introduced, and I2C and related GPI DMA blocks are enabled.
 
 On SM6350 IPA is introduced. DDR and L3 scaling is introduced based on
 CPUfreq.
 
 Fairphone FP4, on SM7225 also has IPA enabled, and the Flash LED is
 enabled as well.
 
 On SM8150 the display subsystem is introduced, with clock controller,
 DPU and two DSI controllers. The Data Capture and Compare block is
 introduced.
 For the Sony Xperia Kumano platform, GPIO keys and NFC support is
 introduced.
 
 For SM8350 PCIe is introduced, as is the display subsystem with display
 clock controller, DPU and two DSI controllers. #interconnect-cells is
 changed to 2, to align with other platforms and allow for active-only
 votes. The display is enabled and the LT9611uxc found on the SM8350
 Hardware Development Kit board is described, to provide HDMI output.
 
 On SM8450 the display subsystem is introduced, with DPU and two DSI
 controllers.  GIC-ITS support is introduced for both PCIe0 and PCIe1.
 SPMI bus support is introduced and pmics are wired up across the various
 devices.
 The display subsystem is enabled and the LT9611uxc is described to
 provide HDMI output on the SM8450 Hardware Development Kit.
 On Sony Xperia Nagara platform, GPIO keys and GPIO line names are
 introduced. As is the SLG51000 PMIC and camera regulators are defined.
 
 Support for SM8550 is introduced, with support for storage, USB,
 remoteprocs, PCIe, low-speed buses, crypto and display subsystem. These
 blocks are enabled on the MTP.
 
 Lastly, the work continue to align Devicetree source with bindings
 across all platforms.
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Merge tag 'qcom-arm64-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 Devicetree updates for v6.3

This introduces support for the new Snapdragon 8 Gen 2 (SM8550)
platform.  In addition to the adding support for the MTP on this
platform, support the following devices is introduced:
 - GPLUS FL8005A
 - Google Zombie with LTE and NVMe
 - Google Zombie with NVMe
 - Lenovo Tab P11
 - Motorola G5 Plus
 - Motorola G7 Power
 - Motorola Moto G6
 - Samsung Galaxy J5 (2016)
 - Samsung Galaxy Tab A 8.0
 - Samsung Galaxy Tab A 9.7
 - Xiaomi Mi A1
 - Xiaomi Mi A2 Lite
 - Xiaomi Redmi 5 Plus
 - Xiaomi Redmi Note 4X

On IPQ8074 the PCIe PHY register regions and PHY clock names are
corrected.

On MSM8916 DMA for the I2C controllers are introduced and blsp_dma is
unconditionally enabled. Per-sensor calibration data is provided for the
thermal sensor (tsens) block. The GPLUS FL8005A device is introduced and
gains support for touchscreen and flash LED. An additional Samsung
Galaxy J5 variant is added, and support is added for hall sensor and
MUIC.

Per-sensor calibration information is introduced for the thermal sensor
on MSM8956 as well.

On MSM8996, GPLL0 is added as a possible Kryo clock controller input, a
carveout is added to get modem metadata out of System RAM. Missing bus
clocks are added for agnoc2.
SDHCI1 is enabled on the Sony Xperia Tone platform and USB is limited to
high-speed, to make USB work.

MSM8998 gains the same modem carveout as other platforms, and the
description of the clock hierarchy is improved.

On QCS404 the clock hierarchy description is improved, the CDSP PAS node
is adjusted to match the binding and the thermal sensor (tsens) gains
per-sensor calibration information.

On SC7180 the Data Capture and Compare block is intorduced, and a
carveout for the modem metadata is introduced, to get this out of System
RAM. Pazquel360 gains touchscreen support, the regulator off-on-time is
adjusted for the Trogdor eDP and touchscreen.
Data lane and frequency properties are introduced for the DisplayPort
links.

SC7280 also gets Data Capture and Compare support, as well as the
dedicated modem metadata region. Herobrine gains DP audio support.
IPA description is updated so that it's only active on boards with a
modem.

On SC8280XP the display subsystem is introduced, currently with support
for most of the DisplayPort controllers. GPR, SoundWire and LPASS is
introduced, for audio support. Missing I2C and SPI controllers are
introduced.
Support for EDP is introduced for the CRD, the Lenovo ThinkPad X13s and
the SA8295P ADP automotive board. The SA8540P Ride platform enables one
i2c and pcie controllers.
A CMA region is defined for the CRD and X13s, to avoid allocation issues
from the NVMe support.

Fairphone FP3 gains NFC support and the Sony Xperia Nile platform gains
a description of simplefb.
SDM670 gains QFPROM definition.

SDM845 gains a carveout for the modem metadata and support for the Data
Capture and Compare block is introduced.  Lenovo Yoga C630 firmware
paths are aligned with all other Qualcomm platforms.

On SM6125 apss SMMU is introduced and streams are defined for USB and
SDHCI controllers. GPI DMA description is introduced, as well as missing
SPI and I2C serial engines.
On Sony Xperia 10 IIa regulator definitions are improved, SDHCI2 is
introduced, and I2C and related GPI DMA blocks are enabled.

On SM6350 IPA is introduced. DDR and L3 scaling is introduced based on
CPUfreq.

Fairphone FP4, on SM7225 also has IPA enabled, and the Flash LED is
enabled as well.

On SM8150 the display subsystem is introduced, with clock controller,
DPU and two DSI controllers. The Data Capture and Compare block is
introduced.
For the Sony Xperia Kumano platform, GPIO keys and NFC support is
introduced.

For SM8350 PCIe is introduced, as is the display subsystem with display
clock controller, DPU and two DSI controllers. #interconnect-cells is
changed to 2, to align with other platforms and allow for active-only
votes. The display is enabled and the LT9611uxc found on the SM8350
Hardware Development Kit board is described, to provide HDMI output.

On SM8450 the display subsystem is introduced, with DPU and two DSI
controllers.  GIC-ITS support is introduced for both PCIe0 and PCIe1.
SPMI bus support is introduced and pmics are wired up across the various
devices.
The display subsystem is enabled and the LT9611uxc is described to
provide HDMI output on the SM8450 Hardware Development Kit.
On Sony Xperia Nagara platform, GPIO keys and GPIO line names are
introduced. As is the SLG51000 PMIC and camera regulators are defined.

Support for SM8550 is introduced, with support for storage, USB,
remoteprocs, PCIe, low-speed buses, crypto and display subsystem. These
blocks are enabled on the MTP.

Lastly, the work continue to align Devicetree source with bindings
across all platforms.

* tag 'qcom-arm64-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (320 commits)
  arm64: dts: qcom: sc7280: Add a carveout for modem metadata
  arm64: dts: qcom: sc7180: Add a carveout for modem metadata
  arm64: dts: qcom: sdm845: Add a carveout for modem metadata
  arm64: dts: qcom: msm8998: Add a carveout for modem metadata
  arm64: dts: qcom: msm8996: Add a carveout for modem metadata
  arm64: dts: qcom: ipq8074: correct PCIe QMP PHY output clock names
  arm64: dts: qcom: ipq8074: fix Gen3 PCIe node
  arm64: dts: qcom: ipq8074: set Gen2 PCIe pcie max-link-speed
  arm64: dts: qcom: ipq8074: correct Gen2 PCIe ranges
  arm64: dts: qcom: ipq8074: fix Gen3 PCIe QMP PHY
  arm64: dts: qcom: ipq8074: fix Gen2 PCIe QMP PHY
  arm64: dts: qcom: sdm845-db845c: drop label from I2C controllers
  arm64: dts: qcom: msm8996: support using GPLL0 as kryocc input
  arm64: dts: qcom: sm8450: Allow both GIC-ITS and internal MSI controller
  arm64: dts: qcom: sm8550-mtp: Add USB PHYs and HC nodes
  arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes
  arm64: dts: qcom: sm8250: drop unused properties from tx-macro
  arm64: dts: qcom: sm8250: drop unused clock-frequency from wsa-macro
  arm64: dts: qcom: align OPP table node name with DT schema
  arm64: dts: qcom: rename mdp nodes to display-controller
  ...

Link: https://lore.kernel.org/r/20230126202528.3691539-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2023-01-30 17:52:35 +01:00
parent b453988c59 a63a420d05
commit 2e0f3acb90
150 changed files with 23414 additions and 3744 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

105
Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml Normal file
View File

@ -0,0 +1,105 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,sm8550-dispcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display Clock & Reset Controller for SM8550
maintainers:
- Bjorn Andersson <andersson@kernel.org>
- Neil Armstrong <neil.armstrong@linaro.org>
description: |
Qualcomm display clock control module provides the clocks, resets and power
domains on SM8550.
See also:: include/dt-bindings/clock/qcom,sm8550-dispcc.h
properties:
compatible:
enum:
- qcom,sm8550-dispcc
clocks:
items:
- description: Board XO source
- description: Board Always On XO source
- description: Display's AHB clock
- description: sleep clock
- description: Byte clock from DSI PHY0
- description: Pixel clock from DSI PHY0
- description: Byte clock from DSI PHY1
- description: Pixel clock from DSI PHY1
- description: Link clock from DP PHY0
- description: VCO DIV clock from DP PHY0
- description: Link clock from DP PHY1
- description: VCO DIV clock from DP PHY1
- description: Link clock from DP PHY2
- description: VCO DIV clock from DP PHY2
- description: Link clock from DP PHY3
- description: VCO DIV clock from DP PHY3
'#clock-cells':
const: 1
'#reset-cells':
const: 1
'#power-domain-cells':
const: 1
reg:
maxItems: 1
power-domains:
description:
A phandle and PM domain specifier for the MMCX power domain.
maxItems: 1
required-opps:
description:
A phandle to an OPP node describing required MMCX performance point.
maxItems: 1
required:
- compatible
- reg
- clocks
- '#clock-cells'
- '#reset-cells'
- '#power-domain-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,sm8550-gcc.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/power/qcom-rpmpd.h>
clock-controller@af00000 {
compatible = "qcom,sm8550-dispcc";
reg = <0x0af00000 0x10000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>,
<&gcc GCC_DISP_AHB_CLK>,
<&sleep_clk>,
<&dsi0_phy 0>,
<&dsi0_phy 1>,
<&dsi1_phy 0>,
<&dsi1_phy 1>,
<&dp0_phy 0>,
<&dp0_phy 1>,
<&dp1_phy 0>,
<&dp1_phy 1>,
<&dp2_phy 0>,
<&dp2_phy 1>,
<&dp3_phy 0>,
<&dp3_phy 1>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
power-domains = <&rpmhpd SM8550_MMCX>;
required-opps = <&rpmhpd_opp_low_svs>;
};
...

55
Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml Normal file
View File

@ -0,0 +1,55 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm TCSR Clock Controller on SM8550
maintainers:
- Bjorn Andersson <andersson@kernel.org>
description: |
Qualcomm TCSR clock control module provides the clocks, resets and
power domains on SM8550
See also:: include/dt-bindings/clock/qcom,sm8550-tcsr.h
properties:
compatible:
items:
- const: qcom,sm8550-tcsr
- const: syscon
clocks:
items:
- description: TCXO pad clock
reg:
maxItems: 1
'#clock-cells':
const: 1
'#reset-cells':
const: 1
required:
- compatible
- clocks
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,rpmh.h>
clock-controller@1fc0000 {
compatible = "qcom,sm8550-tcsr", "syscon";
reg = <0x1fc0000 0x30000>;
clocks = <&rpmhcc RPMH_CXO_CLK>;
#clock-cells = <1>;
#reset-cells = <1>;
};
...

139
Documentation/devicetree/bindings/interconnect/qcom,sm8550-rpmh.yaml Normal file
View File

@ -0,0 +1,139 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,sm8550-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPMh Network-On-Chip Interconnect on SM8550
maintainers:
- Abel Vesa <abel.vesa@linaro.org>
- Neil Armstrong <neil.armstrong@linaro.org>
description: |
RPMh interconnect providers support system bandwidth requirements through
RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
able to communicate with the BCM through the Resource State Coordinator (RSC)
associated with each execution environment. Provider nodes must point to at
least one RPMh device child node pertaining to their RSC and each provider
can map to multiple RPMh resources.
See also:: include/dt-bindings/interconnect/qcom,sm8550-rpmh.h
properties:
compatible:
enum:
- qcom,sm8550-aggre1-noc
- qcom,sm8550-aggre2-noc
- qcom,sm8550-clk-virt
- qcom,sm8550-cnoc-main
- qcom,sm8550-config-noc
- qcom,sm8550-gem-noc
- qcom,sm8550-lpass-ag-noc
- qcom,sm8550-lpass-lpiaon-noc
- qcom,sm8550-lpass-lpicx-noc
- qcom,sm8550-mc-virt
- qcom,sm8550-mmss-noc
- qcom,sm8550-nsp-noc
- qcom,sm8550-pcie-anoc
- qcom,sm8550-system-noc
reg:
maxItems: 1
clocks:
minItems: 1
maxItems: 2
allOf:
- $ref: qcom,rpmh-common.yaml#
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8550-clk-virt
- qcom,sm8550-mc-virt
then:
properties:
reg: false
else:
required:
- reg
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8550-pcie-anoc
then:
properties:
clocks:
items:
- description: aggre-NOC PCIe AXI clock
- description: cfg-NOC PCIe a-NOC AHB clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8550-aggre1-noc
then:
properties:
clocks:
items:
- description: aggre UFS PHY AXI clock
- description: aggre USB3 PRIM AXI clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8550-aggre2-noc
then:
properties:
clocks:
items:
- description: RPMH CC IPA clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8550-aggre1-noc
- qcom,sm8550-aggre2-noc
- qcom,sm8550-pcie-anoc
then:
required:
- clocks
else:
properties:
clocks: false
required:
- compatible
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,sm8550-gcc.h>
clk_virt: interconnect-0 {
compatible = "qcom,sm8550-clk-virt";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre1_noc: interconnect@16e0000 {
compatible = "qcom,sm8550-aggre1-noc";
reg = <0x016e0000 0x14400>;
#interconnect-cells = <2>;
clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
qcom,bcm-voters = <&apps_bcm_voter>;
};

15
arch/arm64/boot/dts/qcom/Makefile
View File

@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c2.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-acer-a1-724.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-alcatel-idol347.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-asus-z00l.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-gplus-fl8005a.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-huawei-g7.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-longcheer-l8150.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-longcheer-l8910.dtb
@ -19,9 +20,17 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-a5u-eur.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-e5.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-e7.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-grandmax.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-gt510.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-gt58.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-j5.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-j5x.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-serranove.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-wingtech-wt88047.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8953-motorola-potter.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8953-xiaomi-daisy.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8953-xiaomi-mido.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8953-xiaomi-tissot.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8953-xiaomi-vince.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8956-sony-xperia-loire-kugo.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8956-sony-xperia-loire-suzu.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8992-lg-bullhead-rev-10.dtb
@ -122,17 +131,21 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-villager-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-villager-r1-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-zombie.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-zombie-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-zombie-nvme.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-zombie-nvme-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd-r3.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-crd.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-lenovo-thinkpad-x13s.dtb
dtb-$(CONFIG_ARCH_QCOM) += sda660-inforce-ifc6560.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm450-motorola-ali.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-voyager.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm632-fairphone-fp3.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm632-motorola-ocean.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm636-sony-xperia-ganges-mermaid.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm660-xiaomi-lavender.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm670-google-sargo.dtb
@ -157,6 +170,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-shift-axolotl.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm850-samsung-w737.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm4250-oneplus-billie2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6115p-lenovo-j606f.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6125-sony-xperia-seine-pdx201.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6350-sony-xperia-lena-pdx213.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6375-sony-xperia-murray-pdx225.dtb
@ -179,3 +193,4 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8450-hdk.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8450-qrd.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8450-sony-xperia-nagara-pdx223.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8450-sony-xperia-nagara-pdx224.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8550-mtp.dtb

4
arch/arm64/boot/dts/qcom/apq8016-sbc.dts
View File

@ -169,10 +169,6 @@
};
};
&blsp_dma {
status = "okay";
};
&blsp_i2c2 {
/* On Low speed expansion */
status = "okay";

558
arch/arm64/boot/dts/qcom/ipq6018.dtsi
View File

@ -87,6 +87,12 @@
};
};
firmware {
scm {
compatible = "qcom,scm-ipq6018", "qcom,scm";
};
};
cpu_opp_table: opp-table-cpu {
compatible = "operating-points-v2";
opp-shared;
@ -96,26 +102,31 @@
opp-microvolt = <725000>;
clock-latency-ns = <200000>;
};
opp-1056000000 {
opp-hz = /bits/ 64 <1056000000>;
opp-microvolt = <787500>;
clock-latency-ns = <200000>;
};
opp-1320000000 {
opp-hz = /bits/ 64 <1320000000>;
opp-microvolt = <862500>;
clock-latency-ns = <200000>;
};
opp-1440000000 {
opp-hz = /bits/ 64 <1440000000>;
opp-microvolt = <925000>;
clock-latency-ns = <200000>;
};
opp-1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <987500>;
clock-latency-ns = <200000>;
};
opp-1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1062500>;
@ -123,16 +134,9 @@
};
};
firmware {
scm {
compatible = "qcom,scm-ipq6018", "qcom,scm";
};
};
pmuv8: pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_HIGH)>;
interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
psci: psci {
@ -146,7 +150,7 @@
ranges;
rpm_msg_ram: memory@60000 {
reg = <0x0 0x60000 0x0 0x6000>;
reg = <0x0 0x00060000 0x0 0x6000>;
no-map;
};
@ -166,6 +170,28 @@
};
};
rpm-glink {
compatible = "qcom,glink-rpm";
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,rpm-msg-ram = <&rpm_msg_ram>;
mboxes = <&apcs_glb 0>;
rpm_requests: glink-channel {
compatible = "qcom,rpm-ipq6018";
qcom,glink-channels = "rpm_requests";
regulators {
compatible = "qcom,rpm-mp5496-regulators";
ipq6018_s2: s2 {
regulator-min-microvolt = <725000>;
regulator-max-microvolt = <1062500>;
regulator-always-on;
};
};
};
};
smem {
compatible = "qcom,smem";
memory-region = <&smem_region>;
@ -179,9 +205,105 @@
dma-ranges;
compatible = "simple-bus";
qusb_phy_1: qusb@59000 {
compatible = "qcom,ipq6018-qusb2-phy";
reg = <0x0 0x00059000 0x0 0x180>;
#phy-cells = <0>;
clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
<&xo>;
clock-names = "cfg_ahb", "ref";
resets = <&gcc GCC_QUSB2_1_PHY_BCR>;
status = "disabled";
};
ssphy_0: ssphy@78000 {
compatible = "qcom,ipq6018-qmp-usb3-phy";
reg = <0x0 0x00078000 0x0 0x1c4>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
clocks = <&gcc GCC_USB0_AUX_CLK>,
<&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>;
clock-names = "aux", "cfg_ahb", "ref";
resets = <&gcc GCC_USB0_PHY_BCR>,
<&gcc GCC_USB3PHY_0_PHY_BCR>;
reset-names = "phy","common";
status = "disabled";
usb0_ssphy: phy@78200 {
reg = <0x0 0x00078200 0x0 0x130>, /* Tx */
<0x0 0x00078400 0x0 0x200>, /* Rx */
<0x0 0x00078800 0x0 0x1f8>, /* PCS */
<0x0 0x00078600 0x0 0x044>; /* PCS misc */
#phy-cells = <0>;
#clock-cells = <0>;
clocks = <&gcc GCC_USB0_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "gcc_usb0_pipe_clk_src";
};
};
qusb_phy_0: qusb@79000 {
compatible = "qcom,ipq6018-qusb2-phy";
reg = <0x0 0x00079000 0x0 0x180>;
#phy-cells = <0>;
clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
<&xo>;
clock-names = "cfg_ahb", "ref";
resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
status = "disabled";
};
pcie_phy: phy@84000 {
compatible = "qcom,ipq6018-qmp-pcie-phy";
reg = <0x0 0x00084000 0x0 0x1bc>; /* Serdes PLL */
status = "disabled";
#address-cells = <2>;
#size-cells = <2>;
ranges;
clocks = <&gcc GCC_PCIE0_AUX_CLK>,
<&gcc GCC_PCIE0_AHB_CLK>;
clock-names = "aux", "cfg_ahb";
resets = <&gcc GCC_PCIE0_PHY_BCR>,
<&gcc GCC_PCIE0PHY_PHY_BCR>;
reset-names = "phy",
"common";
pcie_phy0: phy@84200 {
reg = <0x0 0x00084200 0x0 0x16c>, /* Serdes Tx */
<0x0 0x00084400 0x0 0x200>, /* Serdes Rx */
<0x0 0x00084800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */
<0x0 0x00084c00 0x0 0xf4>; /* pcs_misc */
#phy-cells = <0>;
clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "gcc_pcie0_pipe_clk_src";
#clock-cells = <0>;
};
};
mdio: mdio@90000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio";
reg = <0x0 0x00090000 0x0 0x64>;
clocks = <&gcc GCC_MDIO_AHB_CLK>;
clock-names = "gcc_mdio_ahb_clk";
status = "disabled";
};
prng: qrng@e1000 {
compatible = "qcom,prng-ee";
reg = <0x0 0xe3000 0x0 0x1000>;
reg = <0x0 0x000e3000 0x0 0x1000>;
clocks = <&gcc GCC_PRNG_AHB_CLK>;
clock-names = "core";
};
@ -201,8 +323,8 @@
compatible = "qcom,crypto-v5.1";
reg = <0x0 0x0073a000 0x0 0x6000>;
clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
<&gcc GCC_CRYPTO_AXI_CLK>,
<&gcc GCC_CRYPTO_CLK>;
<&gcc GCC_CRYPTO_AXI_CLK>,
<&gcc GCC_CRYPTO_CLK>;
clock-names = "iface", "bus", "core";
dmas = <&cryptobam 2>, <&cryptobam 3>;
dma-names = "rx", "tx";
@ -257,6 +379,41 @@
reg = <0x0 0x01937000 0x0 0x21000>;
};
usb2: usb@70f8800 {
compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
reg = <0x0 0x070f8800 0x0 0x400>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
clocks = <&gcc GCC_USB1_MASTER_CLK>,
<&gcc GCC_USB1_SLEEP_CLK>,
<&gcc GCC_USB1_MOCK_UTMI_CLK>;
clock-names = "core",
"sleep",
"mock_utmi";
assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>,
<&gcc GCC_USB1_MOCK_UTMI_CLK>;
assigned-clock-rates = <133330000>,
<24000000>;
resets = <&gcc GCC_USB1_BCR>;
status = "disabled";
dwc_1: usb@7000000 {
compatible = "snps,dwc3";
reg = <0x0 0x07000000 0x0 0xcd00>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
phys = <&qusb_phy_1>;
phy-names = "usb2-phy";
tx-fifo-resize;
snps,is-utmi-l1-suspend;
snps,hird-threshold = /bits/ 8 <0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
dr_mode = "host";
};
};
blsp_dma: dma-controller@7884000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x0 0x07884000 0x0 0x2b000>;
@ -272,7 +429,7 @@
reg = <0x0 0x078b1000 0x0 0x200>;
interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
status = "disabled";
};
@ -285,7 +442,7 @@
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&blsp_dma 12>, <&blsp_dma 13>;
dma-names = "tx", "rx";
@ -300,7 +457,7 @@
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&blsp_dma 14>, <&blsp_dma 15>;
dma-names = "tx", "rx";
@ -358,24 +515,67 @@
clock-names = "core", "aon";
dmas = <&qpic_bam 0>,
<&qpic_bam 1>,
<&qpic_bam 2>;
<&qpic_bam 1>,
<&qpic_bam 2>;
dma-names = "tx", "rx", "cmd";
pinctrl-0 = <&qpic_pins>;
pinctrl-names = "default";
status = "disabled";
};
usb3: usb@8af8800 {
compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
reg = <0x0 0x08af8800 0x0 0x400>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
<&gcc GCC_USB0_MASTER_CLK>,
<&gcc GCC_USB0_SLEEP_CLK>,
<&gcc GCC_USB0_MOCK_UTMI_CLK>;
clock-names = "cfg_noc",
"core",
"sleep",
"mock_utmi";
assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
<&gcc GCC_USB0_MASTER_CLK>,
<&gcc GCC_USB0_MOCK_UTMI_CLK>;
assigned-clock-rates = <133330000>,
<133330000>,
<20000000>;
resets = <&gcc GCC_USB0_BCR>;
status = "disabled";
dwc_0: usb@8a00000 {
compatible = "snps,dwc3";
reg = <0x0 0x08a00000 0x0 0xcd00>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
phys = <&qusb_phy_0>, <&usb0_ssphy>;
phy-names = "usb2-phy", "usb3-phy";
clocks = <&xo>;
clock-names = "ref";
tx-fifo-resize;
snps,is-utmi-l1-suspend;
snps,hird-threshold = /bits/ 8 <0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
dr_mode = "host";
};
};
intc: interrupt-controller@b000000 {
compatible = "qcom,msm-qgic2";
#address-cells = <2>;
#size-cells = <2>;
interrupt-controller;
#interrupt-cells = <0x3>;
reg = <0x0 0x0b000000 0x0 0x1000>, /*GICD*/
<0x0 0x0b002000 0x0 0x1000>, /*GICC*/
<0x0 0x0b001000 0x0 0x1000>, /*GICH*/
<0x0 0x0b004000 0x0 0x1000>; /*GICV*/
reg = <0x0 0x0b000000 0x0 0x1000>, /*GICD*/
<0x0 0x0b002000 0x0 0x1000>, /*GICC*/
<0x0 0x0b001000 0x0 0x1000>, /*GICH*/
<0x0 0x0b004000 0x0 0x1000>; /*GICV*/
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
ranges = <0 0 0 0xb00a000 0 0xffd>;
@ -386,107 +586,6 @@
};
};
pcie_phy: phy@84000 {
compatible = "qcom,ipq6018-qmp-pcie-phy";
reg = <0x0 0x84000 0x0 0x1bc>; /* Serdes PLL */
status = "disabled";
#address-cells = <2>;
#size-cells = <2>;
ranges;
clocks = <&gcc GCC_PCIE0_AUX_CLK>,
<&gcc GCC_PCIE0_AHB_CLK>;
clock-names = "aux", "cfg_ahb";
resets = <&gcc GCC_PCIE0_PHY_BCR>,
<&gcc GCC_PCIE0PHY_PHY_BCR>;
reset-names = "phy",
"common";
pcie_phy0: phy@84200 {
reg = <0x0 0x84200 0x0 0x16c>, /* Serdes Tx */
<0x0 0x84400 0x0 0x200>, /* Serdes Rx */
<0x0 0x84800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */
<0x0 0x84c00 0x0 0xf4>; /* pcs_misc */
#phy-cells = <0>;
clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "gcc_pcie0_pipe_clk_src";
#clock-cells = <0>;
};
};
pcie0: pci@20000000 {
compatible = "qcom,pcie-ipq6018";
reg = <0x0 0x20000000 0x0 0xf1d>,
<0x0 0x20000f20 0x0 0xa8>,
<0x0 0x20001000 0x0 0x1000>,
<0x0 0x80000 0x0 0x4000>,
<0x0 0x20100000 0x0 0x1000>;
reg-names = "dbi", "elbi", "atu", "parf", "config";
device_type = "pci";
linux,pci-domain = <0>;
bus-range = <0x00 0xff>;
num-lanes = <1>;
max-link-speed = <3>;
#address-cells = <3>;
#size-cells = <2>;
phys = <&pcie_phy0>;
phy-names = "pciephy";
ranges = <0x81000000 0 0x20200000 0 0x20200000
0 0x10000>, /* downstream I/O */
<0x82000000 0 0x20220000 0 0x20220000
0 0xfde0000>; /* non-prefetchable memory */
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 75
IRQ_TYPE_LEVEL_HIGH>, /* int_a */
<0 0 0 2 &intc 0 78
IRQ_TYPE_LEVEL_HIGH>, /* int_b */
<0 0 0 3 &intc 0 79
IRQ_TYPE_LEVEL_HIGH>, /* int_c */
<0 0 0 4 &intc 0 83
IRQ_TYPE_LEVEL_HIGH>; /* int_d */
clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>,
<&gcc GCC_PCIE0_AXI_M_CLK>,
<&gcc GCC_PCIE0_AXI_S_CLK>,
<&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>,
<&gcc PCIE0_RCHNG_CLK>;
clock-names = "iface",
"axi_m",
"axi_s",
"axi_bridge",
"rchng";
resets = <&gcc GCC_PCIE0_PIPE_ARES>,
<&gcc GCC_PCIE0_SLEEP_ARES>,
<&gcc GCC_PCIE0_CORE_STICKY_ARES>,
<&gcc GCC_PCIE0_AXI_MASTER_ARES>,
<&gcc GCC_PCIE0_AXI_SLAVE_ARES>,
<&gcc GCC_PCIE0_AHB_ARES>,
<&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>,
<&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>;
reset-names = "pipe",
"sleep",
"sticky",
"axi_m",
"axi_s",
"ahb",
"axi_m_sticky",
"axi_s_sticky";
status = "disabled";
};
watchdog@b017000 {
compatible = "qcom,kpss-wdt";
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
@ -619,147 +718,68 @@
};
};
mdio: mdio@90000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio";
reg = <0x0 0x90000 0x0 0x64>;
clocks = <&gcc GCC_MDIO_AHB_CLK>;
clock-names = "gcc_mdio_ahb_clk";
status = "disabled";
};
pcie0: pci@20000000 {
compatible = "qcom,pcie-ipq6018";
reg = <0x0 0x20000000 0x0 0xf1d>,
<0x0 0x20000f20 0x0 0xa8>,
<0x0 0x20001000 0x0 0x1000>,
<0x0 0x80000 0x0 0x4000>,
<0x0 0x20100000 0x0 0x1000>;
reg-names = "dbi", "elbi", "atu", "parf", "config";
qusb_phy_1: qusb@59000 {
compatible = "qcom,ipq6018-qusb2-phy";
reg = <0x0 0x059000 0x0 0x180>;
#phy-cells = <0>;
clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
<&xo>;
clock-names = "cfg_ahb", "ref";
resets = <&gcc GCC_QUSB2_1_PHY_BCR>;
status = "disabled";
};
usb2: usb@70f8800 {
compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
reg = <0x0 0x070F8800 0x0 0x400>;
#address-cells = <2>;
device_type = "pci";
linux,pci-domain = <0>;
bus-range = <0x00 0xff>;
num-lanes = <1>;
max-link-speed = <3>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
clocks = <&gcc GCC_USB1_MASTER_CLK>,
<&gcc GCC_USB1_SLEEP_CLK>,
<&gcc GCC_USB1_MOCK_UTMI_CLK>;
clock-names = "core",
phys = <&pcie_phy0>;
phy-names = "pciephy";
ranges = <0x81000000 0 0x20200000 0 0x20200000 0 0x10000>,
<0x82000000 0 0x20220000 0 0x20220000 0 0xfde0000>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 75 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
<0 0 0 2 &intc 0 78 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
<0 0 0 3 &intc 0 79 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
<0 0 0 4 &intc 0 83 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>,
<&gcc GCC_PCIE0_AXI_M_CLK>,
<&gcc GCC_PCIE0_AXI_S_CLK>,
<&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>,
<&gcc PCIE0_RCHNG_CLK>;
clock-names = "iface",
"axi_m",
"axi_s",
"axi_bridge",
"rchng";
resets = <&gcc GCC_PCIE0_PIPE_ARES>,
<&gcc GCC_PCIE0_SLEEP_ARES>,
<&gcc GCC_PCIE0_CORE_STICKY_ARES>,
<&gcc GCC_PCIE0_AXI_MASTER_ARES>,
<&gcc GCC_PCIE0_AXI_SLAVE_ARES>,
<&gcc GCC_PCIE0_AHB_ARES>,
<&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>,
<&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>;
reset-names = "pipe",
"sleep",
"mock_utmi";
"sticky",
"axi_m",
"axi_s",
"ahb",
"axi_m_sticky",
"axi_s_sticky";
assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>,
<&gcc GCC_USB1_MOCK_UTMI_CLK>;
assigned-clock-rates = <133330000>,
<24000000>;
resets = <&gcc GCC_USB1_BCR>;
status = "disabled";
dwc_1: usb@7000000 {
compatible = "snps,dwc3";
reg = <0x0 0x7000000 0x0 0xcd00>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
phys = <&qusb_phy_1>;
phy-names = "usb2-phy";
tx-fifo-resize;
snps,is-utmi-l1-suspend;
snps,hird-threshold = /bits/ 8 <0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
dr_mode = "host";
};
};
ssphy_0: ssphy@78000 {
compatible = "qcom,ipq6018-qmp-usb3-phy";
reg = <0x0 0x78000 0x0 0x1C4>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
clocks = <&gcc GCC_USB0_AUX_CLK>,
<&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>;
clock-names = "aux", "cfg_ahb", "ref";
resets = <&gcc GCC_USB0_PHY_BCR>,
<&gcc GCC_USB3PHY_0_PHY_BCR>;
reset-names = "phy","common";
status = "disabled";
usb0_ssphy: phy@78200 {
reg = <0x0 0x00078200 0x0 0x130>, /* Tx */
<0x0 0x00078400 0x0 0x200>, /* Rx */
<0x0 0x00078800 0x0 0x1F8>, /* PCS */
<0x0 0x00078600 0x0 0x044>; /* PCS misc */
#phy-cells = <0>;
#clock-cells = <0>;
clocks = <&gcc GCC_USB0_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "gcc_usb0_pipe_clk_src";
};
};
qusb_phy_0: qusb@79000 {
compatible = "qcom,ipq6018-qusb2-phy";
reg = <0x0 0x079000 0x0 0x180>;
#phy-cells = <0>;
clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
<&xo>;
clock-names = "cfg_ahb", "ref";
resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
status = "disabled";
};
usb3: usb@8af8800 {
compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
reg = <0x0 0x8AF8800 0x0 0x400>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
<&gcc GCC_USB0_MASTER_CLK>,
<&gcc GCC_USB0_SLEEP_CLK>,
<&gcc GCC_USB0_MOCK_UTMI_CLK>;
clock-names = "cfg_noc",
"core",
"sleep",
"mock_utmi";
assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
<&gcc GCC_USB0_MASTER_CLK>,
<&gcc GCC_USB0_MOCK_UTMI_CLK>;
assigned-clock-rates = <133330000>,
<133330000>,
<20000000>;
resets = <&gcc GCC_USB0_BCR>;
status = "disabled";
dwc_0: usb@8a00000 {
compatible = "snps,dwc3";
reg = <0x0 0x8A00000 0x0 0xcd00>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
phys = <&qusb_phy_0>, <&usb0_ssphy>;
phy-names = "usb2-phy", "usb3-phy";
clocks = <&xo>;
clock-names = "ref";
tx-fifo-resize;
snps,is-utmi-l1-suspend;
snps,hird-threshold = /bits/ 8 <0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
dr_mode = "host";
};
};
};
@ -794,26 +814,4 @@
#interrupt-cells = <2>;
};
};
rpm-glink {
compatible = "qcom,glink-rpm";
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,rpm-msg-ram = <&rpm_msg_ram>;
mboxes = <&apcs_glb 0>;
rpm_requests: glink-channel {
compatible = "qcom,rpm-ipq6018";
qcom,glink-channels = "rpm_requests";
regulators {
compatible = "qcom,rpm-mp5496-regulators";
ipq6018_s2: s2 {
regulator-min-microvolt = <725000>;
regulator-max-microvolt = <1062500>;
regulator-always-on;
};
};
};
};
};

66
arch/arm64/boot/dts/qcom/ipq8074.dtsi
View File

@ -137,7 +137,7 @@
#clock-cells = <0>;
clocks = <&gcc GCC_USB1_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "gcc_usb1_pipe_clk_src";
clock-output-names = "usb3phy_1_cc_pipe_clk";
};
};
@ -180,7 +180,7 @@
#clock-cells = <0>;
clocks = <&gcc GCC_USB0_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "gcc_usb0_pipe_clk_src";
clock-output-names = "usb3phy_0_cc_pipe_clk";
};
};
@ -197,9 +197,9 @@
status = "disabled";
};
pcie_qmp0: phy@86000 {
compatible = "qcom,ipq8074-qmp-pcie-phy";
reg = <0x00086000 0x1c4>;
pcie_qmp0: phy@84000 {
compatible = "qcom,ipq8074-qmp-gen3-pcie-phy";
reg = <0x00084000 0x1bc>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@ -213,15 +213,16 @@
"common";
status = "disabled";
pcie_phy0: phy@86200 {
reg = <0x86200 0x16c>,
<0x86400 0x200>,
<0x86800 0x4f4>;
pcie_phy0: phy@84200 {
reg = <0x84200 0x16c>,
<0x84400 0x200>,
<0x84800 0x1f0>,
<0x84c00 0xf4>;
#phy-cells = <0>;
#clock-cells = <0>;
clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "pcie_0_pipe_clk";
clock-output-names = "pcie20_phy0_pipe_clk";
};
};
@ -242,19 +243,19 @@
status = "disabled";
pcie_phy1: phy@8e200 {
reg = <0x8e200 0x16c>,
reg = <0x8e200 0x130>,
<0x8e400 0x200>,
<0x8e800 0x4f4>;
<0x8e800 0x1f8>;
#phy-cells = <0>;
#clock-cells = <0>;
clocks = <&gcc GCC_PCIE1_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "pcie_1_pipe_clk";
clock-output-names = "pcie20_phy1_pipe_clk";
};
};
mdio: mdio@90000 {
compatible = "qcom,ipq4019-mdio";
compatible = "qcom,ipq8074-mdio", "qcom,ipq4019-mdio";
reg = <0x00090000 0x64>;
#address-cells = <1>;
#size-cells = <0>;
@ -765,6 +766,7 @@
linux,pci-domain = <1>;
bus-range = <0x00 0xff>;
num-lanes = <1>;
max-link-speed = <2>;
#address-cells = <3>;
#size-cells = <2>;
@ -772,9 +774,9 @@
phy-names = "pciephy";
ranges = <0x81000000 0 0x10200000 0x10200000
0 0x100000 /* downstream I/O */
0x82000000 0 0x10300000 0x10300000
0 0xd00000>; /* non-prefetchable memory */
0 0x10000>, /* downstream I/O */
<0x82000000 0 0x10220000 0x10220000
0 0xfde0000>; /* non-prefetchable memory */
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
@ -817,16 +819,18 @@
};
pcie0: pci@20000000 {
compatible = "qcom,pcie-ipq8074";
compatible = "qcom,pcie-ipq8074-gen3";
reg = <0x20000000 0xf1d>,
<0x20000f20 0xa8>,
<0x00080000 0x2000>,
<0x20001000 0x1000>,
<0x00080000 0x4000>,
<0x20100000 0x1000>;
reg-names = "dbi", "elbi", "parf", "config";
reg-names = "dbi", "elbi", "atu", "parf", "config";
device_type = "pci";
linux,pci-domain = <0>;
bus-range = <0x00 0xff>;
num-lanes = <1>;
max-link-speed = <3>;
#address-cells = <3>;
#size-cells = <2>;
@ -834,9 +838,9 @@
phy-names = "pciephy";
ranges = <0x81000000 0 0x20200000 0x20200000
0 0x100000 /* downstream I/O */
0x82000000 0 0x20300000 0x20300000
0 0xd00000>; /* non-prefetchable memory */
0 0x10000>, /* downstream I/O */
<0x82000000 0 0x20220000 0x20220000
0 0xfde0000>; /* non-prefetchable memory */
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
@ -854,28 +858,30 @@
clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>,
<&gcc GCC_PCIE0_AXI_M_CLK>,
<&gcc GCC_PCIE0_AXI_S_CLK>,
<&gcc GCC_PCIE0_AHB_CLK>,
<&gcc GCC_PCIE0_AUX_CLK>;
<&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>,
<&gcc GCC_PCIE0_RCHNG_CLK>;
clock-names = "iface",
"axi_m",
"axi_s",
"ahb",
"aux";
"axi_bridge",
"rchng";
resets = <&gcc GCC_PCIE0_PIPE_ARES>,
<&gcc GCC_PCIE0_SLEEP_ARES>,
<&gcc GCC_PCIE0_CORE_STICKY_ARES>,
<&gcc GCC_PCIE0_AXI_MASTER_ARES>,
<&gcc GCC_PCIE0_AXI_SLAVE_ARES>,
<&gcc GCC_PCIE0_AHB_ARES>,
<&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>;
<&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>,
<&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>;
reset-names = "pipe",
"sleep",
"sticky",
"axi_m",
"axi_s",
"ahb",
"axi_m_sticky";
"axi_m_sticky",
"axi_s_sticky";
status = "disabled";
};
};

299
arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts Normal file
View File

@ -0,0 +1,299 @@
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
#include "msm8916-pm8916.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "GPLUS FL8005A";
compatible = "gplus,fl8005a", "qcom,msm8916";
chassis-type = "tablet";
aliases {
serial0 = &blsp1_uart2;
};
chosen {
stdout-path = "serial0";
};
flash-led-controller {
/* Actually qcom,leds-gpio-flash */
compatible = "sgmicro,sgm3140";
enable-gpios = <&msmgpio 31 GPIO_ACTIVE_HIGH>;
flash-gpios = <&msmgpio 32 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&camera_flash_default>;
pinctrl-names = "default";
flash_led: led {
function = LED_FUNCTION_FLASH;
color = <LED_COLOR_ID_WHITE>;
flash-max-timeout-us = <250000>;
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&gpio_keys_default>;
pinctrl-names = "default";
button-volume-up {
label = "Volume Up";
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-0 = <&gpio_leds_default>;
pinctrl-names = "default";
led-red {
function = LED_FUNCTION_CHARGING;
color = <LED_COLOR_ID_RED>;
gpios = <&msmgpio 117 GPIO_ACTIVE_HIGH>;
retain-state-suspended;
};
led-green {
function = LED_FUNCTION_CHARGING;
color = <LED_COLOR_ID_GREEN>;
gpios = <&msmgpio 118 GPIO_ACTIVE_HIGH>;
retain-state-suspended;
};
};
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&msmgpio 110 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&usb_id_default>;
pinctrl-names = "default";
};
};
&blsp_i2c5 {
status = "okay";
touchscreen@38 {
/* Actually ft5402 */
compatible = "edt,edt-ft5406";
reg = <0x38>;
interrupt-parent = <&msmgpio>;
interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&msmgpio 12 GPIO_ACTIVE_LOW>;
vcc-supply = <&pm8916_l17>;
iovcc-supply = <&pm8916_l6>;
touchscreen-size-x = <800>;
touchscreen-size-y = <500>;
touchscreen-inverted-x;
touchscreen-swapped-x-y;
pinctrl-0 = <&touchscreen_default>;
pinctrl-names = "default";
};
};
&blsp1_uart2 {
status = "okay";
};
&pm8916_resin {
linux,code = <KEY_VOLUMEDOWN>;
status = "okay";
};
&pm8916_vib {
status = "okay";
};
&pronto {
status = "okay";
};
&sdhc_1 {
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
pinctrl-names = "default", "sleep";
status = "okay";
};
&sdhc_2 {
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;
pinctrl-names = "default", "sleep";
cd-gpios = <&msmgpio 38 GPIO_ACTIVE_LOW>;
status = "okay";
};
&usb {
extcon = <&usb_id>, <&usb_id>;
status = "okay";
};
&usb_hs_phy {
extcon = <&usb_id>;
};
&smd_rpm_regulators {
vdd_l1_l2_l3-supply = <&pm8916_s3>;
vdd_l4_l5_l6-supply = <&pm8916_s4>;
vdd_l7-supply = <&pm8916_s4>;
s3 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1300000>;
};
s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2100000>;
};
l1 {
regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1225000>;
};
l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
l4 {
regulator-min-microvolt = <2050000>;
regulator-max-microvolt = <2050000>;
};
l5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l8 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2900000>;
};
l9 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
l10 {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2800000>;
};
l11 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
regulator-system-load = <200000>;
regulator-allow-set-load;
};
l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
};
l13 {
regulator-min-microvolt = <3075000>;
regulator-max-microvolt = <3075000>;
};
l14 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l15 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l16 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l17 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
};
l18 {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2700000>;
};
};
&msmgpio {
camera_flash_default: camera-flash-default-state {
pins = "gpio31", "gpio32";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
gpio_keys_default: gpio-keys-default-state {
pins = "gpio107";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
gpio_leds_default: gpio-led-default-state {
pins = "gpio117", "gpio118";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
touchscreen_default: touchscreen-default-state {
reset-pins {
pins = "gpio12";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
touchscreen-pins {
pins = "gpio13";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
usb_id_default: usb-id-default-state {
pins = "gpio110";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};

2
arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi
View File

@ -434,7 +434,7 @@
bias-pull-down;
};
motor_en_default: motor-en-default-stae {
motor_en_default: motor-en-default-state {
pins = "gpio76";
function = "gpio";

6
arch/arm64/boot/dts/qcom/msm8916-samsung-grandmax.dts
View File

@ -29,8 +29,12 @@
gpio-leds {
compatible = "gpio-leds";
keyled {
led-keyled {
function = LED_FUNCTION_KBD_BACKLIGHT;
color = <LED_COLOR_ID_WHITE>;
gpios = <&msmgpio 60 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&gpio_leds_default>;
};

296
arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi Normal file
View File

@ -0,0 +1,296 @@
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
#include "msm8916-pm8916.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
aliases {
serial0 = &blsp1_uart2;
};
chosen {
stdout-path = "serial0";
};
reserved-memory {
/* Additional memory used by Samsung firmware modifications */
tz-apps@85500000 {
reg = <0x0 0x85500000 0x0 0xb00000>;
no-map;
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&gpio_keys_default>;
pinctrl-names = "default";
label = "GPIO Buttons";
volume-up-button {
label = "Volume Up";
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
home-button {
label = "Home";
gpios = <&msmgpio 109 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
};
};
gpio-hall-sensor {
compatible = "gpio-keys";
pinctrl-0 = <&gpio_hall_sensor_default>;
pinctrl-names = "default";
label = "GPIO Hall Effect Sensor";
hall-sensor-switch {
label = "Hall Effect Sensor";
gpios = <&msmgpio 52 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_SW>;
linux,code = <SW_LID>;
linux,can-disable;
};
};
};
&blsp_i2c4 {
status = "okay";
fuelgauge@36 {
compatible = "maxim,max77849-battery";
reg = <0x36>;
maxim,rsns-microohm = <10000>;
maxim,over-heat-temp = <600>;
maxim,over-volt = <4400>;
interrupt-parent = <&msmgpio>;
interrupts = <121 IRQ_TYPE_EDGE_FALLING>;
pinctrl-0 = <&fuelgauge_int_default>;
pinctrl-names = "default";
};
};
&blsp_i2c2 {
status = "okay";
light-sensor@10 {
compatible = "capella,cm3323";
reg = <0x10>;
};
accelerometer@1d {
compatible = "st,lis2hh12";
reg = <0x1d>;
vdd-supply = <&pm8916_l17>;
vddio-supply = <&pm8916_l5>;
interrupt-parent = <&msmgpio>;
interrupts = <115 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "INT1";
st,drdy-int-pin = <1>;
mount-matrix = "0", "1", "0",
"-1", "0", "0",
"0", "0", "1";
pinctrl-0 = <&accel_int_default>;
pinctrl-names = "default";
};
};
&blsp1_uart2 {
status = "okay";
};
&pm8916_resin {
linux,code = <KEY_VOLUMEDOWN>;
status = "okay";
};
/* FIXME: Replace with MAX77849 MUIC when driver is available */
&pm8916_usbin {
status = "okay";
};
&pronto {
status = "okay";
iris {
compatible = "qcom,wcn3660b";
};
};
&sdhc_1 {
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
pinctrl-names = "default", "sleep";
status = "okay";
};
&sdhc_2 {
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
pinctrl-names = "default", "sleep";
cd-gpios = <&msmgpio 38 GPIO_ACTIVE_LOW>;
status = "okay";
};
&usb {
dr_mode = "peripheral";
extcon = <&pm8916_usbin>;
status = "okay";
};
&usb_hs_phy {
extcon = <&pm8916_usbin>;
};
&smd_rpm_regulators {
vdd_l1_l2_l3-supply = <&pm8916_s3>;
vdd_l4_l5_l6-supply = <&pm8916_s4>;
vdd_l7-supply = <&pm8916_s4>;
s3 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1300000>;
};
s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2100000>;
};
l1 {
regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1225000>;
};
l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
l4 {
regulator-min-microvolt = <2050000>;
regulator-max-microvolt = <2050000>;
};
l5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l8 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2900000>;
};
l9 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
l10 {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2800000>;
};
l11 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
regulator-system-load = <200000>;
regulator-allow-set-load;
};
l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
};
l13 {
regulator-min-microvolt = <3075000>;
regulator-max-microvolt = <3075000>;
};
l14 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l15 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l16 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l17 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
};
l18 {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2700000>;
};
};
&msmgpio {
accel_int_default: accel-int-default-state {
pins = "gpio115";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
fuelgauge_int_default: fuelgauge-int-default-state {
pins = "gpio121";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
gpio_keys_default: gpio-keys-default-state {
pins = "gpio107", "gpio109";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
gpio_hall_sensor_default: gpio-hall-sensor-default-state {
pins = "gpio52";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
};

113
arch/arm64/boot/dts/qcom/msm8916-samsung-gt510.dts Normal file
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@ -0,0 +1,113 @@
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
#include "msm8916-samsung-gt5-common.dtsi"
/ {
model = "Samsung Galaxy Tab A 9.7 (2015)";
compatible = "samsung,gt510", "qcom,msm8916";
chassis-type = "tablet";
clk_pwm: pwm {
compatible = "clk-pwm";
#pwm-cells = <2>;
clocks = <&gcc GCC_GP2_CLK>;
pinctrl-0 = <&motor_pwm_default>;
pinctrl-names = "default";
};
reg_motor_vdd: regulator-motor-vdd {
compatible = "regulator-fixed";
regulator-name = "motor_vdd";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
gpio = <&msmgpio 76 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&motor_en_default>;
pinctrl-names = "default";
};
reg_tsp_1p8v: regulator-tsp-1p8v {
compatible = "regulator-fixed";
regulator-name = "tsp_1p8v";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&msmgpio 73 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&tsp_en_default>;
pinctrl-names = "default";
};
reg_tsp_3p3v: regulator-tsp-3p3v {
compatible = "regulator-fixed";
regulator-name = "tsp_3p3v";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&msmgpio 73 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vibrator {
compatible = "pwm-vibrator";
pwms = <&clk_pwm 0 100000>;
pwm-names = "enable";
vcc-supply = <&reg_motor_vdd>;
};
};
&blsp_i2c5 {
status = "okay";
touchscreen@4a {
compatible = "atmel,maxtouch";
reg = <0x4a>;
interrupt-parent = <&msmgpio>;
interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&reg_tsp_1p8v>;
vdda-supply = <&reg_tsp_3p3v>;
reset-gpios = <&msmgpio 114 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&tsp_int_rst_default>;
pinctrl-names = "default";
};
};
&msmgpio {
motor_en_default: motor-en-default-state {
pins = "gpio76";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
motor_pwm_default: motor-pwm-default-state {
pins = "gpio50";
function = "gcc_gp2_clk_a";
};
tsp_en_default: tsp-en-default-state {
pins = "gpio73";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
tsp_int_rst_default: tsp-int-rst-default-state {
pins = "gpio13", "gpio114";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
};

75
arch/arm64/boot/dts/qcom/msm8916-samsung-gt58.dts Normal file
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@ -0,0 +1,75 @@
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
#include "msm8916-samsung-gt5-common.dtsi"
/ {
model = "Samsung Galaxy Tab A 8.0 (2015)";
compatible = "samsung,gt58", "qcom,msm8916";
chassis-type = "tablet";
reg_vdd_tsp: regulator-vdd-tsp {
compatible = "regulator-fixed";
regulator-name = "vdd_tsp";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&msmgpio 73 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&reg_tsp_en_default>;
pinctrl-names = "default";
};
vibrator {
compatible = "gpio-vibrator";
enable-gpios = <&msmgpio 76 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&vibrator_en_default>;
pinctrl-names = "default";
};
};
&blsp_i2c5 {
status = "okay";
touchscreen@20 {
compatible = "zinitix,bt532";
reg = <0x20>;
interrupt-parent = <&msmgpio>;
interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
touchscreen-size-x = <768>;
touchscreen-size-y = <1024>;
vcca-supply = <&reg_vdd_tsp>;
vdd-supply = <&pm8916_l6>;
pinctrl-0 = <&tsp_int_default>;
pinctrl-names = "default";
};
};
&msmgpio {
reg_tsp_en_default: reg-tsp-en-default-state {
pins = "gpio73";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
tsp_int_default: tsp-int-default-state {
pins = "gpio13";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
vibrator_en_default: vibrator-en-default-state {
pins = "gpio76";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
};

262
arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi Normal file
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@ -0,0 +1,262 @@
// SPDX-License-Identifier: GPL-2.0-only
#include "msm8916-pm8916.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
aliases {
serial0 = &blsp1_uart2;
};
chosen {
stdout-path = "serial0";
};
reserved-memory {
/* Additional memory used by Samsung firmware modifications */
tz-apps@85500000 {
reg = <0x0 0x85500000 0x0 0xb00000>;
no-map;
};
};
gpio_hall_sensor: gpio-hall-sensor {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&gpio_hall_sensor_default>;
label = "GPIO Hall Effect Sensor";
event-hall-sensor {
label = "Hall Effect Sensor";
gpios = <&msmgpio 52 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_SW>;
linux,code = <SW_LID>;
linux,can-disable;
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&gpio_keys_default>;
label = "GPIO Buttons";
button-volume-up {
label = "Volume Up";
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
button-home {
label = "Home Key";
gpios = <&msmgpio 109 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
};
};
i2c_muic: i2c-muic {
compatible = "i2c-gpio";
sda-gpios = <&msmgpio 105 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
scl-gpios = <&msmgpio 106 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
pinctrl-names = "default";
pinctrl-0 = <&muic_i2c_default>;
#address-cells = <1>;
#size-cells = <0>;
muic: extcon@25 {
compatible = "siliconmitus,sm5703-muic";
reg = <0x25>;
interrupt-parent = <&msmgpio>;
interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&muic_int_default>;
};
};
};
&blsp1_uart2 {
status = "okay";
};
&pm8916_resin {
status = "okay";
linux,code = <KEY_VOLUMEDOWN>;
};
&pronto {
status = "okay";
};
&sdhc_1 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
};
&sdhc_2 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&msmgpio 38 GPIO_ACTIVE_LOW>;
};
&usb {
extcon = <&muic>, <&muic>;
status = "okay";
};
&usb_hs_phy {
extcon = <&muic>;
};
&smd_rpm_regulators {
vdd_l1_l2_l3-supply = <&pm8916_s3>;
vdd_l4_l5_l6-supply = <&pm8916_s4>;
vdd_l7-supply = <&pm8916_s4>;
s3 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1300000>;
};
s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2100000>;
};
l1 {
regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1225000>;
};
l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
l4 {
regulator-min-microvolt = <2050000>;
regulator-max-microvolt = <2050000>;
};
l5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l8 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2900000>;
};
l9 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
l10 {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2800000>;
};
l11 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
regulator-allow-set-load;
regulator-system-load = <200000>;
};
l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
};
l13 {
regulator-min-microvolt = <3075000>;
regulator-max-microvolt = <3075000>;
};
l14 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l15 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l16 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l17 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
};
l18 {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2700000>;
};
};
&msmgpio {
gpio_hall_sensor_default: gpio-hall-sensor-default-state {
pins = "gpio52";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
gpio_keys_default: gpio-keys-default-state {
pins = "gpio107", "gpio109";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
muic_i2c_default: muic-i2c-default-state {
pins = "gpio105", "gpio106";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
muic_int_default: muic-int-default-state {
pins = "gpio12";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
};

196
arch/arm64/boot/dts/qcom/msm8916-samsung-j5.dts
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@ -2,208 +2,14 @@
/dts-v1/;
#include "msm8916-pm8916.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include "msm8916-samsung-j5-common.dtsi"
/ {
model = "Samsung Galaxy J5 (2015)";
compatible = "samsung,j5", "qcom,msm8916";
chassis-type = "handset";
aliases {
serial0 = &blsp1_uart2;
};
chosen {
stdout-path = "serial0";
};
reserved-memory {
/* Additional memory used by Samsung firmware modifications */
tz-apps@85500000 {
reg = <0x0 0x85500000 0x0 0xb00000>;
no-map;
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&gpio_keys_default>;
label = "GPIO Buttons";
button-volume-up {
label = "Volume Up";
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
button-home {
label = "Home Key";
gpios = <&msmgpio 109 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
};
};
};
&blsp1_uart2 {
status = "okay";
};
&pm8916_resin {
status = "okay";
linux,code = <KEY_VOLUMEDOWN>;
};
/* FIXME: Replace with SM5703 MUIC when driver is available */
&pm8916_usbin {
status = "okay";
};
&pronto {
status = "okay";
};
&sdhc_1 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
};
&sdhc_2 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&msmgpio 38 GPIO_ACTIVE_LOW>;
};
&usb {
status = "okay";
dr_mode = "peripheral";
extcon = <&pm8916_usbin>;
};
&usb_hs_phy {
extcon = <&pm8916_usbin>;
qcom,init-seq = /bits/ 8 <0x1 0x19 0x2 0x0b>;
};
&smd_rpm_regulators {
vdd_l1_l2_l3-supply = <&pm8916_s3>;
vdd_l4_l5_l6-supply = <&pm8916_s4>;
vdd_l7-supply = <&pm8916_s4>;
s3 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1300000>;
};
s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2100000>;
};
l1 {
regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1225000>;
};
l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
l4 {
regulator-min-microvolt = <2050000>;
regulator-max-microvolt = <2050000>;
};
l5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l8 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2900000>;
};
l9 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
l10 {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2800000>;
};
l11 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
regulator-allow-set-load;
regulator-system-load = <200000>;
};
l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
};
l13 {
regulator-min-microvolt = <3075000>;
regulator-max-microvolt = <3075000>;
};
l14 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l15 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l16 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l17 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
};
l18 {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2700000>;
};
};
&msmgpio {
gpio_keys_default: gpio-keys-default-state {
pins = "gpio107", "gpio109";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};

19
arch/arm64/boot/dts/qcom/msm8916-samsung-j5x.dts Normal file
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@ -0,0 +1,19 @@
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
#include "msm8916-samsung-j5-common.dtsi"
/ {
model = "Samsung Galaxy J5 (2016)";
compatible = "samsung,j5x", "qcom,msm8916";
chassis-type = "handset";
};
&muic {
interrupts = <121 IRQ_TYPE_EDGE_FALLING>;
};
&muic_int_default {
pins = "gpio121";
};

115
arch/arm64/boot/dts/qcom/msm8916.dtsi
View File

@ -442,11 +442,70 @@
reg = <0x0005c000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
tsens_caldata: caldata@d0 {
reg = <0xd0 0x8>;
tsens_base1: base1@d0 {
reg = <0xd0 0x1>;
bits = <0 7>;
};
tsens_calsel: calsel@ec {
reg = <0xec 0x4>;
tsens_s0_p1: s0-p1@d0 {
reg = <0xd0 0x2>;
bits = <7 5>;
};
tsens_s0_p2: s0-p2@d1 {
reg = <0xd1 0x2>;
bits = <4 5>;
};
tsens_s1_p1: s1-p1@d2 {
reg = <0xd2 0x1>;
bits = <1 5>;
};
tsens_s1_p2: s1-p2@d2 {
reg = <0xd2 0x2>;
bits = <6 5>;
};
tsens_s2_p1: s2-p1@d3 {
reg = <0xd3 0x1>;
bits = <3 5>;
};
tsens_s2_p2: s2-p2@d4 {
reg = <0xd4 0x1>;
bits = <0 5>;
};
// no tsens with hw_id 3
tsens_s4_p1: s4-p1@d4 {
reg = <0xd4 0x2>;
bits = <5 5>;
};
tsens_s4_p2: s4-p2@d5 {
reg = <0xd5 0x1>;
bits = <2 5>;
};
tsens_s5_p1: s5-p1@d5 {
reg = <0xd5 0x2>;
bits = <7 5>;
};
tsens_s5_p2: s5-p2@d6 {
reg = <0xd6 0x2>;
bits = <4 5>;
};
tsens_base2: base2@d7 {
reg = <0xd7 0x1>;
bits = <1 7>;
};
tsens_mode: mode@ec {
reg = <0xef 0x1>;
bits = <5 3>;
};
};
@ -473,8 +532,22 @@
compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
reg = <0x004a9000 0x1000>, /* TM */
<0x004a8000 0x1000>; /* SROT */
nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
nvmem-cell-names = "calib", "calib_sel";
// no hw_id 3
nvmem-cells = <&tsens_mode>,
<&tsens_base1>, <&tsens_base2>,
<&tsens_s0_p1>, <&tsens_s0_p2>,
<&tsens_s1_p1>, <&tsens_s1_p2>,
<&tsens_s2_p1>, <&tsens_s2_p2>,
<&tsens_s4_p1>, <&tsens_s4_p2>,
<&tsens_s5_p1>, <&tsens_s5_p2>;
nvmem-cell-names = "mode",
"base1", "base2",
"s0_p1", "s0_p2",
"s1_p1", "s1_p2",
"s2_p1", "s2_p2",
"s4_p1", "s4_p2",
"s5_p1", "s5_p2";
#qcom,sensors = <5>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "uplow";
@ -963,7 +1036,7 @@
reg = <0x01937000 0x30000>;
};
mdss: mdss@1a00000 {
mdss: display-subsystem@1a00000 {
status = "disabled";
compatible = "qcom,mdss";
reg = <0x01a00000 0x1000>,
@ -988,8 +1061,8 @@
#size-cells = <1>;
ranges;
mdp: mdp@1a01000 {
compatible = "qcom,mdp5";
mdp: display-controller@1a01000 {
compatible = "qcom,msm8916-mdp5", "qcom,mdp5";
reg = <0x01a01000 0x89000>;
reg-names = "mdp_phys";
@ -1021,7 +1094,8 @@
};
dsi0: dsi@1a98000 {
compatible = "qcom,mdss-dsi-ctrl";
compatible = "qcom,msm8916-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0x01a98000 0x25c>;
reg-names = "dsi_ctrl";
@ -1167,7 +1241,7 @@
};
cci: cci@1b0c000 {
compatible = "qcom,msm8916-cci";
compatible = "qcom,msm8916-cci", "qcom,msm8226-cci";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x01b0c000 0x1000>;
@ -1521,7 +1595,6 @@
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,ee = <0>;
status = "disabled";
};
blsp1_uart1: serial@78af000 {
@ -1559,6 +1632,8 @@
clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&blsp_dma 4>, <&blsp_dma 5>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c1_default>;
pinctrl-1 = <&i2c1_sleep>;
@ -1591,6 +1666,8 @@
clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&blsp_dma 6>, <&blsp_dma 7>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c2_default>;
pinctrl-1 = <&i2c2_sleep>;
@ -1623,6 +1700,8 @@
clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&blsp_dma 8>, <&blsp_dma 9>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c3_default>;
pinctrl-1 = <&i2c3_sleep>;
@ -1655,6 +1734,8 @@
clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&blsp_dma 10>, <&blsp_dma 11>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c4_default>;
pinctrl-1 = <&i2c4_sleep>;
@ -1687,6 +1768,8 @@
clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&blsp_dma 12>, <&blsp_dma 13>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c5_default>;
pinctrl-1 = <&i2c5_sleep>;
@ -1719,6 +1802,8 @@
clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&blsp_dma 14>, <&blsp_dma 15>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c6_default>;
pinctrl-1 = <&i2c6_sleep>;
@ -1998,7 +2083,7 @@
hysteresis = <2000>;
type = "passive";
};
cpu0_1_crit: cpu_crit {
cpu0_1_crit: cpu-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -2028,7 +2113,7 @@
hysteresis = <2000>;
type = "passive";
};
cpu2_3_crit: cpu_crit {
cpu2_3_crit: cpu-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -2058,7 +2143,7 @@
hysteresis = <2000>;
type = "passive";
};
gpu_crit: gpu_crit {
gpu_crit: gpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";

305
arch/arm64/boot/dts/qcom/msm8953-motorola-potter.dts Normal file
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@ -0,0 +1,305 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2022, Sireesh Kodali
*/
/dts-v1/;
#include "msm8953.dtsi"
#include "pm8953.dtsi"
#include "pmi8950.dtsi"
/delete-node/ &cont_splash_mem;
/delete-node/ &qseecom_mem;
/ {
model = "Motorola G5 Plus";
compatible = "motorola,potter", "qcom,msm8953";
chassis-type = "handset";
qcom,msm-id = <293 0>;
qcom,board-id = <0x46 0x83a0>;
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
framebuffer@90001000 {
compatible = "simple-framebuffer";
reg = <0 0x90001000 0 (2220 * 1920 * 3)>;
width = <1080>;
height = <1920>;
stride = <(1080 * 3)>;
format = "r8g8b8";
power-domains = <&gcc MDSS_GDSC>;
clocks = <&gcc GCC_MDSS_AHB_CLK>,
<&gcc GCC_MDSS_AXI_CLK>,
<&gcc GCC_MDSS_VSYNC_CLK>,
<&gcc GCC_MDSS_MDP_CLK>,
<&gcc GCC_MDSS_BYTE0_CLK>,
<&gcc GCC_MDSS_PCLK0_CLK>,
<&gcc GCC_MDSS_ESC0_CLK>;
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&gpio_key_default>;
key-volume-up {
label = "Volume Up";
gpios = <&tlmm 85 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
};
reserved-memory {
qseecom_mem: qseecom@84300000 {
reg = <0x0 0x84300000 0x0 0x2000000>;
no-map;
};
cont_splash_mem: cont-splash@90001000 {
reg = <0x0 0x90001000 0x0 (1080 * 1920 * 3)>;
no-map;
};
reserved@aefd2000 {
reg = <0x0 0xaefd2000 0x0 0x2e000>;
no-map;
};
reserved@eefe4000 {
reg = <0x0 0xeefe4000 0x0 0x1c000>;
no-map;
};
ramoops@ef000000 {
compatible = "ramoops";
reg = <0x0 0xef000000 0x0 0x80000>;
console-size = <0x40000>;
ftrace-size = <0>;
record-size = <0x3f800>;
pmsg-size = <0x800>;
};
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-always-on;
regulator-boot-on;
};
};
&hsusb_phy {
vdd-supply = <&pm8953_l3>;
vdda-pll-supply = <&pm8953_l7>;
vdda-phy-dpdm-supply = <&pm8953_l13>;
status = "okay";
};
&i2c_3 {
status = "okay";
touchscreen@20 {
reg = <0x20>;
compatible = "syna,rmi4-i2c";
interrupt-parent = <&tlmm>;
interrupts = <65 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&ts_reset>;
vdd-supply = <&pm8953_l22>;
vio-supply = <&pm8953_l6>;
syna,reset-delay-ms = <200>;
syna,startup-delay-ms = <500>;
};
};
&pm8953_resin {
linux,code = <KEY_VOLUMEDOWN>;
status = "okay";
};
&pmi8950_wled {
qcom,current-limit-microamp = <25000>;
qcom,num-strings = <3>;
qcom,external-pfet;
qcom,cabc;
status = "okay";
};
&rpm_requests {
regulators {
compatible = "qcom,rpm-pm8953-regulators";
vdd_s1-supply = <&vph_pwr>;
vdd_s2-supply = <&vph_pwr>;
vdd_s3-supply = <&vph_pwr>;
vdd_s4-supply = <&vph_pwr>;
vdd_s5-supply = <&vph_pwr>;
vdd_s6-supply = <&vph_pwr>;
vdd_s7-supply = <&vph_pwr>;
vdd_l1-supply = <&pm8953_s3>;
vdd_l2_l3-supply = <&pm8953_s3>;
vdd_l4_l5_l6_l7_l16_l19-supply = <&pm8953_s4>;
vdd_l8_l11_l12_l13_l14_l15-supply = <&vph_pwr>;
vdd_l9_l10_l17_l18_l22-supply = <&vph_pwr>;
pm8953_s1: s1 {
regulator-min-microvolt = <863000>;
regulator-max-microvolt = <1152000>;
};
pm8953_s3: s3 {
regulator-min-microvolt = <1224000>;
regulator-max-microvolt = <1224000>;
};
pm8953_s4: s4 {
regulator-min-microvolt = <1896000>;
regulator-max-microvolt = <2048000>;
};
pm8953_l1: l1 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1100000>;
};
pm8953_l2: l2 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
pm8953_l3: l3 {
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <925000>;
regulator-allow-set-load;
};
pm8953_l5: l5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l6: l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
pm8953_l7: l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1900000>;
};
pm8953_l8: l8 {
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
};
pm8953_l9: l9 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
};
pm8953_l10: l10 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l11: l11 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <3000000>;
};
pm8953_l12: l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3000000>;
};
pm8953_l13: l13 {
regulator-min-microvolt = <3075000>;
regulator-max-microvolt = <3125000>;
};
pm8953_l15: l15 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l16: l16 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l17: l17 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <3000000>;
};
pm8953_l19: l19 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1350000>;
};
pm8953_l22: l22 {
regulator-always-on;
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2850000>;
};
pm8953_l23: l23 {
regulator-min-microvolt = <975000>;
regulator-max-microvolt = <1225000>;
};
};
};
&sdhc_1 {
vmmc-supply = <&pm8953_l8>;
vqmmc-supply = <&pm8953_l5>;
status = "okay";
};
&sdhc_2 {
vmmc-supply = <&pm8953_l11>;
vqmmc-supply = <&pm8953_l12>;
cd-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_off>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
status = "okay";
};
&tlmm {
gpio-reserved-ranges = <1 2>, <96 4>, <111 1>, <126 1>;
ts_reset: ts-reset-state {
pins = "gpio64";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
&usb3 {
status = "okay";
};
&usb3_dwc3 {
dr_mode = "peripheral";
};

325
arch/arm64/boot/dts/qcom/msm8953-xiaomi-daisy.dts Normal file
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@ -0,0 +1,325 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2022, Alejandro Tafalla
*/
/dts-v1/;
#include "msm8953.dtsi"
#include "pm8953.dtsi"
#include "pmi8950.dtsi"
/delete-node/ &adsp_fw_mem;
/delete-node/ &qseecom_mem;
/delete-node/ &wcnss_fw_mem;
/ {
model = "Xiaomi Mi A2 Lite";
compatible = "xiaomi,daisy", "qcom,msm8953";
chassis-type = "handset";
qcom,msm-id = <293 0>;
qcom,board-id= <0x1000b 0x9>;
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
framebuffer@90001000 {
compatible = "simple-framebuffer";
reg = <0 0x90001000 0 (1920 * 2280 * 3)>;
width = <1080>;
height = <2280>;
stride = <(1080 * 3)>;
format = "r8g8b8";
power-domains = <&gcc MDSS_GDSC>;
clocks = <&gcc GCC_MDSS_AHB_CLK>,
<&gcc GCC_MDSS_AXI_CLK>,
<&gcc GCC_MDSS_VSYNC_CLK>,
<&gcc GCC_MDSS_MDP_CLK>,
<&gcc GCC_MDSS_BYTE0_CLK>,
<&gcc GCC_MDSS_PCLK0_CLK>,
<&gcc GCC_MDSS_ESC0_CLK>;
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&gpio_key_default>;
key-volume-up {
label = "Volume Up";
gpios = <&tlmm 85 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
};
reserved-memory {
qseecom_mem: qseecom@84a00000 {
reg = <0x0 0x84a00000 0x0 0x1900000>;
no-map;
};
adsp_fw_mem: adsp@8d600000 {
reg = <0x0 0x8d600000 0x0 0x1200000>;
no-map;
};
wcnss_fw_mem: wcnss@8e800000 {
reg = <0x0 0x8e800000 0x0 0x700000>;
no-map;
};
};
/*
* We bitbang on &i2c_4 because BLSP is protected by TZ as sensors are
* normally proxied via ADSP firmware. GPIOs aren't protected.
*/
i2c-sensors {
compatible = "i2c-gpio";
sda-gpios = <&tlmm 14 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
scl-gpios = <&tlmm 15 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
#address-cells = <1>;
#size-cells = <0>;
imu@6a {
compatible = "st,lsm6dsl";
reg = <0x6a>;
vdd-supply = <&pm8953_l10>;
vddio-supply = <&pm8953_l6>;
mount-matrix = "-1", "0", "0",
"0", "-1", "0",
"0", "0", "1";
};
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-always-on;
regulator-boot-on;
};
};
&hsusb_phy {
vdd-supply = <&pm8953_l3>;
vdda-pll-supply = <&pm8953_l7>;
vdda-phy-dpdm-supply = <&pm8953_l13>;
status = "okay";
};
&i2c_2 {
status = "okay";
speaker_codec: audio-codec@3a {
compatible = "maxim,max98927";
reg = <0x3a>;
reset-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;
vmon-slot-no = <1>;
imon-slot-no = <1>;
interleave_mode = <0>;
#sound-dai-cells = <0>;
};
};
&i2c_3 {
status = "okay";
touchscreen@38 {
compatible = "edt,edt-ft5406";
reg = <0x38>;
interrupt-parent = <&tlmm>;
interrupts = <65 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_LOW>;
vcc-supply = <&pm8953_l10>;
touchscreen-size-x = <1080>;
touchscreen-size-y = <2280>;
};
};
&pm8953_resin {
linux,code = <KEY_VOLUMEDOWN>;
status = "okay";
};
&pmi8950_wled {
qcom,current-limit-microamp = <20000>;
qcom,num-strings = <2>;
status = "okay";
};
&rpm_requests {
regulators {
compatible = "qcom,rpm-pm8953-regulators";
vdd_s1-supply = <&vph_pwr>;
vdd_s2-supply = <&vph_pwr>;
vdd_s3-supply = <&vph_pwr>;
vdd_s4-supply = <&vph_pwr>;
vdd_s5-supply = <&vph_pwr>;
vdd_s6-supply = <&vph_pwr>;
vdd_s7-supply = <&vph_pwr>;
vdd_l1-supply = <&pm8953_s3>;
vdd_l2_l3-supply = <&pm8953_s3>;
vdd_l4_l5_l6_l7_l16_l19-supply = <&pm8953_s4>;
vdd_l8_l11_l12_l13_l14_l15-supply = <&vph_pwr>;
vdd_l9_l10_l17_l18_l22-supply = <&vph_pwr>;
pm8953_s1: s1 {
regulator-min-microvolt = <863000>;
regulator-max-microvolt = <1152000>;
};
pm8953_s3: s3 {
regulator-min-microvolt = <1224000>;
regulator-max-microvolt = <1224000>;
};
pm8953_s4: s4 {
regulator-min-microvolt = <1896000>;
regulator-max-microvolt = <2048000>;
};
pm8953_l1: l1 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1100000>;
};
pm8953_l2: l2 {
regulator-min-microvolt = <975000>;
regulator-max-microvolt = <1225000>;
};
pm8953_l3: l3 {
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <925000>;
regulator-allow-set-load;
};
pm8953_l5: l5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l6: l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
pm8953_l7: l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1900000>;
};
pm8953_l8: l8 {
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
};
pm8953_l9: l9 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
};
pm8953_l10: l10 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
regulator-always-on;
};
pm8953_l11: l11 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
};
pm8953_l12: l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
};
pm8953_l13: l13 {
regulator-min-microvolt = <3125000>;
regulator-max-microvolt = <3125000>;
};
pm8953_l16: l16 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l17: l17 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
};
pm8953_l19: l19 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1350000>;
};
pm8953_l22: l22 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2850000>;
regulator-always-on;
};
pm8953_l23: l23 {
regulator-min-microvolt = <975000>;
regulator-max-microvolt = <1225000>;
};
};
};
&sdhc_1 {
vmmc-supply = <&pm8953_l8>;
vqmmc-supply = <&pm8953_l5>;
status = "okay";
};
&sdhc_2 {
vmmc-supply = <&pm8953_l11>;
vqmmc-supply = <&pm8953_l12>;
cd-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
status = "okay";
};
&tlmm {
gpio-reserved-ranges = <0 4>, <16 4>, <135 4>;
};
&uart_0 {
pinctrl-names = "default";
pinctrl-0 = <&uart_console_active>;
status = "okay";
};
&usb3 {
status = "okay";
};
&usb3_dwc3 {
dr_mode = "peripheral";
};

329
arch/arm64/boot/dts/qcom/msm8953-xiaomi-mido.dts Normal file
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@ -0,0 +1,329 @@
// SPDX-License-Identifier: BSD-3-Clause
/dts-v1/;
#include "msm8953.dtsi"
#include "pm8953.dtsi"
#include "pmi8950.dtsi"
#include <dt-bindings/leds/common.h>
/delete-node/ &cont_splash_mem;
/delete-node/ &qseecom_mem;
/ {
model = "Xiaomi Redmi Note 4X";
compatible = "xiaomi,mido", "qcom,msm8953";
chassis-type = "handset";
qcom,msm-id = <293 0>;
qcom,board-id = <11 0>;
aliases {
mmc0 = &sdhc_1;
mmc1 = &sdhc_2;
};
speaker_amp: audio-amplifier {
compatible = "awinic,aw8738";
mode-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
awinic,mode = <5>;
sound-name-prefix = "Speaker Amp";
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
framebuffer@90001000 {
compatible = "simple-framebuffer";
reg = <0 0x90001000 0 (1920 * 1080 * 3)>;
width = <1080>;
height = <1920>;
stride = <(1080 * 3)>;
format = "r8g8b8";
power-domains = <&gcc MDSS_GDSC>;
clocks = <&gcc GCC_MDSS_AHB_CLK>,
<&gcc GCC_MDSS_AXI_CLK>,
<&gcc GCC_MDSS_VSYNC_CLK>,
<&gcc GCC_MDSS_MDP_CLK>,
<&gcc GCC_MDSS_BYTE0_CLK>,
<&gcc GCC_MDSS_PCLK0_CLK>,
<&gcc GCC_MDSS_ESC0_CLK>;
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&gpio_key_default>;
key-volume-up {
label = "Volume Up";
gpios = <&tlmm 85 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
};
reserved-memory {
qseecom_mem: qseecom@84a00000 {
reg = <0x0 0x84a00000 0x0 0x1900000>;
no-map;
};
cont_splash_mem: cont-splash@90001000 {
reg = <0x0 0x90001000 0x0 (1080 * 1920 * 3)>;
no-map;
};
ramoops@9ff00000 {
compatible = "ramoops";
reg = <0x0 0x9ff00000 0x0 0x00100000>;
console-size = <0x100000>;
};
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
regulator-always-on;
regulator-boot-on;
};
};
&hsusb_phy {
vdd-supply = <&pm8953_l3>;
vdda-pll-supply = <&pm8953_l7>;
vdda-phy-dpdm-supply = <&pm8953_l13>;
status = "okay";
};
&i2c_2 {
status = "okay";
led-controller@45 {
compatible = "awinic,aw2013";
reg = <0x45>;
vcc-supply = <&pm8953_l10>;
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_INDICATOR;
led-max-microamp = <5000>;
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_INDICATOR;
led-max-microamp = <5000>;
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_INDICATOR;
led-max-microamp = <5000>;
};
};
};
&i2c_3 {
status = "okay";
touchscreen@38 {
compatible = "edt,edt-ft5406";
reg = <0x38>;
interrupt-parent = <&tlmm>;
interrupts = <65 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_active>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_LOW>;
vcc-supply = <&pm8953_l10>;
touchscreen-size-x = <1080>;
touchscreen-size-y = <1920>;
};
};
&pm8953_resin {
linux,code = <KEY_VOLUMEDOWN>;
status = "okay";
};
&rpm_requests {
regulators {
compatible = "qcom,rpm-pm8953-regulators";
vdd_s1-supply = <&vph_pwr>;
vdd_s2-supply = <&vph_pwr>;
vdd_s3-supply = <&vph_pwr>;
vdd_s4-supply = <&vph_pwr>;
vdd_s5-supply = <&vph_pwr>;
vdd_s6-supply = <&vph_pwr>;
vdd_s7-supply = <&vph_pwr>;
vdd_l1-supply = <&pm8953_s3>;
vdd_l2_l3-supply = <&pm8953_s3>;
vdd_l4_l5_l6_l7_l16_l19-supply = <&pm8953_s4>;
vdd_l8_l11_l12_l13_l14_l15-supply = <&vph_pwr>;
vdd_l9_l10_l17_l18_l22-supply = <&vph_pwr>;
vdd_l23-supply = <&pm8953_s3>;
pm8953_s1: s1 {
regulator-min-microvolt = <863000>;
regulator-max-microvolt = <1152000>;
};
pm8953_s3: s3 {
regulator-min-microvolt = <1224000>;
regulator-max-microvolt = <1224000>;
};
pm8953_s4: s4 {
regulator-min-microvolt = <1896000>;
regulator-max-microvolt = <2048000>;
};
pm8953_l1: l1 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1100000>;
};
pm8953_l2: l2 {
regulator-min-microvolt = <975000>;
regulator-max-microvolt = <1225000>;
};
pm8953_l3: l3 {
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <925000>;
regulator-allow-set-load;
};
pm8953_l5: l5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l6: l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
pm8953_l7: l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1900000>;
};
pm8953_l8: l8 {
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
};
pm8953_l9: l9 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
};
pm8953_l10: l10 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
regulator-always-on;
};
pm8953_l11: l11 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
};
pm8953_l12: l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
};
pm8953_l13: l13 {
regulator-min-microvolt = <3125000>;
regulator-max-microvolt = <3125000>;
};
pm8953_l16: l16 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l17: l17 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
};
pm8953_l19: l19 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1350000>;
};
pm8953_l22: l22 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2850000>;
regulator-always-on;
};
pm8953_l23: l23 {
regulator-min-microvolt = <975000>;
regulator-max-microvolt = <1225000>;
};
};
};
&sdhc_1 {
vmmc-supply = <&pm8953_l8>;
vqmmc-supply = <&pm8953_l5>;
status = "okay";
};
&sdhc_2 {
vmmc-supply = <&pm8953_l11>;
vqmmc-supply = <&pm8953_l12>;
cd-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
status = "okay";
};
&tlmm {
gpio-reserved-ranges = <0 4>, <135 4>;
ts_int_active: ts-int-active-state {
pins = "gpio65";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
&usb3 {
status = "okay";
};
&usb3_dwc3 {
dr_mode = "peripheral";
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2022, Danila Tikhonov <JIaxyga@protonmail.com>
* Copyright (c) 2022, Anton Bambura <jenneron@protonmail.com>
*/
/dts-v1/;
#include "msm8953.dtsi"
#include "pm8953.dtsi"
#include "pmi8950.dtsi"
#include <dt-bindings/leds/common.h>
/delete-node/ &adsp_fw_mem;
/delete-node/ &qseecom_mem;
/delete-node/ &wcnss_fw_mem;
/ {
model = "Xiaomi Mi A1";
compatible = "xiaomi,tissot", "qcom,msm8953";
chassis-type = "handset";
qcom,msm-id = <293 0>;
qcom,board-id = <0x1000b 0x00>;
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&gpio_key_default>, <&gpio_hall_sensor_default>;
event-hall-sensor {
label = "Hall Effect Sensor";
gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_SW>;
linux,code = <SW_LID>;
linux,can-disable;
};
key-volume-up {
label = "Volume Up";
gpios = <&tlmm 85 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
};
reserved-memory {
qseecom_mem: qseecom@84a00000 {
reg = <0x0 0x84a00000 0x0 0x1900000>;
no-map;
};
adsp_fw_mem: adsp@8d600000 {
reg = <0x0 0x8d600000 0x0 0x1200000>;
no-map;
};
wcnss_fw_mem: wcnss@8e800000 {
reg = <0x0 0x8e800000 0x0 0x700000>;
no-map;
};
ramoops@9ff00000 {
compatible = "ramoops";
reg = <0x0 0x9ff00000 0x0 0x00100000>;
record-size = <0x1000>;
console-size = <0x80000>;
ftrace-size = <0x1000>;
pmsg-size = <0x8000>;
};
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-always-on;
regulator-boot-on;
};
};
&hsusb_phy {
vdd-supply = <&pm8953_l3>;
vdda-pll-supply = <&pm8953_l7>;
vdda-phy-dpdm-supply = <&pm8953_l13>;
status = "okay";
};
&i2c_2 {
status = "okay";
max98927_codec: audio-codec@3a {
compatible = "maxim,max98927";
reg = <0x3a>;
reset-gpios = <&tlmm 86 GPIO_ACTIVE_LOW>;
vmon-slot-no = <1>;
imon-slot-no = <1>;
#sound-dai-cells = <1>;
};
led-controller@45 {
compatible = "awinic,aw2013";
reg = <0x45>;
vcc-supply = <&pm8953_l10>;
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
led-max-microamp = <5000>;
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_WHITE>;
};
};
};
&i2c_3 {
status = "okay";
touchscreen@38 {
compatible = "edt,edt-ft5406";
reg = <0x38>;
interrupt-parent = <&tlmm>;
interrupts = <65 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_default>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_LOW>;
vcc-supply = <&pm8953_l10>;
touchscreen-size-x = <1080>;
touchscreen-size-y = <1920>;
};
};
&pm8953_resin {
linux,code = <KEY_VOLUMEDOWN>;
status = "okay";
};
&pmi8950_wled {
qcom,num-strings = <2>;
qcom,external-pfet;
qcom,cabc;
status = "okay";
};
&rpm_requests {
regulators {
compatible = "qcom,rpm-pm8953-regulators";
vdd_s1-supply = <&vph_pwr>;
vdd_s2-supply = <&vph_pwr>;
vdd_s3-supply = <&vph_pwr>;
vdd_s4-supply = <&vph_pwr>;
vdd_s5-supply = <&vph_pwr>;
vdd_s6-supply = <&vph_pwr>;
vdd_s7-supply = <&vph_pwr>;
vdd_l1-supply = <&pm8953_s3>;
vdd_l2_l3-supply = <&pm8953_s3>;
vdd_l4_l5_l6_l7_l16_l19-supply = <&pm8953_s4>;
vdd_l8_l11_l12_l13_l14_l15-supply = <&vph_pwr>;
vdd_l9_l10_l17_l18_l22-supply = <&vph_pwr>;
pm8953_s1: s1 {
regulator-min-microvolt = <870000>;
regulator-max-microvolt = <1156000>;
};
pm8953_s3: s3 {
regulator-min-microvolt = <1224000>;
regulator-max-microvolt = <1224000>;
};
pm8953_s4: s4 {
regulator-min-microvolt = <1900000>;
regulator-max-microvolt = <2050000>;
};
pm8953_l1: l1 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
pm8953_l2: l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1225000>;
};
pm8953_l3: l3 {
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <925000>;
};
pm8953_l5: l5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l6: l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l7: l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1900000>;
};
pm8953_l8: l8 {
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
};
pm8953_l9: l9 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
pm8953_l10:l10 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
};
pm8953_l11: l11 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
};
pm8953_l12: l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
};
pm8953_l13: l13 {
regulator-min-microvolt = <3125000>;
regulator-max-microvolt = <3125000>;
};
pm8953_l16: l16 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l17: l17 {
regulator-min-microvolt = <2750000>;
regulator-max-microvolt = <2850000>;
};
pm8953_l19: l19 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1350000>;
};
pm8953_l22: l22 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
pm8953_l23: l23 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1225000>;
};
};
};
&sdhc_1 {
vmmc-supply = <&pm8953_l8>;
vqmmc-supply = <&pm8953_l5>;
status = "okay";
};
&sdhc_2 {
vmmc-supply = <&pm8953_l11>;
vqmmc-supply = <&pm8953_l12>;
cd-gpios = <&tlmm 133 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
status = "okay";
};
&tlmm {
gpio-reserved-ranges = <0 4>, <16 4>, <135 4>;
gpio_hall_sensor_default: gpio-hall-sensor-state {
pins = "gpio44";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
ts_int_default: ts-int-default-state {
pins = "gpio65";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
&uart_0 {
pinctrl-names = "default";
pinctrl-0 = <&uart_console_active>;
status = "okay";
};
&usb3 {
status = "okay";
};
&usb3_dwc3 {
dr_mode = "peripheral";
};

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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2022, Eugene Lepshy <fekz115@gmail.com>
* Copyright (c) 2022, Gianluca Boiano <morf3089@gmail.com>
*/
/dts-v1/;
#include "msm8953.dtsi"
#include "pm8953.dtsi"
#include "pmi8950.dtsi"
#include <dt-bindings/leds/common.h>
/delete-node/ &adsp_fw_mem;
/delete-node/ &cont_splash_mem;
/delete-node/ &qseecom_mem;
/delete-node/ &wcnss_fw_mem;
/ {
model = "Xiaomi Redmi 5 Plus";
compatible = "xiaomi,vince", "qcom,msm8953";
chassis-type = "handset";
qcom,msm-id = <293 0>;
qcom,board-id= <0x1000b 0x08>;
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&gpio_key_default>;
key-volume-up {
label = "volume_up";
linux,code = <KEY_VOLUMEUP>;
gpios = <&tlmm 85 GPIO_ACTIVE_LOW>;
};
};
reserved-memory {
qseecom_mem: qseecom@84a00000 {
reg = <0x0 0x84a00000 0x0 0x1900000>;
no-map;
};
cont_splash_mem: cont-splash@90001000 {
reg = <0x0 0x90001000 0x0 (1080 * 2160 * 3)>;
no-map;
};
adsp_fw_mem: adsp@8d600000 {
reg = <0x0 0x8d600000 0x0 0x1200000>;
no-map;
};
wcnss_fw_mem: wcnss@8e800000 {
reg = <0x0 0x8e800000 0x0 0x700000>;
no-map;
};
ramoops@9ff00000 {
compatible = "ramoops";
reg = <0x0 0x9ff00000 0x0 0x100000>;
record-size = <0x1000>;
console-size = <0x80000>;
ftrace-size = <0x1000>;
pmsg-size = <0x8000>;
};
};
/*
* We bitbang on &i2c_4 because BLSP is protected by TZ as sensors are
* normally proxied via ADSP firmware. GPIOs aren't protected.
*/
i2c-sensors {
compatible = "i2c-gpio";
sda-gpios = <&tlmm 14 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
scl-gpios = <&tlmm 15 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
#address-cells = <1>;
#size-cells = <0>;
imu@6a {
compatible = "st,lsm6dsl";
reg = <0x6a>;
vdd-supply = <&pm8953_l10>;
vddio-supply = <&pm8953_l6>;
mount-matrix = "1", "0", "0",
"0", "-1", "0",
"0", "0", "1";
};
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-always-on;
regulator-boot-on;
};
};
&hsusb_phy {
vdd-supply = <&pm8953_l3>;
vdda-pll-supply = <&pm8953_l7>;
vdda-phy-dpdm-supply = <&pm8953_l13>;
status = "okay";
};
&i2c_2 {
status = "okay";
led-controller@45 {
compatible = "awinic,aw2013";
reg = <0x45>;
vcc-supply = <&pm8953_l10>;
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
led-max-microamp = <5000>;
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_WHITE>;
};
};
};
&i2c_3 {
status = "okay";
touchscreen@20 {
reg = <0x20>;
compatible = "syna,rmi4-i2c";
interrupts-parent = <&tlmm>;
interrupts-extended = <&tlmm 65 IRQ_TYPE_EDGE_FALLING>;
#address-cells = <1>;
#size-cells = <0>;
vdd-supply = <&pm8953_l10>;
vio-supply = <&pm8953_l6>;
pinctrl-names = "init", "suspend";
pinctrl-0 = <&ts_reset_active &ts_int_active>;
pinctrl-1 = <&ts_reset_suspend &ts_int_suspend>;
syna,reset-delay-ms = <200>;
syna,startup-delay-ms = <500>;
rmi4-f01@1 {
reg = <0x01>;
syna,nosleep-mode = <1>;
};
rmi4-f12@12 {
reg = <0x12>;
syna,rezero-wait-ms = <20>;
syna,sensor-type = <1>;
touchscreen-x-mm = <68>;
touchscreen-y-mm = <122>;
};
};
};
&pm8953_resin {
linux,code = <KEY_VOLUMEDOWN>;
status = "okay";
};
&pmi8950_wled {
qcom,current-limit-microamp = <20000>;
qcom,ovp-millivolt = <29600>;
qcom,num-strings = <2>;
qcom,external-pfet;
qcom,cabc;
status = "okay";
};
&rpm_requests {
regulators {
compatible = "qcom,rpm-pm8953-regulators";
vdd_s1-supply = <&vph_pwr>;
vdd_s2-supply = <&vph_pwr>;
vdd_s3-supply = <&vph_pwr>;
vdd_s4-supply = <&vph_pwr>;
vdd_s5-supply = <&vph_pwr>;
vdd_s6-supply = <&vph_pwr>;
vdd_s7-supply = <&vph_pwr>;
vdd_l1-supply = <&pm8953_s3>;
vdd_l2_l3-supply = <&pm8953_s3>;
vdd_l4_l5_l6_l7_l16_l19-supply = <&pm8953_s4>;
vdd_l8_l11_l12_l13_l14_l15-supply = <&vph_pwr>;
vdd_l9_l10_l17_l18_l22-supply = <&vph_pwr>;
pm8953_s1: s1 {
regulator-min-microvolt = <870000>;
regulator-max-microvolt = <1156000>;
};
pm8953_s3: s3 {
regulator-min-microvolt = <984000>;
regulator-max-microvolt = <1224000>;
};
pm8953_s4: s4 {
regulator-min-microvolt = <1900000>;
regulator-max-microvolt = <2050000>;
};
pm8953_l1: l1 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1100000>;
};
pm8953_l2: l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1225000>;
};
pm8953_l3: l3 {
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <925000>;
};
pm8953_l5: l5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l6: l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l7: l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1900000>;
};
pm8953_l8: l8 {
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
};
pm8953_l9: l9 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
};
pm8953_l10: l10 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
};
pm8953_l11: l11 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
};
pm8953_l12: l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
};
pm8953_l13: l13 {
regulator-min-microvolt = <3125000>;
regulator-max-microvolt = <3125000>;
};
pm8953_l16: l16 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l17: l17 {
regulator-min-microvolt = <2750000>;
regulator-max-microvolt = <2850000>;
};
pm8953_l19: l19 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1380000>;
};
pm8953_l22: l22 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
pm8953_l23: l23 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1225000>;
};
};
};
&sdhc_1 {
vmmc-supply = <&pm8953_l8>;
vqmmc-supply = <&pm8953_l5>;
status = "okay";
};
&sdhc_2 {
vmmc-supply = <&pm8953_l11>;
vqmmc-supply = <&pm8953_l12>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
status = "okay";
};
&tlmm {
gpio-reserved-ranges = <0 4>, <16 4>, <135 4>;
ts_reset_active: ts-reset-active-state {
pins = "gpio64";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
ts_reset_suspend: ts-reset-suspend-state {
pins = "gpio64";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
ts_int_active: ts-int-active-state {
pins = "gpio65";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
ts_int_suspend: ts-int-suspend-state {
pins = "gpio65";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
};
&uart_0 {
pinctrl-names = "default";
pinctrl-0 = <&uart_console_active>;
status = "okay";
};
&usb3 {
status = "okay";
};
&usb3_dwc3 {
dr_mode = "peripheral";
};

92
arch/arm64/boot/dts/qcom/msm8953.dtsi
View File

@ -42,13 +42,6 @@
capacity-dmips-mhz = <1024>;
next-level-cache = <&L2_0>;
#cooling-cells = <2>;
l1-icache {
compatible = "cache";
};
l1-dcache {
compatible = "cache";
};
};
CPU1: cpu@1 {
@ -59,13 +52,6 @@
capacity-dmips-mhz = <1024>;
next-level-cache = <&L2_0>;
#cooling-cells = <2>;
l1-icache {
compatible = "cache";
};
l1-dcache {
compatible = "cache";
};
};
CPU2: cpu@2 {
@ -76,13 +62,6 @@
capacity-dmips-mhz = <1024>;
next-level-cache = <&L2_0>;
#cooling-cells = <2>;
l1-icache {
compatible = "cache";
};
l1-dcache {
compatible = "cache";
};
};
CPU3: cpu@3 {
@ -93,13 +72,6 @@
capacity-dmips-mhz = <1024>;
next-level-cache = <&L2_0>;
#cooling-cells = <2>;
l1-icache {
compatible = "cache";
};
l1-dcache {
compatible = "cache";
};
};
CPU4: cpu@100 {
@ -110,13 +82,6 @@
capacity-dmips-mhz = <1024>;
next-level-cache = <&L2_1>;
#cooling-cells = <2>;
l1-icache {
compatible = "cache";
};
l1-dcache {
compatible = "cache";
};
};
CPU5: cpu@101 {
@ -127,13 +92,6 @@
capacity-dmips-mhz = <1024>;
next-level-cache = <&L2_1>;
#cooling-cells = <2>;
l1-icache {
compatible = "cache";
};
l1-dcache {
compatible = "cache";
};
};
CPU6: cpu@102 {
@ -144,13 +102,6 @@
capacity-dmips-mhz = <1024>;
next-level-cache = <&L2_1>;
#cooling-cells = <2>;
l1-icache {
compatible = "cache";
};
l1-dcache {
compatible = "cache";
};
};
CPU7: cpu@103 {
@ -161,13 +112,6 @@
capacity-dmips-mhz = <1024>;
next-level-cache = <&L2_1>;
#cooling-cells = <2>;
l1-icache {
compatible = "cache";
};
l1-dcache {
compatible = "cache";
};
};
cpu-map {
@ -202,12 +146,12 @@
};
};
L2_0: l2-cache_0 {
L2_0: l2-cache-0 {
compatible = "cache";
cache-level = <2>;
};
L2_1: l2-cache_1 {
L2_1: l2-cache-1 {
compatible = "cache";
cache-level = <2>;
};
@ -245,18 +189,18 @@
#size-cells = <2>;
ranges;
zap_shader_region: memory@81800000 {
zap_shader_region: zap@81800000 {
compatible = "shared-dma-pool";
reg = <0x0 0x81800000 0x0 0x2000>;
no-map;
};
memory@85b00000 {
qseecom_mem: qseecom@85b00000 {
reg = <0x0 0x85b00000 0x0 0x800000>;
no-map;
};
smem_mem: memory@86300000 {
smem_mem: smem@86300000 {
compatible = "qcom,smem";
reg = <0x0 0x86300000 0x0 0x100000>;
qcom,rpm-msg-ram = <&rpm_msg_ram>;
@ -264,47 +208,47 @@
no-map;
};
memory@86400000 {
reserved@86400000 {
reg = <0x0 0x86400000 0x0 0x400000>;
no-map;
};
mpss_mem: memory@86c00000 {
mpss_mem: mpss@86c00000 {
reg = <0x0 0x86c00000 0x0 0x6a00000>;
no-map;
};
adsp_fw_mem: memory@8d600000 {
adsp_fw_mem: adsp@8d600000 {
reg = <0x0 0x8d600000 0x0 0x1100000>;
no-map;
};
wcnss_fw_mem: memory@8e700000 {
wcnss_fw_mem: wcnss@8e700000 {
reg = <0x0 0x8e700000 0x0 0x700000>;
no-map;
};
memory@90000000 {
dfps_data_mem: dfps-data@90000000 {
reg = <0 0x90000000 0 0x1000>;
no-map;
};
memory@90001000 {
cont_splash_mem: cont-splash@90001000 {
reg = <0x0 0x90001000 0x0 0x13ff000>;
no-map;
};
venus_mem: memory@91400000 {
venus_mem: venus@91400000 {
reg = <0x0 0x91400000 0x0 0x700000>;
no-map;
};
mba_mem: memory@92000000 {
mba_mem: mba@92000000 {
reg = <0x0 0x92000000 0x0 0x100000>;
no-map;
};
memory@f2d00000 {
rmtfs@f2d00000 {
compatible = "qcom,rmtfs-mem";
reg = <0x0 0xf2d00000 0x0 0x180000>;
no-map;
@ -726,7 +670,7 @@
reg = <0x193f044 0x4>;
};
mdss: mdss@1a00000 {
mdss: display-subsystem@1a00000 {
compatible = "qcom,mdss";
reg = <0x1a00000 0x1000>,
@ -755,7 +699,7 @@
status = "disabled";
mdp: mdp@1a01000 {
mdp: display-controller@1a01000 {
compatible = "qcom,msm8953-mdp5", "qcom,mdp5";
reg = <0x1a01000 0x89000>;
reg-names = "mdp_phys";
@ -797,7 +741,7 @@
};
dsi0: dsi@1a94000 {
compatible = "qcom,mdss-dsi-ctrl";
compatible = "qcom,msm8953-dsi-ctrl", "qcom,mdss-dsi-ctrl";
reg = <0x1a94000 0x400>;
reg-names = "dsi_ctrl";
@ -867,7 +811,7 @@
};
dsi1: dsi@1a96000 {
compatible = "qcom,mdss-dsi-ctrl";
compatible = "qcom,msm8953-dsi-ctrl", "qcom,mdss-dsi-ctrl";
reg = <0x1a96000 0x400>;
reg-names = "dsi_ctrl";

4
arch/arm64/boot/dts/qcom/msm8956.dtsi
View File

@ -12,6 +12,10 @@
interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
};
&tsens {
compatible = "qcom,msm8956-tsens", "qcom,tsens-v1";
};
/*
* You might be wondering.. why is it so empty out there?
* Well, the SoCs are almost identical.

153
arch/arm64/boot/dts/qcom/msm8976.dtsi
View File

@ -481,8 +481,129 @@
#address-cells = <1>;
#size-cells = <1>;
tsens_caldata: caldata@218 {
reg = <0x218 0x18>;
tsens_base1: base1@218 {
reg = <0x218 1>;
bits = <0 8>;
};
tsens_s0_p1: s0-p1@219 {
reg = <0x219 0x1>;
bits = <0 6>;
};
tsens_s0_p2: s0-p2@219 {
reg = <0x219 0x2>;
bits = <6 6>;
};
tsens_s1_p1: s1-p1@21a {
reg = <0x21a 0x2>;
bits = <4 6>;
};
tsens_s1_p2: s1-p2@21b {
reg = <0x21b 0x1>;
bits = <2 6>;
};
tsens_s2_p1: s2-p1@21c {
reg = <0x21c 0x1>;
bits = <0 6>;
};
tsens_s2_p2: s2-p2@21c {
reg = <0x21c 0x2>;
bits = <6 6>;
};
tsens_s3_p1: s3-p1@21d {
reg = <0x21d 0x2>;
bits = <4 6>;
};
tsens_s3_p2: s3-p2@21e {
reg = <0x21e 0x1>;
bits = <2 6>;
};
tsens_base2: base2@220 {
reg = <0x220 1>;
bits = <0 8>;
};
tsens_s4_p1: s4-p1@221 {
reg = <0x221 0x1>;
bits = <0 6>;
};
tsens_s4_p2: s4-p2@221 {
reg = <0x221 0x2>;
bits = <6 6>;
};
tsens_s5_p1: s5-p1@222 {
reg = <0x222 0x2>;
bits = <4 6>;
};
tsens_s5_p2: s5-p2@223 {
reg = <0x224 0x1>;
bits = <2 6>;
};
tsens_s6_p1: s6-p1@224 {
reg = <0x224 0x1>;
bits = <0 6>;
};
tsens_s6_p2: s6-p2@224 {
reg = <0x224 0x2>;
bits = <6 6>;
};
tsens_s7_p1: s7-p1@225 {
reg = <0x225 0x2>;
bits = <4 6>;
};
tsens_s7_p2: s7-p2@226 {
reg = <0x226 0x2>;
bits = <2 6>;
};
tsens_mode: mode@228 {
reg = <0x228 1>;
bits = <0 3>;
};
tsens_s8_p1: s8-p1@228 {
reg = <0x228 0x2>;
bits = <3 6>;
};
tsens_s8_p2: s8-p2@229 {
reg = <0x229 0x1>;
bits = <1 6>;
};
tsens_s9_p1: s9-p1@229 {
reg = <0x229 0x2>;
bits = <7 6>;
};
tsens_s9_p2: s9-p2@22a {
reg = <0x22a 0x2>;
bits = <5 6>;
};
tsens_s10_p1: s10-p1@22b {
reg = <0x22b 0x2>;
bits = <3 6>;
};
tsens_s10_p2: s10-p2@22c {
reg = <0x22c 0x1>;
bits = <1 6>;
};
};
@ -492,8 +613,32 @@
<0x004a8000 0x1000>; /* SROT */
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "uplow";
nvmem-cells = <&tsens_caldata>;
nvmem-cell-names = "calib";
nvmem-cells = <&tsens_mode>,
<&tsens_base1>, <&tsens_base2>,
<&tsens_s0_p1>, <&tsens_s0_p2>,
<&tsens_s1_p1>, <&tsens_s1_p2>,
<&tsens_s2_p1>, <&tsens_s2_p2>,
<&tsens_s3_p1>, <&tsens_s3_p2>,
<&tsens_s4_p1>, <&tsens_s4_p2>,
<&tsens_s5_p1>, <&tsens_s5_p2>,
<&tsens_s6_p1>, <&tsens_s6_p2>,
<&tsens_s7_p1>, <&tsens_s7_p2>,
<&tsens_s8_p1>, <&tsens_s8_p2>,
<&tsens_s9_p1>, <&tsens_s9_p2>,
<&tsens_s10_p1>, <&tsens_s10_p2>;
nvmem-cell-names = "mode",
"base1", "base2",
"s0_p1", "s0_p2",
"s1_p1", "s1_p2",
"s2_p1", "s2_p2",
"s3_p1", "s3_p2",
"s4_p1", "s4_p2",
"s5_p1", "s5_p2",
"s6_p1", "s6_p2",
"s7_p1", "s7_p2",
"s8_p1", "s8_p2",
"s9_p1", "s9_p2",
"s10_p1", "s10_p2";
#qcom,sensors = <11>;
#thermal-sensor-cells = <1>;
};

13
arch/arm64/boot/dts/qcom/msm8992-lg-bullhead.dtsi
View File

@ -2,7 +2,8 @@
/*
* Copyright (c) 2015, LGE Inc. All rights reserved.
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
* Copyright (c) 2021, Petr Vorel <petr.vorel@gmail.com>
* Copyright (c) 2021-2022, Petr Vorel <petr.vorel@gmail.com>
* Copyright (c) 2022, Dominik Kobinski <dominikkobinski314@gmail.com>
*/
/dts-v1/;
@ -14,6 +15,9 @@
/* cont_splash_mem has different memory mapping */
/delete-node/ &cont_splash_mem;
/* disabled on downstream, conflicts with cont_splash_mem */
/delete-node/ &dfps_data_mem;
/ {
model = "LG Nexus 5X";
compatible = "lg,bullhead", "qcom,msm8992";
@ -48,7 +52,12 @@
};
cont_splash_mem: memory@3400000 {
reg = <0 0x03400000 0 0x1200000>;
reg = <0 0x03400000 0 0xc00000>;
no-map;
};
removed_region: reserved@5000000 {
reg = <0 0x05000000 0 0x2200000>;
no-map;
};
};

77
arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts
View File

@ -11,6 +11,12 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/gpio-keys.h>
/delete-node/ &adsp_mem;
/delete-node/ &audio_mem;
/delete-node/ &mpss_mem;
/delete-node/ &peripheral_region;
/delete-node/ &rmtfs_mem;
/ {
model = "Xiaomi Mi 4C";
compatible = "xiaomi,libra", "qcom,msm8992";
@ -70,25 +76,67 @@
#size-cells = <2>;
ranges;
/* This is for getting crash logs using Android downstream kernels */
memory_hole: hole@6400000 {
reg = <0 0x06400000 0 0x600000>;
no-map;
};
memory_hole2: hole2@6c00000 {
reg = <0 0x06c00000 0 0x2400000>;
no-map;
};
mpss_mem: mpss@9000000 {
reg = <0 0x09000000 0 0x5a00000>;
no-map;
};
tzapp: tzapp@ea00000 {
reg = <0 0x0ea00000 0 0x1900000>;
no-map;
};
mdm_rfsa_mem: mdm-rfsa@ca0b0000 {
reg = <0 0xca0b0000 0 0x10000>;
no-map;
};
rmtfs_mem: rmtfs@ca100000 {
compatible = "qcom,rmtfs-mem";
reg = <0 0xca100000 0 0x180000>;
no-map;
qcom,client-id = <1>;
};
audio_mem: audio@cb400000 {
reg = <0 0xcb000000 0 0x400000>;
no-mem;
};
qseecom_mem: qseecom@cb400000 {
reg = <0 0xcb400000 0 0x1c00000>;
no-mem;
};
adsp_rfsa_mem: adsp-rfsa@cd000000 {
reg = <0 0xcd000000 0 0x10000>;
no-map;
};
sensor_rfsa_mem: sensor-rfsa@cd010000 {
reg = <0 0xcd010000 0 0x10000>;
no-map;
};
ramoops@dfc00000 {
compatible = "ramoops";
reg = <0x0 0xdfc00000 0x0 0x40000>;
reg = <0 0xdfc00000 0 0x40000>;
console-size = <0x10000>;
record-size = <0x10000>;
ftrace-size = <0x10000>;
pmsg-size = <0x20000>;
};
modem_region: modem_region@9000000 {
reg = <0x0 0x9000000 0x0 0x5a00000>;
no-map;
};
tzapp: modem_region@ea00000 {
reg = <0x0 0xea00000 0x0 0x1900000>;
no-map;
};
};
};
@ -130,11 +178,6 @@
status = "okay";
};
&peripheral_region {
reg = <0x0 0x7400000 0x0 0x1c00000>;
no-map;
};
&pm8994_spmi_regulators {
VDD_APC0: s8 {
regulator-min-microvolt = <680000>;

4
arch/arm64/boot/dts/qcom/msm8992.dtsi
View File

@ -37,10 +37,6 @@
compatible = "qcom,rpmcc-msm8992", "qcom,rpmcc";
};
&tcsr_mutex {
compatible = "qcom,sfpb-mutex";
};
&timer {
interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

19
arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dts
View File

@ -9,9 +9,6 @@
#include "msm8994.dtsi"
/* Angler's firmware does not report where the memory is allocated */
/delete-node/ &cont_splash_mem;
/ {
model = "Huawei Nexus 6P";
compatible = "huawei,angler", "qcom,msm8994";
@ -28,6 +25,22 @@
chosen {
stdout-path = "serial0:115200n8";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
tzapp_mem: tzapp@4800000 {
reg = <0 0x04800000 0 0x1900000>;
no-map;
};
removed_region: reserved@6300000 {
reg = <0 0x06300000 0 0xD00000>;
no-map;
};
};
};
&blsp1_uart2 {

52
arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi
View File

@ -127,98 +127,98 @@
*/
uefi_mem: memory@200000 {
reg = <0 0x200000 0 0x100000>;
reg = <0 0x00200000 0 0x100000>;
no-map;
};
mppark_mem: memory@300000 {
reg = <0 0x300000 0 0x80000>;
reg = <0 0x00300000 0 0x80000>;
no-map;
};
fbpt_mem: memory@380000 {
reg = <0 0x380000 0 0x1000>;
reg = <0 0x00380000 0 0x1000>;
no-map;
};
dbg2_mem: memory@381000 {
reg = <0 0x381000 0 0x4000>;
reg = <0 0x00381000 0 0x4000>;
no-map;
};
capsule_mem: memory@385000 {
reg = <0 0x385000 0 0x1000>;
reg = <0 0x00385000 0 0x1000>;
no-map;
};
tpmctrl_mem: memory@386000 {
reg = <0 0x386000 0 0x3000>;
reg = <0 0x00386000 0 0x3000>;
no-map;
};
uefiinfo_mem: memory@389000 {
reg = <0 0x389000 0 0x1000>;
reg = <0 0x00389000 0 0x1000>;
no-map;
};
reset_mem: memory@389000 {
reg = <0 0x389000 0 0x1000>;
reg = <0 0x00389000 0 0x1000>;
no-map;
};
resuncached_mem: memory@38e000 {
reg = <0 0x38e000 0 0x72000>;
reg = <0 0x0038e000 0 0x72000>;
no-map;
};
disp_mem: memory@400000 {
reg = <0 0x400000 0 0x800000>;
reg = <0 0x00400000 0 0x800000>;
no-map;
};
uefistack_mem: memory@c00000 {
reg = <0 0xc00000 0 0x40000>;
reg = <0 0x00c00000 0 0x40000>;
no-map;
};
cpuvect_mem: memory@c40000 {
reg = <0 0xc40000 0 0x10000>;
reg = <0 0x00c40000 0 0x10000>;
no-map;
};
rescached_mem: memory@400000 {
reg = <0 0xc50000 0 0xb0000>;
reg = <0 0x00c50000 0 0xb0000>;
no-map;
};
tzapps_mem: memory@6500000 {
reg = <0 0x6500000 0 0x500000>;
reg = <0 0x06500000 0 0x500000>;
no-map;
};
smem_mem: memory@6a00000 {
reg = <0 0x6a00000 0 0x200000>;
reg = <0 0x06a00000 0 0x200000>;
no-map;
};
hyp_mem: memory@6c00000 {
reg = <0 0x6c00000 0 0x100000>;
reg = <0 0x06c00000 0 0x100000>;
no-map;
};
tz_mem: memory@6d00000 {
reg = <0 0x6d00000 0 0x160000>;
reg = <0 0x06d00000 0 0x160000>;
no-map;
};
rfsa_adsp_mem: memory@6e60000 {
reg = <0 0x6e60000 0 0x10000>;
reg = <0 0x06e60000 0 0x10000>;
no-map;
};
rfsa_mpss_mem: memory@6e70000 {
compatible = "qcom,rmtfs-mem";
reg = <0 0x6e70000 0 0x10000>;
reg = <0 0x06e70000 0 0x10000>;
no-map;
qcom,client-id = <1>;
@ -229,7 +229,7 @@
* MPSS_EFS / SBL
*/
mba_mem: memory@6e80000 {
reg = <0 0x6e80000 0 0x180000>;
reg = <0 0x06e80000 0 0x180000>;
no-map;
};
@ -239,33 +239,33 @@
*/
mpss_mem: memory@7000000 {
reg = <0 0x7000000 0 0x5a00000>;
reg = <0 0x07000000 0 0x5a00000>;
no-map;
};
adsp_mem: memory@ca00000 {
reg = <0 0xca00000 0 0x1800000>;
reg = <0 0x0ca00000 0 0x1800000>;
no-map;
};
venus_mem: memory@e200000 {
reg = <0 0xe200000 0 0x500000>;
reg = <0 0x0e200000 0 0x500000>;
no-map;
};
pil_metadata_mem: memory@e700000 {
reg = <0 0xe700000 0 0x4000>;
reg = <0 0x0e700000 0 0x4000>;
no-map;
};
memory@e704000 {
reg = <0 0xe704000 0 0x7fc000>;
reg = <0 0x0e704000 0 0x7fc000>;
no-map;
};
/* Peripheral Image loader region end */
cnss_mem: memory@ef00000 {
reg = <0 0xef00000 0 0x300000>;
reg = <0 0x0ef00000 0 0x300000>;
no-map;
};
};

2
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
View File

@ -163,7 +163,7 @@
* mainline Linux.
*/
&cont_splash_mem {
reg = <0 0x3401000 0 0x2200000>;
reg = <0 0x03401000 0 0x2200000>;
};
&pmi8994_spmi_regulators {

1
arch/arm64/boot/dts/qcom/msm8996-oneplus-common.dtsi
View File

@ -179,7 +179,6 @@
};
&dsi0_phy {
vdda-supply = <&vreg_l2a_1p25>;
vcca-supply = <&vreg_l28a_0p925>;
status = "okay";
};

38
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone.dtsi
View File

@ -24,11 +24,7 @@
qcom,board-id = <8 0>;
chosen {
/*
* Due to an unknown-for-a-few-years regression,
* SDHCI only works on MSM8996 in PIO (lame) mode.
*/
bootargs = "sdhci.debug_quirks=0x40 sdhci.debug_quirks2=0x4 maxcpus=2";
bootargs = "maxcpus=2";
};
reserved-memory {
@ -104,8 +100,8 @@
};
&blsp1_i2c3 {
status = "okay";
clock-frequency = <355000>;
status = "okay";
tof_sensor: vl53l0x@29 {
compatible = "st,vl53l0x";
@ -118,15 +114,15 @@
};
&blsp2_i2c5 {
status = "okay";
clock-frequency = <355000>;
status = "okay";
/* FUSB301 USB-C controller */
};
&blsp2_i2c6 {
status = "okay";
clock-frequency = <355000>;
status = "okay";
synaptics@2c {
compatible = "syna,rmi4-i2c";
@ -183,11 +179,10 @@
};
&hsusb_phy1 {
status = "okay";
vdd-supply = <&pm8994_l28>;
vdda-pll-supply = <&pm8994_l12>;
vdda-phy-dpdm-supply = <&pm8994_l24>;
status = "okay";
};
&mmcc {
@ -195,18 +190,17 @@
};
&pcie0 {
status = "okay";
perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
vddpe-3v3-supply = <&wlan_en>;
vdda-supply = <&pm8994_l28>;
status = "okay";
};
&pcie_phy {
status = "okay";
vdda-phy-supply = <&pm8994_l28>;
vdda-pll-supply = <&pm8994_l12>;
status = "okay";
};
&pm8994_gpios {
@ -478,8 +472,8 @@
};
&pm8994_resin {
status = "okay";
linux,code = <KEY_VOLUMEUP>;
status = "okay";
};
&pmi8994_gpios {
@ -623,9 +617,9 @@
};
&pmi8994_wled {
status = "okay";
default-brightness = <512>;
qcom,num-strings = <3>;
status = "okay";
};
&rpm_requests {
@ -825,21 +819,18 @@
};
&sdhc1 {
/* eMMC doesn't seem to cooperate even in PIO mode.. */
status = "disabled";
vmmc-supply = <&pm8994_l20>;
vqmmc-supply = <&pm8994_s4>;
mmc-hs400-1_8v;
mmc-hs200-1_8v;
status = "okay";
};
&sdhc2 {
status = "okay";
cd-gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
vmmc-supply = <&pm8994_l21>;
vqmmc-supply = <&pm8994_l13>;
status = "okay";
};
&tlmm {
@ -943,18 +934,15 @@
};
};
/*
* For reasons that are currently unknown (but probably related to fusb301), USB takes about
* 6 minutes to wake up (nothing interesting in kernel logs), but then it works as it should.
*/
&usb3 {
status = "okay";
qcom,select-utmi-as-pipe-clk;
status = "okay";
};
&usb3_dwc3 {
extcon = <&usb3_id>;
dr_mode = "peripheral";
maximum-speed = "high-speed";
phys = <&hsusb_phy1>;
phy-names = "usb2-phy";
snps,hird-threshold = /bits/ 8 <0>;

2
arch/arm64/boot/dts/qcom/msm8996-v3.0.dtsi
View File

@ -19,7 +19,7 @@
* features get enabled upstream.
*/
gpu_opp_table_3_0: gpu-opp-table-30 {
gpu_opp_table_3_0: opp-table-gpu30 {
compatible = "operating-points-v2";
opp-624000000 {

6
arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts
View File

@ -54,7 +54,7 @@
reg = <0x30>;
#address-cells = <1>;
#size-cells = <0>;
enable-gpio = <&pm8994_gpios 7 1>;
enable-gpios = <&pm8994_gpios 7 1>;
clock-mode = /bits/8 <2>;
label = "button-backlight";
@ -62,14 +62,14 @@
reg = <0>;
chan-name = "button-backlight";
led-cur = /bits/ 8 <0x32>;
max-cur = /bits/ 8 <0xC8>;
max-cur = /bits/ 8 <0xc8>;
};
led@1 {
reg = <0>;
chan-name = "button-backlight1";
led-cur = /bits/ 8 <0x32>;
max-cur = /bits/ 8 <0xC8>;
max-cur = /bits/ 8 <0xc8>;
};
};
};

65
arch/arm64/boot/dts/qcom/msm8996.dtsi
View File

@ -462,6 +462,12 @@
reg = <0x0 0x91500000 0x0 0x200000>;
no-map;
};
mdata_mem: mpss-metadata {
alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
size = <0x0 0x4000>;
no-map;
};
};
rpm-glink {
@ -720,7 +726,9 @@
<&pciephy_1>,
<&pciephy_2>,
<&ssusb_phy_0>,
<0>, <0>, <0>;
<&ufsphy_lane 0>,
<&ufsphy_lane 1>,
<&ufsphy_lane 2>;
clock-names = "cxo",
"cxo2",
"sleep_clk",
@ -830,9 +838,11 @@
compatible = "qcom,msm8996-a2noc";
reg = <0x00583000 0x7000>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clock-names = "bus", "bus_a", "aggre2_ufs_axi", "ufs_axi";
clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>,
<&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>;
<&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>,
<&gcc GCC_AGGRE2_UFS_AXI_CLK>,
<&gcc GCC_UFS_AXI_CLK>;
};
mnoc: interconnect@5a4000 {
@ -904,7 +914,7 @@
<825000000>;
};
mdss: mdss@900000 {
mdss: display-subsystem@900000 {
compatible = "qcom,mdss";
reg = <0x00900000 0x1000>,
@ -930,8 +940,8 @@
status = "disabled";
mdp: mdp@901000 {
compatible = "qcom,mdp5";
mdp: display-controller@901000 {
compatible = "qcom,msm8996-mdp5", "qcom,mdp5";
reg = <0x00901000 0x90000>;
reg-names = "mdp_phys";
@ -989,7 +999,8 @@
};
dsi0: dsi@994000 {
compatible = "qcom,mdss-dsi-ctrl";
compatible = "qcom,msm8996-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0x00994000 0x400>;
reg-names = "dsi_ctrl";
@ -1056,7 +1067,8 @@
};
dsi1: dsi@996000 {
compatible = "qcom,mdss-dsi-ctrl";
compatible = "qcom,msm8996-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0x00996000 0x400>;
reg-names = "dsi_ctrl";
@ -1246,23 +1258,23 @@
};
opp-510000000 {
opp-hz = /bits/ 64 <510000000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-401800000 {
opp-hz = /bits/ 64 <401800000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-315000000 {
opp-hz = /bits/ 64 <315000000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-214000000 {
opp-hz = /bits/ 64 <214000000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-133000000 {
opp-hz = /bits/ 64 <133000000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
};
@ -1814,7 +1826,7 @@
#interrupt-cells = <4>;
};
agnoc@0 {
bus@0 {
power-domains = <&gcc AGGRE0_NOC_GDSC>;
compatible = "simple-pm-bus";
#address-cells = <1>;
@ -2048,6 +2060,7 @@
reg = <0x627400 0x12c>,
<0x627600 0x200>,
<0x627c00 0x1b4>;
#clock-cells = <1>;
#phy-cells = <0>;
};
};
@ -2458,6 +2471,10 @@
memory-region = <&mpss_mem>;
};
metadata {
memory-region = <&mdata_mem>;
};
smd-edge {
interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
@ -2940,8 +2957,8 @@
compatible = "qcom,msm8996-apcc";
reg = <0x06400000 0x90000>;
clock-names = "xo";
clocks = <&rpmcc RPM_SMD_BB_CLK1>;
clock-names = "xo", "sys_apcs_aux";
clocks = <&rpmcc RPM_SMD_BB_CLK1>, <&apcs_glb>;
#clock-cells = <1>;
};
@ -3288,7 +3305,7 @@
status = "disabled";
};
blsp2_spi6: spi@75ba000{
blsp2_spi6: spi@75ba000 {
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x075ba000 0x600>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
@ -3356,7 +3373,7 @@
slim_msm: slim-ngd@91c0000 {
compatible = "qcom,slim-ngd-v1.5.0";
reg = <0x091c0000 0x2C000>;
reg = <0x091c0000 0x2c000>;
interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&slimbam 3>, <&slimbam 4>;
dma-names = "rx", "tx";
@ -3426,8 +3443,7 @@
mboxes = <&apcs_glb 8>;
qcom,smd-edge = <1>;
qcom,remote-pid = <2>;
#address-cells = <1>;
#size-cells = <0>;
apr {
power-domains = <&gcc HLOS1_VOTE_LPASS_ADSP_GDSC>;
compatible = "qcom,apr-v2";
@ -3485,6 +3501,7 @@
reg = <0x09820000 0x1000>;
#mbox-cells = <1>;
#clock-cells = <0>;
};
timer@9840000 {
@ -3580,7 +3597,7 @@
type = "passive";
};
cpu0_crit: cpu_crit {
cpu0_crit: cpu-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -3601,7 +3618,7 @@
type = "passive";
};
cpu1_crit: cpu_crit {
cpu1_crit: cpu-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -3622,7 +3639,7 @@
type = "passive";
};
cpu2_crit: cpu_crit {
cpu2_crit: cpu-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -3643,7 +3660,7 @@
type = "passive";
};
cpu3_crit: cpu_crit {
cpu3_crit: cpu-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";

21
arch/arm64/boot/dts/qcom/msm8998-fxtec-pro1.dts
View File

@ -113,7 +113,7 @@
<&cam_snapshot_pin_a>;
button-vol-up {
label = "Volume Up";
gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_VOLUMEUP>;
gpio-key,wakeup;
@ -122,7 +122,7 @@
button-camera-snapshot {
label = "Camera Snapshot";
gpios = <&pm8998_gpio 7 GPIO_ACTIVE_LOW>;
gpios = <&pm8998_gpios 7 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_CAMERA>;
debounce-interval = <15>;
@ -130,7 +130,7 @@
button-camera-focus {
label = "Camera Focus";
gpios = <&pm8998_gpio 8 GPIO_ACTIVE_LOW>;
gpios = <&pm8998_gpios 8 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_CAMERA_FOCUS>;
debounce-interval = <15>;
@ -249,7 +249,7 @@
reg = <0x14>;
interrupt-parent = <&tlmm>;
interrupts = <125 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&tlmm 89 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;
AVDD28-supply = <&vreg_l28_3p0>;
VDDIO-supply = <&ts_vio_vreg>;
pinctrl-names = "active";
@ -338,7 +338,7 @@
};
};
&pm8998_gpio {
&pm8998_gpios {
vol_up_pin_a: vol-up-active-state {
pins = "gpio6";
function = "normal";
@ -364,14 +364,9 @@
};
};
&pm8998_pon {
resin {
compatible = "qcom,pm8941-resin";
interrupts = <GIC_SPI 0x8 1 IRQ_TYPE_EDGE_BOTH>;
bias-pull-up;
debounce = <15625>;
linux,code = <KEY_VOLUMEDOWN>;
};
&pm8998_resin {
linux,code = <KEY_VOLUMEDOWN>;
status = "okay";
};
&qusb2phy {

4
arch/arm64/boot/dts/qcom/msm8998-oneplus-cheeseburger.dts
View File

@ -23,7 +23,7 @@
pinctrl-0 = <&button_backlight_default>;
led-keypad-backlight {
gpios = <&pmi8998_gpio 5 GPIO_ACTIVE_HIGH>;
gpios = <&pmi8998_gpios 5 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_KBD_BACKLIGHT;
default-state = "off";
@ -31,7 +31,7 @@
};
};
&pmi8998_gpio {
&pmi8998_gpios {
button_backlight_default: button-backlight-state {
pins = "gpio5";
function = "gpio";

6
arch/arm64/boot/dts/qcom/msm8998-oneplus-common.dtsi
View File

@ -92,7 +92,7 @@
button-vol-down {
label = "Volume down";
gpios = <&pm8998_gpio 5 GPIO_ACTIVE_LOW>;
gpios = <&pm8998_gpios 5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
debounce-interval = <15>;
wakeup-source;
@ -100,7 +100,7 @@
button-vol-up {
label = "Volume up";
gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
debounce-interval = <15>;
wakeup-source;
@ -269,7 +269,7 @@
};
};
&pm8998_gpio {
&pm8998_gpios {
vol_keys_default: vol-keys-state {
pins = "gpio5", "gpio6";
function = "normal";

4
arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino-maple.dts
View File

@ -20,7 +20,7 @@
regulator-max-microvolt = <1350000>;
startup-delay-us = <0>;
enable-active-high;
gpio = <&pmi8998_gpio 10 GPIO_ACTIVE_HIGH>;
gpio = <&pmi8998_gpios 10 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&disp_dvdd_en>;
};
@ -37,7 +37,7 @@
qcom,soft-start-us = <200>;
};
&pmi8998_gpio {
&pmi8998_gpios {
disp_dvdd_en: disp-dvdd-en-active-state {
pins = "gpio10";
function = "normal";

27
arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi
View File

@ -25,7 +25,7 @@
pinctrl-names = "default";
clocks = <&rpmcc RPM_SMD_DIV_CLK1>;
#clock-cells = <0>;
enable-gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
enable-gpios = <&pm8998_gpios 13 GPIO_ACTIVE_HIGH>;
};
};
@ -65,7 +65,7 @@
regulator-name = "cam_vio_vreg";
startup-delay-us = <0>;
enable-active-high;
gpio = <&pmi8998_gpio 1 GPIO_ACTIVE_HIGH>;
gpio = <&pmi8998_gpios 1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&cam_vio_default>;
vin-supply = <&vreg_lvs1a_1p8>;
@ -103,7 +103,7 @@
<&cam_snapshot_pin_a>;
button-vol-down {
label = "Volume Down";
gpios = <&pm8998_gpio 5 GPIO_ACTIVE_LOW>;
gpios = <&pm8998_gpios 5 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_VOLUMEDOWN>;
gpio-key,wakeup;
@ -112,7 +112,7 @@
button-camera-snapshot {
label = "Camera Snapshot";
gpios = <&pm8998_gpio 7 GPIO_ACTIVE_LOW>;
gpios = <&pm8998_gpios 7 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_CAMERA>;
debounce-interval = <15>;
@ -120,7 +120,7 @@
button-camera-focus {
label = "Camera Focus";
gpios = <&pm8998_gpio 8 GPIO_ACTIVE_LOW>;
gpios = <&pm8998_gpios 8 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_CAMERA_FOCUS>;
debounce-interval = <15>;
@ -187,7 +187,7 @@
vibrator {
compatible = "gpio-vibrator";
enable-gpios = <&pmi8998_gpio 5 GPIO_ACTIVE_HIGH>;
enable-gpios = <&pmi8998_gpios 5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vib_default>;
};
@ -303,7 +303,7 @@
};
};
&pm8998_gpio {
&pm8998_gpios {
vol_down_pin_a: vol-down-active-state {
pins = "gpio5";
function = PMIC_GPIO_FUNC_NORMAL;
@ -335,7 +335,7 @@
};
};
&pmi8998_gpio {
&pmi8998_gpios {
cam_vio_default: cam-vio-active-state {
pins = "gpio1";
function = PMIC_GPIO_FUNC_NORMAL;
@ -357,14 +357,9 @@
};
};
&pm8998_pon {
resin {
compatible = "qcom,pm8941-resin";
interrupts = <GIC_SPI 0x8 1 IRQ_TYPE_EDGE_BOTH>;
debounce = <15625>;
bias-pull-up;
linux,code = <KEY_VOLUMEUP>;
};
&pm8998_resin {
linux,code = <KEY_VOLUMEUP>;
status = "okay";
};
&qusb2phy {

4
arch/arm64/boot/dts/qcom/msm8998-xiaomi-sagit.dts
View File

@ -133,7 +133,7 @@
key-vol-up {
label = "Volume up";
gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
debounce-interval = <15>;
wakeup-source;
@ -278,7 +278,7 @@
};
};
&pm8998_gpio {
&pm8998_gpios {
vol_up_key_default: vol-up-key-default-state {
pins = "gpio6";
function = "normal";

48
arch/arm64/boot/dts/qcom/msm8998.dtsi
View File

@ -108,6 +108,12 @@
reg = <0x0 0x95700000 0x0 0x100000>;
no-map;
};
mdata_mem: mpss-metadata {
alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
size = <0x0 0x4000>;
no-map;
};
};
clocks {
@ -465,7 +471,7 @@
type = "passive";
};
cpu0_crit: cpu_crit {
cpu0_crit: cpu-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -486,7 +492,7 @@
type = "passive";
};
cpu1_crit: cpu_crit {
cpu1_crit: cpu-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -507,7 +513,7 @@
type = "passive";
};
cpu2_crit: cpu_crit {
cpu2_crit: cpu-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -528,7 +534,7 @@
type = "passive";
};
cpu3_crit: cpu_crit {
cpu3_crit: cpu-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -549,7 +555,7 @@
type = "passive";
};
cpu4_crit: cpu_crit {
cpu4_crit: cpu-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -570,7 +576,7 @@
type = "passive";
};
cpu5_crit: cpu_crit {
cpu5_crit: cpu-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -591,7 +597,7 @@
type = "passive";
};
cpu6_crit: cpu_crit {
cpu6_crit: cpu-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -612,7 +618,7 @@
type = "passive";
};
cpu7_crit: cpu_crit {
cpu7_crit: cpu-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -808,7 +814,7 @@
reg = <0x00100000 0xb0000>;
clock-names = "xo", "sleep_clk";
clocks = <&xo>, <&sleep_clk>;
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep_clk>;
/*
* The hypervisor typically configures the memory region where these clocks
@ -1357,6 +1363,10 @@
memory-region = <&mpss_mem>;
};
metadata {
memory-region = <&mdata_mem>;
};
glink-edge {
interrupts = <GIC_SPI 452 IRQ_TYPE_EDGE_RISING>;
label = "modem";
@ -1394,43 +1404,43 @@
opp-710000097 {
opp-hz = /bits/ 64 <710000097>;
opp-level = <RPM_SMD_LEVEL_TURBO>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-670000048 {
opp-hz = /bits/ 64 <670000048>;
opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-596000097 {
opp-hz = /bits/ 64 <596000097>;
opp-level = <RPM_SMD_LEVEL_NOM>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-515000097 {
opp-hz = /bits/ 64 <515000097>;
opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-414000000 {
opp-hz = /bits/ 64 <414000000>;
opp-level = <RPM_SMD_LEVEL_SVS>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-342000000 {
opp-hz = /bits/ 64 <342000000>;
opp-level = <RPM_SMD_LEVEL_LOW_SVS>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-257000000 {
opp-hz = /bits/ 64 <257000000>;
opp-level = <RPM_SMD_LEVEL_MIN_SVS>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
};
};
@ -2088,7 +2098,7 @@
clock-names = "iface", "core", "xo";
clocks = <&gcc GCC_SDCC2_AHB_CLK>,
<&gcc GCC_SDCC2_APPS_CLK>,
<&xo>;
<&rpmcc RPM_SMD_XO_CLK_SRC>;
bus-width = <4>;
status = "disabled";
};
@ -2398,8 +2408,7 @@
"dsi1byte",
"hdmipll",
"dplink",
"dpvco",
"core_bi_pll_test_se";
"dpvco";
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
<&gcc GCC_MMSS_GPLL0_CLK>,
<0>,
@ -2408,7 +2417,6 @@
<0>,
<0>,
<0>,
<0>,
<0>;
};

4
arch/arm64/boot/dts/qcom/pm6125.dtsi
View File

@ -136,11 +136,11 @@
status = "disabled";
};
pm6125_gpio: gpio@c000 {
pm6125_gpios: gpio@c000 {
compatible = "qcom,pm6125-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm6125_gpio 0 0 9>;
gpio-ranges = <&pm6125_gpios 0 0 9>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

4
arch/arm64/boot/dts/qcom/pm6150.dtsi
View File

@ -88,11 +88,11 @@
status = "disabled";
};
pm6150_gpio: gpio@c000 {
pm6150_gpios: gpio@c000 {
compatible = "qcom,pm6150-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm6150_gpio 0 0 10>;
gpio-ranges = <&pm6150_gpios 0 0 10>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

10
arch/arm64/boot/dts/qcom/pm6150l.dtsi
View File

@ -95,11 +95,11 @@
status = "disabled";
};
pm6150l_gpio: gpio@c000 {
pm6150l_gpios: gpio@c000 {
compatible = "qcom,pm6150l-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm6150l_gpio 0 0 12>;
gpio-ranges = <&pm6150l_gpios 0 0 12>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@ -112,6 +112,12 @@
#address-cells = <1>;
#size-cells = <0>;
pm6150l_flash: led-controller@d300 {
compatible = "qcom,pm6150l-flash-led", "qcom,spmi-flash-led";
reg = <0xd300>;
status = "disabled";
};
pm6150l_wled: leds@d800 {
compatible = "qcom,pm6150l-wled";
reg = <0xd800>, <0xd900>;

8
arch/arm64/boot/dts/qcom/pm7250b.dtsi
View File

@ -110,6 +110,14 @@
label = "chg_mid";
};
adc-chan@4b {
reg = <ADC5_BAT_ID_100K_PU>;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
qcom,ratiometric;
label = "bat_id";
};
adc-chan@83 {
reg = <ADC5_VPH_PWR>;
qcom,pre-scaling = <1 3>;

4
arch/arm64/boot/dts/qcom/pm8005.dtsi
View File

@ -11,11 +11,11 @@
#address-cells = <1>;
#size-cells = <0>;
pm8005_gpio: gpio@c000 {
pm8005_gpios: gpio@c000 {
compatible = "qcom,pm8005-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8005_gpio 0 0 4>;
gpio-ranges = <&pm8005_gpios 0 0 4>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

84
arch/arm64/boot/dts/qcom/pm8010.dtsi Normal file
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@ -0,0 +1,84 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2022, Linaro Limited
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
/ {
thermal-zones {
pm8010-m-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&pm8010_m_temp_alarm>;
trips {
trip0 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
trip1 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
};
};
pm8010-n-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&pm8010_n_temp_alarm>;
trips {
trip0 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
trip1 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
};
};
};
};
&spmi_bus {
pm8010_m: pmic@c {
compatible = "qcom,pm8010", "qcom,spmi-pmic";
reg = <0xc SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8010_m_temp_alarm: temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400>;
interrupts = <0xc 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
#thermal-sensor-cells = <0>;
};
};
pm8010_n: pmic@d {
compatible = "qcom,pm8010", "qcom,spmi-pmic";
reg = <0xd SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8010_n_temp_alarm: temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400>;
interrupts = <0xd 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
#thermal-sensor-cells = <0>;
};
};
};

2
arch/arm64/boot/dts/qcom/pm8150.dtsi
View File

@ -121,7 +121,7 @@
rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000>;
reg = <0x6000>, <0x6100>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
};

59
arch/arm64/boot/dts/qcom/pm8550.dtsi Normal file
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@ -0,0 +1,59 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2022, Linaro Limited
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
/ {
thermal-zones {
pm8550-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&pm8550_temp_alarm>;
trips {
trip0 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
trip1 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
};
};
};
};
&spmi_bus {
pm8550: pmic@1 {
compatible = "qcom,pm8550", "qcom,spmi-pmic";
reg = <0x1 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8550_temp_alarm: temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
reg = <0xa00>;
interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
#thermal-sensor-cells = <0>;
};
pm8550_gpios: gpio@8800 {
compatible = "qcom,pm8550-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
gpio-controller;
gpio-ranges = <&pm8550_gpios 0 0 12>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};

59
arch/arm64/boot/dts/qcom/pm8550b.dtsi Normal file
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@ -0,0 +1,59 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2022, Linaro Limited
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
/ {
thermal-zones {
pm8550b-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&pm8550b_temp_alarm>;
trips {
trip0 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
trip1 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
};
};
};
};
&spmi_bus {
pm8550b: pmic@7 {
compatible = "qcom,pm8550", "qcom,spmi-pmic";
reg = <0x7 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8550b_temp_alarm: temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
reg = <0xa00>;
interrupts = <0x7 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
#thermal-sensor-cells = <0>;
};
pm8550b_gpios: gpio@8800 {
compatible = "qcom,pm8550b-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
gpio-controller;
gpio-ranges = <&pm8550b_gpios 0 0 12>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};

59
arch/arm64/boot/dts/qcom/pm8550ve.dtsi Normal file
View File

@ -0,0 +1,59 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2022, Linaro Limited
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
/ {
thermal-zones {
pm8550ve-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&pm8550ve_temp_alarm>;
trips {
trip0 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
trip1 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
};
};
};
};
&spmi_bus {
pm8550ve: pmic@5 {
compatible = "qcom,pm8550", "qcom,spmi-pmic";
reg = <0x5 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8550ve_temp_alarm: temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
reg = <0xa00>;
interrupts = <0x5 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
#thermal-sensor-cells = <0>;
};
pm8550ve_gpios: gpio@8800 {
compatible = "qcom,pm8550ve-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
gpio-controller;
gpio-ranges = <&pm8550ve_gpios 0 0 8>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};

194
arch/arm64/boot/dts/qcom/pm8550vs.dtsi Normal file
View File

@ -0,0 +1,194 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2022, Linaro Limited
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
/ {
thermal-zones {
pm8550vs-c-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&pm8550vs_c_temp_alarm>;
trips {
trip0 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
trip1 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
};
};
pm8550vs-d-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&pm8550vs_d_temp_alarm>;
trips {
trip0 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
trip1 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
};
};
pm8550vs-e-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&pm8550vs_e_temp_alarm>;
trips {
trip0 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
trip1 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
};
};
pm8550vs-g-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&pm8550vs_g_temp_alarm>;
trips {
trip0 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
trip1 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
};
};
};
};
&spmi_bus {
pm8550vs_c: pmic@2 {
compatible = "qcom,pm8550", "qcom,spmi-pmic";
reg = <0x2 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8550vs_c_temp_alarm: temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
reg = <0xa00>;
interrupts = <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
#thermal-sensor-cells = <0>;
};
pm8550vs_c_gpios: gpio@8800 {
compatible = "qcom,pm8550vs-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
gpio-controller;
gpio-ranges = <&pm8550vs_c_gpios 0 0 6>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pm8550vs_d: pmic@3 {
compatible = "qcom,pm8550", "qcom,spmi-pmic";
reg = <0x3 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8550vs_d_temp_alarm: temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
reg = <0xa00>;
interrupts = <0x3 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
#thermal-sensor-cells = <0>;
};
pm8550vs_d_gpios: gpio@8800 {
compatible = "qcom,pm8550vs-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
gpio-controller;
gpio-ranges = <&pm8550vs_d_gpios 0 0 6>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pm8550vs_e: pmic@4 {
compatible = "qcom,pm8550", "qcom,spmi-pmic";
reg = <0x4 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8550vs_e_temp_alarm: temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
reg = <0xa00>;
interrupts = <0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
#thermal-sensor-cells = <0>;
};
pm8550vs_e_gpios: gpio@8800 {
compatible = "qcom,pm8550vs-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
gpio-controller;
gpio-ranges = <&pm8550vs_e_gpios 0 0 6>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pm8550vs_g: pmic@6 {
compatible = "qcom,pm8550", "qcom,spmi-pmic";
reg = <0x6 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8550vs_g_temp_alarm: temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
reg = <0xa00>;
interrupts = <0x6 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
#thermal-sensor-cells = <0>;
};
pm8550vs_g_gpios: gpio@8800 {
compatible = "qcom,pm8550vs-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
gpio-controller;
gpio-ranges = <&pm8550vs_g_gpios 0 0 6>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};

3
arch/arm64/boot/dts/qcom/pm8916.dtsi
View File

@ -93,7 +93,8 @@
rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000>;
reg = <0x6000>, <0x6100>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
};

6
arch/arm64/boot/dts/qcom/pm8950.dtsi
View File

@ -126,7 +126,7 @@
rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000>;
reg = <0x6000>, <0x6100>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
};
@ -141,11 +141,11 @@
#interrupt-cells = <2>;
};
pm8950_gpio: gpio@c000 {
pm8950_gpios: gpio@c000 {
compatible = "qcom,pm8950-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8950_gpio 0 0 8>;
gpio-ranges = <&pm8950_gpios 0 0 8>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

4
arch/arm64/boot/dts/qcom/pm8998.dtsi
View File

@ -109,11 +109,11 @@
interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
};
pm8998_gpio: gpio@c000 {
pm8998_gpios: gpio@c000 {
compatible = "qcom,pm8998-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8998_gpio 0 0 26>;
gpio-ranges = <&pm8998_gpios 0 0 26>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

6
arch/arm64/boot/dts/qcom/pmi8950.dtsi
View File

@ -47,7 +47,7 @@
adc-chan@a {
reg = <VADC_REF_1250MV>;
qcom,pre-scaling = <1 1>;
label = "ref_1250v";
label = "ref_1250mv";
};
adc-chan@d {
@ -67,11 +67,11 @@
#interrupt-cells = <2>;
};
pmi8950_gpio: gpio@c000 {
pmi8950_gpios: gpio@c000 {
compatible = "qcom,pmi8950-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pmi8950_gpio 0 0 2>;
gpio-ranges = <&pmi8950_gpios 0 0 2>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

4
arch/arm64/boot/dts/qcom/pmi8998.dtsi
View File

@ -9,11 +9,11 @@
#address-cells = <1>;
#size-cells = <0>;
pmi8998_gpio: gpio@c000 {
pmi8998_gpios: gpio@c000 {
compatible = "qcom,pmi8998-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pmi8998_gpio 0 0 14>;
gpio-ranges = <&pmi8998_gpios 0 0 14>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

55
arch/arm64/boot/dts/qcom/pmk8550.dtsi Normal file
View File

@ -0,0 +1,55 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2022, Linaro Limited
*/
#include <dt-bindings/input/input.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
&spmi_bus {
pmk8550: pmic@0 {
compatible = "qcom,pm8550", "qcom,spmi-pmic";
reg = <0x0 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pmk8550_pon: pon@1300 {
compatible = "qcom,pm8998-pon";
reg = <0x1300>, <0x800>;
reg-names = "hlos", "pbs";
pon_pwrkey: pwrkey {
compatible = "qcom,pmk8350-pwrkey";
interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
linux,code = <KEY_POWER>;
status = "disabled";
};
pon_resin: resin {
compatible = "qcom,pmk8350-resin";
interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
status = "disabled";
};
};
pmk8550_rtc: rtc@6100 {
compatible = "qcom,pmk8350-rtc";
reg = <0x6100>, <0x6200>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
pmk8550_gpios: gpio@8800 {
compatible = "qcom,pmk8550-gpio", "qcom,spmi-gpio";
reg = <0xb800>;
gpio-controller;
gpio-ranges = <&pmk8550_gpios 0 0 6>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};

2
arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
View File

@ -108,7 +108,7 @@
pmm8155au_1_rtc: rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000>;
reg = <0x6000>, <0x6100>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;

2
arch/arm64/boot/dts/qcom/pmp8074.dtsi
View File

@ -74,7 +74,7 @@
pmp8074_rtc: rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000>;
reg = <0x6000>, <0x6100>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
allow-set-time;

104
arch/arm64/boot/dts/qcom/pmr735d.dtsi Normal file
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@ -0,0 +1,104 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2022, Linaro Limited
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
/ {
thermal-zones {
pmr735d-k-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&pmr735d_k_temp_alarm>;
trips {
trip0 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
trip1 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
};
};
pmr735d-l-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&pmr735d_l_temp_alarm>;
trips {
trip0 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
trip1 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
};
};
};
};
&spmi_bus {
pmr735d_k: pmic@a {
compatible = "qcom,pmr735d", "qcom,spmi-pmic";
reg = <0xa SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pmr735d_k_temp_alarm: temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
reg = <0xa00>;
interrupts = <0xa 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
#thermal-sensor-cells = <0>;
};
pmr735d_k_gpios: gpio@8800 {
compatible = "qcom,pmr735d-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
gpio-controller;
gpio-ranges = <&pmr735d_k_gpios 0 0 2>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pmr735d_l: pmic@b {
compatible = "qcom,pmr735d", "qcom,spmi-pmic";
reg = <0xb SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pmr735d_l_temp_alarm: temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
reg = <0xa00>;
interrupts = <0xb 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
#thermal-sensor-cells = <0>;
};
pmr735d_l_gpios: gpio@8800 {
compatible = "qcom,pmr735d-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
gpio-controller;
gpio-ranges = <&pmr735d_l_gpios 0 0 2>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};

2
arch/arm64/boot/dts/qcom/pms405.dtsi
View File

@ -125,7 +125,7 @@
rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000>;
reg = <0x6000>, <0x6100>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
};

222
arch/arm64/boot/dts/qcom/qcs404.dtsi
View File

@ -230,6 +230,8 @@
rpmcc: clock-controller {
compatible = "qcom,rpmcc-qcs404", "qcom,rpmcc";
#clock-cells = <1>;
clocks = <&xo_board>;
clock-names = "xo";
};
rpmpd: power-controller {
@ -366,13 +368,126 @@
reg = <0x000a4000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
tsens_caldata: caldata@d0 {
reg = <0x1f8 0x14>;
};
cpr_efuse_speedbin: speedbin@13c {
reg = <0x13c 0x4>;
bits = <2 3>;
};
tsens_s0_p1: s0-p1@1f8 {
reg = <0x1f8 0x1>;
bits = <0 6>;
};
tsens_s0_p2: s0-p2@1f8 {
reg = <0x1f8 0x2>;
bits = <6 6>;
};
tsens_s1_p1: s1-p1@1f9 {
reg = <0x1f9 0x2>;
bits = <4 6>;
};
tsens_s1_p2: s1-p2@1fa {
reg = <0x1fa 0x1>;
bits = <2 6>;
};
tsens_s2_p1: s2-p1@1fb {
reg = <0x1fb 0x1>;
bits = <0 6>;
};
tsens_s2_p2: s2-p2@1fb {
reg = <0x1fb 0x2>;
bits = <6 6>;
};
tsens_s3_p1: s3-p1@1fc {
reg = <0x1fc 0x2>;
bits = <4 6>;
};
tsens_s3_p2: s3-p2@1fd {
reg = <0x1fd 0x1>;
bits = <2 6>;
};
tsens_s4_p1: s4-p1@1fe {
reg = <0x1fe 0x1>;
bits = <0 6>;
};
tsens_s4_p2: s4-p2@1fe {
reg = <0x1fe 0x2>;
bits = <6 6>;
};
tsens_s5_p1: s5-p1@200 {
reg = <0x200 0x1>;
bits = <0 6>;
};
tsens_s5_p2: s5-p2@200 {
reg = <0x200 0x2>;
bits = <6 6>;
};
tsens_s6_p1: s6-p1@201 {
reg = <0x201 0x2>;
bits = <4 6>;
};
tsens_s6_p2: s6-p2@202 {
reg = <0x202 0x1>;
bits = <2 6>;
};
tsens_s7_p1: s7-p1@203 {
reg = <0x203 0x1>;
bits = <0 6>;
};
tsens_s7_p2: s7-p2@203 {
reg = <0x203 0x2>;
bits = <6 6>;
};
tsens_s8_p1: s8-p1@204 {
reg = <0x204 0x2>;
bits = <4 6>;
};
tsens_s8_p2: s8-p2@205 {
reg = <0x205 0x1>;
bits = <2 6>;
};
tsens_s9_p1: s9-p1@206 {
reg = <0x206 0x1>;
bits = <0 6>;
};
tsens_s9_p2: s9-p2@206 {
reg = <0x206 0x2>;
bits = <6 6>;
};
tsens_mode: mode@208 {
reg = <0x208 1>;
bits = <0 3>;
};
tsens_base1: base1@208 {
reg = <0x208 2>;
bits = <3 8>;
};
tsens_base2: base2@208 {
reg = <0x209 2>;
bits = <3 8>;
};
cpr_efuse_quot_offset1: qoffset1@231 {
reg = <0x231 0x4>;
bits = <4 7>;
@ -447,8 +562,30 @@
compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
reg = <0x004a9000 0x1000>, /* TM */
<0x004a8000 0x1000>; /* SROT */
nvmem-cells = <&tsens_caldata>;
nvmem-cell-names = "calib";
nvmem-cells = <&tsens_mode>,
<&tsens_base1>, <&tsens_base2>,
<&tsens_s0_p1>, <&tsens_s0_p2>,
<&tsens_s1_p1>, <&tsens_s1_p2>,
<&tsens_s2_p1>, <&tsens_s2_p2>,
<&tsens_s3_p1>, <&tsens_s3_p2>,
<&tsens_s4_p1>, <&tsens_s4_p2>,
<&tsens_s5_p1>, <&tsens_s5_p2>,
<&tsens_s6_p1>, <&tsens_s6_p2>,
<&tsens_s7_p1>, <&tsens_s7_p2>,
<&tsens_s8_p1>, <&tsens_s8_p2>,
<&tsens_s9_p1>, <&tsens_s9_p2>;
nvmem-cell-names = "mode",
"base1", "base2",
"s0_p1", "s0_p2",
"s1_p1", "s1_p2",
"s2_p1", "s2_p2",
"s3_p1", "s3_p2",
"s4_p1", "s4_p2",
"s5_p1", "s5_p2",
"s6_p1", "s6_p2",
"s7_p1", "s7_p2",
"s8_p1", "s8_p2",
"s9_p1", "s9_p2";
#qcom,sensors = <10>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "uplow";
@ -485,27 +622,31 @@
interrupt-names = "wdog", "fatal", "ready",
"handover", "stop-ack";
clocks = <&xo_board>,
<&gcc GCC_CDSP_CFG_AHB_CLK>,
<&gcc GCC_CDSP_TBU_CLK>,
<&gcc GCC_BIMC_CDSP_CLK>,
<&turingcc TURING_WRAPPER_AON_CLK>,
<&turingcc TURING_Q6SS_AHBS_AON_CLK>,
<&turingcc TURING_Q6SS_AHBM_AON_CLK>,
<&turingcc TURING_Q6SS_Q6_AXIM_CLK>;
clock-names = "xo",
"sway",
"tbu",
"bimc",
"ahb_aon",
"q6ss_slave",
"q6ss_master",
"q6_axim";
clocks = <&xo_board>;
clock-names = "xo";
resets = <&gcc GCC_CDSP_RESTART>;
reset-names = "restart";
qcom,halt-regs = <&tcsr 0x19004>;
/*
* If the node was using the PIL binding, then include properties:
* clocks = <&xo_board>,
* <&gcc GCC_CDSP_CFG_AHB_CLK>,
* <&gcc GCC_CDSP_TBU_CLK>,
* <&gcc GCC_BIMC_CDSP_CLK>,
* <&turingcc TURING_WRAPPER_AON_CLK>,
* <&turingcc TURING_Q6SS_AHBS_AON_CLK>,
* <&turingcc TURING_Q6SS_AHBM_AON_CLK>,
* <&turingcc TURING_Q6SS_Q6_AXIM_CLK>;
* clock-names = "xo",
* "sway",
* "tbu",
* "bimc",
* "ahb_aon",
* "q6ss_slave",
* "q6ss_master",
* "q6_axim";
* resets = <&gcc GCC_CDSP_RESTART>;
* reset-names = "restart";
* qcom,halt-regs = <&tcsr 0x19004>;
*/
memory-region = <&cdsp_fw_mem>;
@ -729,6 +870,14 @@
reg = <0x01800000 0x80000>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
clocks = <&xo_board>,
<&sleep_clk>,
<&pcie_phy>,
<0>,
<0>,
<0>;
assigned-clocks = <&gcc GCC_APSS_AHB_CLK_SRC>;
assigned-clock-rates = <19200000>;
@ -806,10 +955,11 @@
clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
resets = <&gcc GCC_PCIEPHY_0_PHY_BCR>,
<&gcc 21>;
<&gcc GCC_PCIE_0_PIPE_ARES>;
reset-names = "phy", "pipe";
clock-output-names = "pcie_0_pipe_clk";
#clock-cells = <0>;
#phy-cells = <0>;
status = "disabled";
@ -1336,12 +1486,12 @@
<&gcc GCC_PCIE_0_SLV_AXI_CLK>;
clock-names = "iface", "aux", "master_bus", "slave_bus";
resets = <&gcc 18>,
<&gcc 17>,
<&gcc 15>,
<&gcc 19>,
resets = <&gcc GCC_PCIE_0_AXI_MASTER_ARES>,
<&gcc GCC_PCIE_0_AXI_SLAVE_ARES>,
<&gcc GCC_PCIE_0_AXI_MASTER_STICKY_ARES>,
<&gcc GCC_PCIE_0_CORE_STICKY_ARES>,
<&gcc GCC_PCIE_0_BCR>,
<&gcc 16>;
<&gcc GCC_PCIE_0_AHB_ARES>;
reset-names = "axi_m",
"axi_s",
"axi_m_sticky",
@ -1502,7 +1652,7 @@
hysteresis = <2000>;
type = "passive";
};
cluster_crit: cluster_crit {
cluster_crit: cluster-crit {
temperature = <120000>;
hysteresis = <2000>;
type = "critical";
@ -1536,7 +1686,7 @@
hysteresis = <2000>;
type = "passive";
};
cpu0_crit: cpu_crit {
cpu0_crit: cpu-crit {
temperature = <120000>;
hysteresis = <2000>;
type = "critical";
@ -1570,7 +1720,7 @@
hysteresis = <2000>;
type = "passive";
};
cpu1_crit: cpu_crit {
cpu1_crit: cpu-crit {
temperature = <120000>;
hysteresis = <2000>;
type = "critical";
@ -1604,7 +1754,7 @@
hysteresis = <2000>;
type = "passive";
};
cpu2_crit: cpu_crit {
cpu2_crit: cpu-crit {
temperature = <120000>;
hysteresis = <2000>;
type = "critical";
@ -1638,7 +1788,7 @@
hysteresis = <2000>;
type = "passive";
};
cpu3_crit: cpu_crit {
cpu3_crit: cpu-crit {
temperature = <120000>;
hysteresis = <2000>;
type = "critical";

2
arch/arm64/boot/dts/qcom/sa8155p-adp.dts
View File

@ -23,7 +23,7 @@
stdout-path = "serial0:115200n8";
};
vreg_3p3: vreg_3p3_regulator {
vreg_3p3: vreg-3p3-regulator {
compatible = "regulator-fixed";
regulator-name = "vreg_3p3";
regulator-min-microvolt = <3300000>;

330
arch/arm64/boot/dts/qcom/sa8295p-adp.dts
View File

@ -11,18 +11,103 @@
#include <dt-bindings/spmi/spmi.h>
#include "sa8540p.dtsi"
#include "sa8540p-pmics.dtsi"
/ {
model = "Qualcomm SA8295P ADP";
compatible = "qcom,sa8295p-adp", "qcom,sa8540p";
aliases {
serial0 = &qup2_uart17;
serial0 = &uart17;
};
chosen {
stdout-path = "serial0:115200n8";
};
dp2-connector {
compatible = "dp-connector";
label = "DP2";
type = "mini";
hpd-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
port {
dp2_connector_in: endpoint {
remote-endpoint = <&mdss1_dp0_phy_out>;
};
};
};
dp3-connector {
compatible = "dp-connector";
label = "DP3";
type = "mini";
hpd-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
port {
dp3_connector_in: endpoint {
remote-endpoint = <&mdss1_dp1_phy_out>;
};
};
};
edp0-connector {
compatible = "dp-connector";
label = "EDP0";
type = "mini";
hpd-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
port {
edp0_connector_in: endpoint {
remote-endpoint = <&mdss0_dp2_phy_out>;
};
};
};
edp1-connector {
compatible = "dp-connector";
label = "EDP1";
type = "mini";
hpd-gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
port {
edp1_connector_in: endpoint {
remote-endpoint = <&mdss0_dp3_phy_out>;
};
};
};
edp2-connector {
compatible = "dp-connector";
label = "EDP2";
type = "mini";
hpd-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>;
port {
edp2_connector_in: endpoint {
remote-endpoint = <&mdss1_dp2_phy_out>;
};
};
};
edp3-connector {
compatible = "dp-connector";
label = "EDP3";
type = "mini";
hpd-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
port {
edp3_connector_in: endpoint {
remote-endpoint = <&mdss1_dp3_phy_out>;
};
};
};
};
&apps_rsc {
@ -159,13 +244,168 @@
vreg_l8g: ldo8 {
regulator-name = "vreg_l8g";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
regulator-min-microvolt = <912000>;
regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l11g: ldo11 {
regulator-name = "vreg_l11g";
regulator-min-microvolt = <912000>;
regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
};
};
&dispcc0 {
status = "okay";
};
&dispcc1 {
status = "okay";
};
&mdss0 {
status = "okay";
};
&mdss0_dp2 {
data-lanes = <0 1 2 3>;
status = "okay";
ports {
port@1 {
reg = <1>;
mdss0_dp2_phy_out: endpoint {
remote-endpoint = <&edp0_connector_in>;
};
};
};
};
&mdss0_dp2_phy {
vdda-phy-supply = <&vreg_l8g>;
vdda-pll-supply = <&vreg_l3g>;
status = "okay";
};
&mdss0_dp3 {
data-lanes = <0 1 2 3>;
status = "okay";
ports {
port@1 {
reg = <1>;
mdss0_dp3_phy_out: endpoint {
remote-endpoint = <&edp1_connector_in>;
};
};
};
};
&mdss0_dp3_phy {
vdda-phy-supply = <&vreg_l8g>;
vdda-pll-supply = <&vreg_l3g>;
status = "okay";
};
&mdss1 {
status = "okay";
};
&mdss1_dp0 {
data-lanes = <0 1 2 3>;
status = "okay";
ports {
port@1 {
reg = <1>;
mdss1_dp0_phy_out: endpoint {
remote-endpoint = <&dp2_connector_in>;
};
};
};
};
&mdss1_dp0_phy {
vdda-phy-supply = <&vreg_l11g>;
vdda-pll-supply = <&vreg_l3g>;
status = "okay";
};
&mdss1_dp1 {
data-lanes = <0 1 2 3>;
status = "okay";
ports {
port@1 {
reg = <1>;
mdss1_dp1_phy_out: endpoint {
remote-endpoint = <&dp3_connector_in>;
};
};
};
};
&mdss1_dp1_phy {
vdda-phy-supply = <&vreg_l11g>;
vdda-pll-supply = <&vreg_l3g>;
status = "okay";
};
&mdss1_dp2 {
data-lanes = <0 1 2 3>;
status = "okay";
ports {
port@1 {
reg = <1>;
mdss1_dp2_phy_out: endpoint {
remote-endpoint = <&edp2_connector_in>;
};
};
};
};
&mdss1_dp2_phy {
vdda-phy-supply = <&vreg_l11g>;
vdda-pll-supply = <&vreg_l3g>;
status = "okay";
};
&mdss1_dp3 {
data-lanes = <0 1 2 3>;
status = "okay";
ports {
port@1 {
reg = <1>;
mdss1_dp3_phy_out: endpoint {
remote-endpoint = <&edp3_connector_in>;
};
};
};
};
&mdss1_dp3_phy {
vdda-phy-supply = <&vreg_l11g>;
vdda-pll-supply = <&vreg_l3g>;
status = "okay";
};
&pcie2a {
perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
@ -240,11 +480,6 @@
status = "okay";
};
&qup2_uart17 {
compatible = "qcom,geni-debug-uart";
status = "okay";
};
&remoteproc_adsp {
firmware-name = "qcom/sa8540p/adsp.mbn";
status = "okay";
@ -260,82 +495,9 @@
status = "okay";
};
&spmi_bus {
pm8450a: pmic@0 {
compatible = "qcom,pm8150", "qcom,spmi-pmic";
reg = <0x0 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
wakeup-source;
};
pm8450a_gpios: gpio@c000 {
compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8450a_gpios 0 0 10>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pm8450c: pmic@4 {
compatible = "qcom,pm8150", "qcom,spmi-pmic";
reg = <0x4 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8450c_gpios: gpio@c000 {
compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8450c_gpios 0 0 10>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pm8450e: pmic@8 {
compatible = "qcom,pm8150", "qcom,spmi-pmic";
reg = <0x8 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8450e_gpios: gpio@c000 {
compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8450e_gpios 0 0 10>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pm8450g: pmic@c {
compatible = "qcom,pm8150", "qcom,spmi-pmic";
reg = <0xc SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8450g_gpios: gpio@c000 {
compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8450g_gpios 0 0 10>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
&uart17 {
compatible = "qcom,geni-debug-uart";
status = "okay";
};
&ufs_mem_hc {

33
arch/arm64/boot/dts/qcom/pm8450a.dtsi → arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi
View File

@ -4,71 +4,80 @@
* Copyright (c) 2022, Linaro Limited
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
&spmi_bus {
pm8450a: pmic@0 {
pmm8540a: pmic@0 {
compatible = "qcom,pm8150", "qcom,spmi-pmic";
reg = <0x0 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8450a_gpios: gpio@c000 {
rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000>, <0x6100>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
wakeup-source;
};
pmm8540a_gpios: gpio@c000 {
compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8450a_gpios 0 0 10>;
gpio-ranges = <&pmm8540a_gpios 0 0 10>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pm8450c: pmic@4 {
pmm8540c: pmic@4 {
compatible = "qcom,pm8150", "qcom,spmi-pmic";
reg = <0x4 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8450c_gpios: gpio@c000 {
pmm8540c_gpios: gpio@c000 {
compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8450c_gpios 0 0 10>;
gpio-ranges = <&pmm8540c_gpios 0 0 10>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pm8450e: pmic@8 {
pmm8540e: pmic@8 {
compatible = "qcom,pm8150", "qcom,spmi-pmic";
reg = <0x8 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8450e_gpios: gpio@c000 {
pmm8540e_gpios: gpio@c000 {
compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8450e_gpios 0 0 10>;
gpio-ranges = <&pmm8540e_gpios 0 0 10>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pm8450g: pmic@c {
pmm8540g: pmic@c {
compatible = "qcom,pm8150", "qcom,spmi-pmic";
reg = <0xc SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8450g_gpios: gpio@c000 {
pmm8540g_gpios: gpio@c000 {
compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8450g_gpios 0 0 10>;
gpio-ranges = <&pmm8540g_gpios 0 0 10>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

185
arch/arm64/boot/dts/qcom/sa8540p-ride.dts
View File

@ -10,14 +10,19 @@
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sa8540p.dtsi"
#include "pm8450a.dtsi"
#include "sa8540p-pmics.dtsi"
/ {
model = "Qualcomm SA8540P Ride";
compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
aliases {
serial0 = &qup2_uart17;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c12 = &i2c12;
i2c15 = &i2c15;
i2c18 = &i2c18;
serial0 = &uart17;
};
chosen {
@ -146,6 +151,62 @@
};
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_default>;
status = "okay";
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_default>;
status = "okay";
};
&i2c12 {
pinctrl-names = "default";
pinctrl-0 = <&i2c12_default>;
status = "okay";
};
&i2c15 {
pinctrl-names = "default";
pinctrl-0 = <&i2c15_default>;
status = "okay";
};
&i2c18 {
pinctrl-names = "default";
pinctrl-0 = <&i2c18_default>;
status = "okay";
};
&pcie2a {
ranges = <0x01000000 0x0 0x3c200000 0x0 0x3c200000 0x0 0x100000>,
<0x02000000 0x0 0x3c300000 0x0 0x3c300000 0x0 0x1d00000>,
<0x03000000 0x5 0x00000000 0x5 0x00000000 0x1 0x00000000>;
perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 145 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie2a_default>;
status = "okay";
};
&pcie2a_phy {
vdda-phy-supply = <&vreg_l11a>;
vdda-pll-supply = <&vreg_l3a>;
status = "okay";
};
&pcie3a {
ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>,
<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x20000000>,
@ -167,12 +228,15 @@
status = "okay";
};
&qup2 {
&qup0 {
status = "okay";
};
&qup2_uart17 {
compatible = "qcom,geni-debug-uart";
&qup1 {
status = "okay";
};
&qup2 {
status = "okay";
};
@ -186,29 +250,9 @@
status = "okay";
};
&tlmm {
pcie3a_default: pcie3a-default-state {
perst-pins {
pins = "gpio151";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
clkreq-pins {
pins = "gpio150";
function = "pcie3a_clkreq";
drive-strength = <2>;
bias-pull-up;
};
wake-pins {
pins = "gpio56";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
&uart17 {
compatible = "qcom,geni-debug-uart";
status = "okay";
};
&ufs_mem_hc {
@ -268,3 +312,88 @@
&xo_board_clk {
clock-frequency = <38400000>;
};
/* PINCTRL */
&tlmm {
i2c0_default: i2c0-default-state {
pins = "gpio135", "gpio136";
function = "qup15";
drive-strength = <2>;
bias-pull-up;
};
i2c1_default: i2c1-default-state {
pins = "gpio158", "gpio159";
function = "qup15";
drive-strength = <2>;
bias-pull-up;
};
i2c12_default: i2c12-default-state {
pins = "gpio0", "gpio1";
function = "qup15";
drive-strength = <2>;
bias-pull-up;
};
i2c15_default: i2c15-default-state {
pins = "gpio36", "gpio37";
function = "qup15";
drive-strength = <2>;
bias-pull-up;
};
i2c18_default: i2c18-default-state {
pins = "gpio66", "gpio67";
function = "qup18";
drive-strength = <2>;
bias-pull-up;
};
pcie2a_default: pcie2a-default-state {
perst-pins {
pins = "gpio143";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
clkreq-pins {
pins = "gpio142";
function = "pcie2a_clkreq";
drive-strength = <2>;
bias-pull-up;
};
wake-pins {
pins = "gpio145";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
pcie3a_default: pcie3a-default-state {
perst-pins {
pins = "gpio151";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
clkreq-pins {
pins = "gpio150";
function = "pcie3a_clkreq";
drive-strength = <2>;
bias-pull-up;
};
wake-pins {
pins = "gpio56";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
};

4
arch/arm64/boot/dts/qcom/sa8540p.dtsi
View File

@ -10,7 +10,7 @@
/delete-node/ &cpu4_opp_table;
/ {
cpu0_opp_table: cpu0-opp-table {
cpu0_opp_table: opp-table-cpu0 {
compatible = "operating-points-v2";
opp-shared;
@ -92,7 +92,7 @@
};
};
cpu4_opp_table: cpu4-opp-table {
cpu4_opp_table: opp-table-cpu4 {
compatible = "operating-points-v2";
opp-shared;

30
arch/arm64/boot/dts/qcom/sc7180-idp.dts
View File

@ -80,6 +80,12 @@
reg = <0x0 0x94400000 0x0 0x200000>;
no-map;
};
mdata_mem: mpss-metadata {
alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
size = <0x0 0x4000>;
no-map;
};
};
};
@ -304,7 +310,7 @@
pinctrl-names = "default";
pinctrl-0 = <&disp_pins>;
reset-gpios = <&pm6150l_gpio 3 GPIO_ACTIVE_HIGH>;
reset-gpios = <&pm6150l_gpios 3 GPIO_ACTIVE_HIGH>;
ports {
#address-cells = <1>;
@ -370,8 +376,26 @@
&remoteproc_mpss {
status = "okay";
compatible = "qcom,sc7180-mss-pil";
reg = <0 0x04080000 0 0x4040>, <0 0x04180000 0 0x48>;
reg-names = "qdsp6", "rmb";
clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
<&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
<&gcc GCC_MSS_NAV_AXI_CLK>,
<&gcc GCC_MSS_SNOC_AXI_CLK>,
<&gcc GCC_MSS_MFAB_AXIS_CLK>,
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface", "bus", "nav", "snoc_axi", "mnoc_axi", "xo";
iommus = <&apps_smmu 0x461 0x0>, <&apps_smmu 0x444 0x3>;
memory-region = <&mba_mem &mpss_mem>;
memory-region = <&mba_mem>, <&mpss_mem>, <&mdata_mem>;
resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
<&pdc_reset PDC_MODEM_SYNC_RESET>;
reset-names = "mss_restart", "pdc_reset";
qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>;
qcom,spare-regs = <&tcsr_regs_2 0xb3e4>;
};
&sdhc_1 {
@ -467,7 +491,7 @@
/* PINCTRL - additions to nodes defined in sc7180.dtsi */
&pm6150l_gpio {
&pm6150l_gpios {
disp_pins: disp-state {
pinconf {
pins = "gpio3";

18
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi
View File

@ -85,6 +85,24 @@
};
};
/*
* ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
*
* Sort order matches the order in the parent files (parents before children).
*/
&pp3300_dx_edp {
/*
* The atna33xc20 really likes to be power cycled to keep it from
* getting in a bad state. This is the reason that the touchscreen
* rail and eDP rails are separate from each other on homestar (but
* not other trogdor devices) Make sure it starts "off" at bootup.
*/
/delete-property/ regulator-boot-on;
};
/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
ap_ts_pen_1v8: &i2c4 {
status = "okay";
clock-frequency = <400000>;

5
arch/arm64/boot/dts/qcom/sc7180-trogdor-lte-sku.dtsi
View File

@ -19,12 +19,11 @@
};
&ipa {
status = "okay";
/*
* Trogdor doesn't have QHEE (Qualcomm's EL2 blob), so the
* modem needs to cover certain init steps (GSI init), and
* the AP needs to wait for it.
*/
modem-init;
qcom,gsi-loader = "modem";
status = "okay";
};

20
arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi
View File

@ -26,6 +26,26 @@
};
};
/*
* ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
*
* Sort order matches the order in the parent files (parents before children).
*/
&pp3300_dx_edp {
off-on-delay-us = <500000>;
/*
* It's nicer to start with this regulator enabled. The
* bootloader may have left it on and it's nice not to cause an
* extra power cycle of the touchscreen and eDP panel at bootup.
* This should help speed bootup because we have off-on-delay-us.
*/
regulator-boot-on;
};
/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
&dsi0_out {
remote-endpoint = <&ps8640_in>;
};

23
arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi
View File

@ -14,6 +14,25 @@
realtek,dmic-clk-rate-hz = <2048000>;
};
ap_ts_pen_1v8: &i2c4 {
clock-frequency = <400000>;
status = "okay";
ap_ts: touchscreen@10 {
compatible = "elan,ekth3915", "elan,ekth3500";
reg = <0x10>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
interrupt-parent = <&tlmm>;
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
vcc33-supply = <&pp3300_ts>;
vccio-supply = <&pp1800_l10a>;
reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
};
};
&keyboard_controller {
function-row-physmap = <
MATRIX_KEY(0x00, 0x02, 0) /* T1 */
@ -48,3 +67,7 @@
compatible = "google,sc7180-trogdor";
model = "sc7180-rt5682s-max98357a-1mic";
};
&wifi {
qcom,ath10k-calibration-variant = "GO_PAZQUEL360";
};

20
arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi
View File

@ -7,6 +7,26 @@
#include <dt-bindings/gpio/gpio.h>
/*
* ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
*
* Sort order matches the order in the parent files (parents before children).
*/
&pp3300_dx_edp {
off-on-delay-us = <500000>;
/*
* It's nicer to start with this regulator enabled. The
* bootloader may have left it on and it's nice not to cause an
* extra power cycle of the touchscreen and eDP panel at bootup.
* This should help speed bootup because we have off-on-delay-us.
*/
regulator-boot-on;
};
/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
&dsi0_out {
remote-endpoint = <&sn65dsi86_in>;
};

50
arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
View File

@ -81,6 +81,12 @@
reg = <0x0 0x94400000 0x0 0x200000>;
no-map;
};
mdata_mem: mpss-metadata {
alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
size = <0x0 0x4000>;
no-map;
};
};
aliases {
@ -788,18 +794,18 @@ hp_i2c: &i2c9 {
#address-cells = <1>;
#size-cells = <0>;
mi2s@0 {
dai-link@0 {
reg = <MI2S_PRIMARY>;
qcom,playback-sd-lines = <1>;
qcom,capture-sd-lines = <0>;
};
secondary_mi2s: mi2s@1 {
secondary_mi2s: dai-link@1 {
reg = <MI2S_SECONDARY>;
qcom,playback-sd-lines = <0>;
};
hdmi@5 {
dai-link@5 {
reg = <LPASS_DP_RX>;
};
};
@ -816,7 +822,11 @@ hp_i2c: &i2c9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&dp_hot_plug_det>;
};
&mdss_dp_out {
data-lanes = <0 1>;
link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000>;
};
&pm6150_adc {
@ -853,12 +863,30 @@ hp_i2c: &i2c9 {
&remoteproc_mpss {
status = "okay";
compatible = "qcom,sc7180-mss-pil";
reg = <0 0x04080000 0 0x4040>, <0 0x04180000 0 0x48>;
reg-names = "qdsp6", "rmb";
clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
<&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
<&gcc GCC_MSS_NAV_AXI_CLK>,
<&gcc GCC_MSS_SNOC_AXI_CLK>,
<&gcc GCC_MSS_MFAB_AXIS_CLK>,
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface", "bus", "nav", "snoc_axi", "mnoc_axi", "xo";
iommus = <&apps_smmu 0x461 0x0>, <&apps_smmu 0x444 0x3>;
memory-region = <&mba_mem &mpss_mem>;
memory-region = <&mba_mem>, <&mpss_mem>, <&mdata_mem>;
/* This gets overridden for SKUs with LTE support. */
firmware-name = "qcom/sc7180-trogdor/modem-nolte/mba.mbn",
"qcom/sc7180-trogdor/modem-nolte/qdsp6sw.mbn";
resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
<&pdc_reset PDC_MODEM_SYNC_RESET>;
reset-names = "mss_restart", "pdc_reset";
qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>;
qcom,spare-regs = <&tcsr_regs_2 0xb3e4>;
};
&sdhc_1 {
@ -1141,11 +1169,11 @@ ap_spi_fp: &spi10 {
/* PINCTRL - board-specific pinctrl */
&pm6150_gpio {
&pm6150_gpios {
status = "disabled"; /* No GPIOs are connected */
};
&pm6150l_gpio {
&pm6150l_gpios {
gpio-line-names = "AP_SUSPEND",
"",
"",
@ -1376,7 +1404,15 @@ ap_spi_fp: &spi10 {
pins = "gpio8";
function = "gpio";
bias-disable;
drive-strength = <2>;
/*
* The reset GPIO to the touchscreen takes almost 2ms to drop
* at the default drive strength. When we bump it up to 8mA it
* falls in under 500us. We want this to be fast since the Elan
* datasheet (and any drivers written based on it) talk about using
* a 500 us reset pulse.
*/
drive-strength = <8>;
};
sdc1_on: sdc1-on-state {

339
arch/arm64/boot/dts/qcom/sc7180.dtsi
View File

@ -27,8 +27,6 @@
#address-cells = <2>;
#size-cells = <2>;
chosen { };
aliases {
mmc1 = &sdhc_1;
mmc2 = &sdhc_2;
@ -54,6 +52,8 @@
spi11 = &spi11;
};
chosen { };
clocks {
xo_board: xo-board {
compatible = "fixed-clock";
@ -68,62 +68,6 @@
};
};
reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
hyp_mem: memory@80000000 {
reg = <0x0 0x80000000 0x0 0x600000>;
no-map;
};
xbl_mem: memory@80600000 {
reg = <0x0 0x80600000 0x0 0x200000>;
no-map;
};
aop_mem: memory@80800000 {
reg = <0x0 0x80800000 0x0 0x20000>;
no-map;
};
aop_cmd_db_mem: memory@80820000 {
reg = <0x0 0x80820000 0x0 0x20000>;
compatible = "qcom,cmd-db";
no-map;
};
sec_apps_mem: memory@808ff000 {
reg = <0x0 0x808ff000 0x0 0x1000>;
no-map;
};
smem_mem: memory@80900000 {
reg = <0x0 0x80900000 0x0 0x200000>;
no-map;
};
tz_mem: memory@80b00000 {
reg = <0x0 0x80b00000 0x0 0x3900000>;
no-map;
};
ipa_fw_mem: memory@8b700000 {
reg = <0 0x8b700000 0 0x10000>;
no-map;
};
rmtfs_mem: memory@94600000 {
compatible = "qcom,rmtfs-mem";
reg = <0x0 0x94600000 0x0 0x200000>;
no-map;
qcom,client-id = <1>;
qcom,vmid = <15>;
};
};
cpus {
#address-cells = <2>;
#size-cells = <0>;
@ -146,9 +90,11 @@
qcom,freq-domain = <&cpufreq_hw 0>;
L2_0: l2-cache {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
L3_0: l3-cache {
compatible = "cache";
cache-level = <3>;
};
};
};
@ -171,6 +117,7 @@
qcom,freq-domain = <&cpufreq_hw 0>;
L2_100: l2-cache {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
@ -193,6 +140,7 @@
qcom,freq-domain = <&cpufreq_hw 0>;
L2_200: l2-cache {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
@ -215,6 +163,7 @@
qcom,freq-domain = <&cpufreq_hw 0>;
L2_300: l2-cache {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
@ -237,6 +186,7 @@
qcom,freq-domain = <&cpufreq_hw 0>;
L2_400: l2-cache {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
@ -259,6 +209,7 @@
qcom,freq-domain = <&cpufreq_hw 0>;
L2_500: l2-cache {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
@ -281,6 +232,7 @@
qcom,freq-domain = <&cpufreq_hw 1>;
L2_600: l2-cache {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
@ -303,6 +255,7 @@
qcom,freq-domain = <&cpufreq_hw 1>;
L2_700: l2-cache {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
@ -398,6 +351,18 @@
};
};
firmware {
scm {
compatible = "qcom,scm-sc7180", "qcom,scm";
};
};
memory@80000000 {
device_type = "memory";
/* We expect the bootloader to fill in the size */
reg = <0 0x80000000 0 0>;
};
cpu0_opp_table: opp-table-cpu0 {
compatible = "operating-points-v2";
opp-shared;
@ -538,10 +503,42 @@
};
};
memory@80000000 {
device_type = "memory";
/* We expect the bootloader to fill in the size */
reg = <0 0x80000000 0 0>;
qspi_opp_table: opp-table-qspi {
compatible = "operating-points-v2";
opp-75000000 {
opp-hz = /bits/ 64 <75000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
opp-150000000 {
opp-hz = /bits/ 64 <150000000>;
required-opps = <&rpmhpd_opp_svs>;
};
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
required-opps = <&rpmhpd_opp_nom>;
};
};
qup_opp_table: opp-table-qup {
compatible = "operating-points-v2";
opp-75000000 {
opp-hz = /bits/ 64 <75000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
required-opps = <&rpmhpd_opp_svs>;
};
opp-128000000 {
opp-hz = /bits/ 64 <128000000>;
required-opps = <&rpmhpd_opp_nom>;
};
};
pmu {
@ -549,9 +546,64 @@
interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
};
firmware {
scm {
compatible = "qcom,scm-sc7180", "qcom,scm";
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
hyp_mem: memory@80000000 {
reg = <0x0 0x80000000 0x0 0x600000>;
no-map;
};
xbl_mem: memory@80600000 {
reg = <0x0 0x80600000 0x0 0x200000>;
no-map;
};
aop_mem: memory@80800000 {
reg = <0x0 0x80800000 0x0 0x20000>;
no-map;
};
aop_cmd_db_mem: memory@80820000 {
reg = <0x0 0x80820000 0x0 0x20000>;
compatible = "qcom,cmd-db";
no-map;
};
sec_apps_mem: memory@808ff000 {
reg = <0x0 0x808ff000 0x0 0x1000>;
no-map;
};
smem_mem: memory@80900000 {
reg = <0x0 0x80900000 0x0 0x200000>;
no-map;
};
tz_mem: memory@80b00000 {
reg = <0x0 0x80b00000 0x0 0x3900000>;
no-map;
};
ipa_fw_mem: memory@8b700000 {
reg = <0 0x8b700000 0 0x10000>;
no-map;
};
rmtfs_mem: memory@94600000 {
compatible = "qcom,rmtfs-mem";
reg = <0x0 0x94600000 0x0 0x200000>;
no-map;
qcom,client-id = <1>;
qcom,vmid = <15>;
};
};
@ -640,11 +692,6 @@
};
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
soc: soc@0 {
#address-cells = <2>;
#size-cells = <2>;
@ -690,8 +737,8 @@
sdhc_1: mmc@7c4000 {
compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";
reg = <0 0x7c4000 0 0x1000>,
<0 0x07c5000 0 0x1000>;
reg = <0 0x007c4000 0 0x1000>,
<0 0x007c5000 0 0x1000>;
reg-names = "hc", "cqhci";
iommus = <&apps_smmu 0x60 0x0>;
@ -739,25 +786,6 @@
};
};
qup_opp_table: opp-table-qup {
compatible = "operating-points-v2";
opp-75000000 {
opp-hz = /bits/ 64 <75000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
required-opps = <&rpmhpd_opp_svs>;
};
opp-128000000 {
opp-hz = /bits/ 64 <128000000>;
required-opps = <&rpmhpd_opp_nom>;
};
};
qupv3_id_0: geniqup@8c0000 {
compatible = "qcom,geni-se-qup";
reg = <0 0x008c0000 0 0x6000>;
@ -1421,9 +1449,9 @@
iommus = <&apps_smmu 0x440 0x0>,
<&apps_smmu 0x442 0x0>;
reg = <0 0x1e40000 0 0x7000>,
<0 0x1e47000 0 0x2000>,
<0 0x1e04000 0 0x2c000>;
reg = <0 0x01e40000 0 0x7000>,
<0 0x01e47000 0 0x2000>,
<0 0x01e04000 0 0x2c000>;
reg-names = "ipa-reg",
"ipa-shared",
"gsi";
@ -1929,8 +1957,7 @@
remoteproc_mpss: remoteproc@4080000 {
compatible = "qcom,sc7180-mpss-pas";
reg = <0 0x04080000 0 0x4040>, <0 0x04180000 0 0x48>;
reg-names = "qdsp6", "rmb";
reg = <0 0x04080000 0 0x4040>;
interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
@ -1941,14 +1968,8 @@
interrupt-names = "wdog", "fatal", "ready", "handover",
"stop-ack", "shutdown-ack";
clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
<&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
<&gcc GCC_MSS_NAV_AXI_CLK>,
<&gcc GCC_MSS_SNOC_AXI_CLK>,
<&gcc GCC_MSS_MFAB_AXIS_CLK>,
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface", "bus", "nav", "snoc_axi",
"mnoc_axi", "xo";
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
power-domains = <&rpmhpd SC7180_CX>,
<&rpmhpd SC7180_MX>,
@ -1962,13 +1983,6 @@
qcom,smem-states = <&modem_smp2p_out 0>;
qcom,smem-state-names = "stop";
resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
<&pdc_reset PDC_MODEM_SYNC_RESET>;
reset-names = "mss_restart", "pdc_reset";
qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>;
qcom,spare-regs = <&tcsr_regs_2 0xb3e4>;
status = "disabled";
glink-edge {
@ -2123,6 +2137,12 @@
#power-domain-cells = <1>;
};
dma@10a2000 {
compatible = "qcom,sc7180-dcc", "qcom,dcc";
reg = <0x0 0x010a2000 0x0 0x1000>,
<0x0 0x010ae000 0x0 0x2000>;
};
stm@6002000 {
compatible = "arm,coresight-stm", "arm,primecell";
reg = <0 0x06002000 0 0x1000>,
@ -2655,25 +2675,6 @@
};
};
qspi_opp_table: opp-table-qspi {
compatible = "operating-points-v2";
opp-75000000 {
opp-hz = /bits/ 64 <75000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
opp-150000000 {
opp-hz = /bits/ 64 <150000000>;
required-opps = <&rpmhpd_opp_svs>;
};
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
required-opps = <&rpmhpd_opp_nom>;
};
};
qspi: spi@88dc000 {
compatible = "qcom,sc7180-qspi", "qcom,qspi-v1";
reg = <0 0x088dc000 0 0x600>;
@ -2921,7 +2922,7 @@
#power-domain-cells = <1>;
};
mdss: mdss@ae00000 {
mdss: display-subsystem@ae00000 {
compatible = "qcom,sc7180-mdss";
reg = <0 0x0ae00000 0 0x1000>;
reg-names = "mdss";
@ -3022,7 +3023,8 @@
};
dsi0: dsi@ae94000 {
compatible = "qcom,mdss-dsi-ctrl";
compatible = "qcom,sc7180-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0 0x0ae94000 0 0x400>;
reg-names = "dsi_ctrl";
@ -3116,11 +3118,11 @@
compatible = "qcom,sc7180-dp";
status = "disabled";
reg = <0 0xae90000 0 0x200>,
<0 0xae90200 0 0x200>,
<0 0xae90400 0 0xc00>,
<0 0xae91000 0 0x400>,
<0 0xae91400 0 0x400>;
reg = <0 0x0ae90000 0 0x200>,
<0 0x0ae90200 0 0x200>,
<0 0x0ae90400 0 0xc00>,
<0 0x0ae91000 0 0x400>,
<0 0x0ae91400 0 0x400>;
interrupt-parent = <&mdss>;
interrupts = <12>;
@ -3155,7 +3157,7 @@
port@1 {
reg = <1>;
dp_out: endpoint { };
mdss_dp_out: endpoint { };
};
};
@ -3248,7 +3250,7 @@
#reset-cells = <1>;
};
aoss_qmp: power-controller@c300000 {
aoss_qmp: power-management@c300000 {
compatible = "qcom,sc7180-aoss-qmp", "qcom,aoss-qmp";
reg = <0 0x0c300000 0 0x400>;
interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
@ -3274,8 +3276,8 @@
interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
qcom,ee = <0>;
qcom,channel = <0>;
#address-cells = <1>;
#size-cells = <1>;
#address-cells = <2>;
#size-cells = <0>;
interrupt-controller;
#interrupt-cells = <4>;
cell-index = <0>;
@ -3417,7 +3419,7 @@
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
};
timer@17c20000{
timer@17c20000 {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0x20000000>;
@ -3625,6 +3627,7 @@
<&apps_smmu 0x1032 0>;
power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>;
required-opps = <&rpmhpd_opp_nom>;
status = "disabled";
@ -3655,6 +3658,8 @@
clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>,
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface", "bi_tcxo";
power-domains = <&rpmhpd SC7180_CX>;
#clock-cells = <1>;
#power-domain-cells = <1>;
};
@ -3681,7 +3686,7 @@
type = "passive";
};
cpu0_crit: cpu_crit {
cpu0_crit: cpu-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
@ -3730,7 +3735,7 @@
type = "passive";
};
cpu1_crit: cpu_crit {
cpu1_crit: cpu-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
@ -3779,7 +3784,7 @@
type = "passive";
};
cpu2_crit: cpu_crit {
cpu2_crit: cpu-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
@ -3828,7 +3833,7 @@
type = "passive";
};
cpu3_crit: cpu_crit {
cpu3_crit: cpu-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
@ -3877,7 +3882,7 @@
type = "passive";
};
cpu4_crit: cpu_crit {
cpu4_crit: cpu-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
@ -3926,7 +3931,7 @@
type = "passive";
};
cpu5_crit: cpu_crit {
cpu5_crit: cpu-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
@ -3975,7 +3980,7 @@
type = "passive";
};
cpu6_crit: cpu_crit {
cpu6_crit: cpu-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
@ -4016,7 +4021,7 @@
type = "passive";
};
cpu7_crit: cpu_crit {
cpu7_crit: cpu-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
@ -4057,7 +4062,7 @@
type = "passive";
};
cpu8_crit: cpu_crit {
cpu8_crit: cpu-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
@ -4098,7 +4103,7 @@
type = "passive";
};
cpu9_crit: cpu_crit {
cpu9_crit: cpu-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
@ -4132,7 +4137,7 @@
type = "hot";
};
aoss0_crit: aoss0_crit {
aoss0_crit: aoss0-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -4152,7 +4157,7 @@
hysteresis = <2000>;
type = "hot";
};
cpuss0_crit: cluster0_crit {
cpuss0_crit: cluster0-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -4172,7 +4177,7 @@
hysteresis = <2000>;
type = "hot";
};
cpuss1_crit: cluster0_crit {
cpuss1_crit: cluster0-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -4193,7 +4198,7 @@
type = "passive";
};
gpuss0_crit: gpuss0_crit {
gpuss0_crit: gpuss0-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -4221,7 +4226,7 @@
type = "passive";
};
gpuss1_crit: gpuss1_crit {
gpuss1_crit: gpuss1-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -4249,7 +4254,7 @@
type = "hot";
};
aoss1_crit: aoss1_crit {
aoss1_crit: aoss1-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -4270,7 +4275,7 @@
type = "hot";
};
cwlan_crit: cwlan_crit {
cwlan_crit: cwlan-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -4291,7 +4296,7 @@
type = "hot";
};
audio_crit: audio_crit {
audio_crit: audio-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -4312,7 +4317,7 @@
type = "hot";
};
ddr_crit: ddr_crit {
ddr_crit: ddr-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -4333,7 +4338,7 @@
type = "hot";
};
q6_hvx_crit: q6_hvx_crit {
q6_hvx_crit: q6-hvx-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -4354,7 +4359,7 @@
type = "hot";
};
camera_crit: camera_crit {
camera_crit: camera-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -4375,7 +4380,7 @@
type = "hot";
};
mdm_crit: mdm_crit {
mdm_crit: mdm-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -4396,7 +4401,7 @@
type = "hot";
};
mdm_dsp_crit: mdm_dsp_crit {
mdm_dsp_crit: mdm-dsp-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -4417,7 +4422,7 @@
type = "hot";
};
npu_crit: npu_crit {
npu_crit: npu-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -4438,7 +4443,7 @@
type = "hot";
};
video_crit: video_crit {
video_crit: video-crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";

19
arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-rt5682.dtsi
View File

@ -33,9 +33,22 @@
};
dai-link@1 {
link-name = "ALC5682";
link-name = "DisplayPort";
reg = <1>;
cpu {
sound-dai = <&lpass_cpu LPASS_DP_RX>;
};
codec {
sound-dai = <&mdss_dp>;
};
};
dai-link@2 {
link-name = "ALC5682";
reg = <2>;
cpu {
sound-dai = <&lpass_cpu MI2S_PRIMARY>;
};
@ -92,6 +105,10 @@ hp_i2c: &i2c2 {
reg = <MI2S_SECONDARY>;
qcom,playback-sd-lines = <0>;
};
dai-link@5 {
reg = <LPASS_DP_RX>;
};
};
/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */

30
arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi
View File

@ -17,16 +17,44 @@
reg = <0x0 0x9c700000 0x0 0x200000>;
no-map;
};
mdata_mem: mpss-metadata {
alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
size = <0x0 0x4000>;
no-map;
};
};
};
&ipa {
qcom,gsi-loader = "modem";
status = "okay";
};
&remoteproc_mpss {
compatible = "qcom,sc7280-mss-pil";
clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
<&gcc GCC_MSS_OFFLINE_AXI_CLK>,
<&gcc GCC_MSS_SNOC_AXI_CLK>,
<&rpmhcc RPMH_PKA_CLK>,
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface", "offline", "snoc_axi", "pka", "xo";
iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
memory-region = <&mba_mem>, <&mpss_mem>;
memory-region = <&mba_mem>, <&mpss_mem>, <&mdata_mem>;
firmware-name = "qcom/sc7280-herobrine/modem/mba.mbn",
"qcom/sc7280-herobrine/modem/qdsp6sw.mbn";
resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
<&pdc_reset PDC_MODEM_SYNC_RESET>;
reset-names = "mss_restart", "pdc_reset";
qcom,halt-regs = <&tcsr_1 0x3000 0x5000 0x8000 0x13000>;
qcom,ext-regs = <&tcsr_2 0x10000 0x10004 &tcsr_1 0x6004 0x6008>;
qcom,qaccept-regs = <&tcsr_1 0x3030 0x3040 0x3020>;
status = "okay";
};

14
arch/arm64/boot/dts/qcom/sc7280-herobrine-nvme-sku.dtsi Normal file
View File

@ -0,0 +1,14 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Herobrine dts fragment for NVMe SKUs
*
* Copyright 2022 Google LLC.
*/
&pcie1 {
status = "okay";
};
&pcie1_phy {
status = "okay";
};

17
arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie-nvme-lte.dts Normal file
View File

@ -0,0 +1,17 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Zombie board device tree source
*
* Copyright 2022 Google LLC.
*/
/dts-v1/;
#include "sc7280-herobrine-zombie.dtsi"
#include "sc7280-herobrine-lte-sku.dtsi"
#include "sc7280-herobrine-nvme-sku.dtsi"
/ {
model = "Google Zombie with LTE and NVMe";
compatible = "google,zombie-sku514", "qcom,sc7280";
};

17
arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie-nvme.dts Normal file
View File

@ -0,0 +1,17 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Zombie board device tree source
*
* Copyright 2022 Google LLC.
*/
/dts-v1/;
#include "sc7280-herobrine-zombie.dtsi"
#include "sc7280-herobrine-wifi-sku.dtsi"
#include "sc7280-herobrine-nvme-sku.dtsi"
/ {
model = "Google Zombie with NVMe";
compatible = "google,zombie-sku2","google,zombie-sku3","google,zombie-sku515", "qcom,sc7280";
};

12
arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie.dtsi
View File

@ -60,17 +60,7 @@ ap_tp_i2c: &i2c0 {
status = "okay";
};
/* For nvme */
&pcie1 {
status = "okay";
};
/* For nvme */
&pcie1_phy {
status = "okay";
};
&pm8350c_pwm_backlight{
&pm8350c_pwm_backlight {
/* Set the PWM period to 200 microseconds (5kHz duty cycle) */
pwms = <&pm8350c_pwm 3 200000>;
};

4
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
View File

@ -442,7 +442,11 @@ ap_i2c_tpm: &i2c14 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&dp_hot_plug_det>;
};
&mdss_dp_out {
data-lanes = <0 1>;
link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
};
&mdss_mdp {

7
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
View File

@ -19,6 +19,7 @@
aliases {
bluetooth0 = &bluetooth;
serial1 = &uart7;
wifi0 = &wifi;
};
max98360a: audio-codec-0 {
@ -376,11 +377,6 @@
status = "okay";
};
&ipa {
status = "okay";
modem-init;
};
&lpass_cpu {
status = "okay";
@ -736,6 +732,7 @@
&tlmm {
amp_en: amp-en-state {
pins = "gpio63";
function = "gpio";
bias-pull-down;
drive-strength = <2>;
};

5
arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
View File

@ -336,11 +336,6 @@
/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
&ipa {
status = "okay";
modem-init;
};
&lpass_va_macro {
vdd-micb-supply = <&vreg_bob>;
};

104
arch/arm64/boot/dts/qcom/sc7280.dtsi
View File

@ -166,7 +166,7 @@
CPU0: cpu@0 {
device_type = "cpu";
compatible = "arm,kryo";
compatible = "qcom,kryo";
reg = <0x0 0x0>;
enable-method = "psci";
cpu-idle-states = <&LITTLE_CPU_SLEEP_0
@ -180,16 +180,18 @@
#cooling-cells = <2>;
L2_0: l2-cache {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
L3_0: l3-cache {
compatible = "cache";
cache-level = <3>;
};
};
};
CPU1: cpu@100 {
device_type = "cpu";
compatible = "arm,kryo";
compatible = "qcom,kryo";
reg = <0x0 0x100>;
enable-method = "psci";
cpu-idle-states = <&LITTLE_CPU_SLEEP_0
@ -203,13 +205,14 @@
#cooling-cells = <2>;
L2_100: l2-cache {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU2: cpu@200 {
device_type = "cpu";
compatible = "arm,kryo";
compatible = "qcom,kryo";
reg = <0x0 0x200>;
enable-method = "psci";
cpu-idle-states = <&LITTLE_CPU_SLEEP_0
@ -223,13 +226,14 @@
#cooling-cells = <2>;
L2_200: l2-cache {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU3: cpu@300 {
device_type = "cpu";
compatible = "arm,kryo";
compatible = "qcom,kryo";
reg = <0x0 0x300>;
enable-method = "psci";
cpu-idle-states = <&LITTLE_CPU_SLEEP_0
@ -243,13 +247,14 @@
#cooling-cells = <2>;
L2_300: l2-cache {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU4: cpu@400 {
device_type = "cpu";
compatible = "arm,kryo";
compatible = "qcom,kryo";
reg = <0x0 0x400>;
enable-method = "psci";
cpu-idle-states = <&BIG_CPU_SLEEP_0
@ -263,13 +268,14 @@
#cooling-cells = <2>;
L2_400: l2-cache {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU5: cpu@500 {
device_type = "cpu";
compatible = "arm,kryo";
compatible = "qcom,kryo";
reg = <0x0 0x500>;
enable-method = "psci";
cpu-idle-states = <&BIG_CPU_SLEEP_0
@ -283,13 +289,14 @@
#cooling-cells = <2>;
L2_500: l2-cache {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU6: cpu@600 {
device_type = "cpu";
compatible = "arm,kryo";
compatible = "qcom,kryo";
reg = <0x0 0x600>;
enable-method = "psci";
cpu-idle-states = <&BIG_CPU_SLEEP_0
@ -303,13 +310,14 @@
#cooling-cells = <2>;
L2_600: l2-cache {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU7: cpu@700 {
device_type = "cpu";
compatible = "arm,kryo";
compatible = "qcom,kryo";
reg = <0x0 0x700>;
enable-method = "psci";
cpu-idle-states = <&BIG_CPU_SLEEP_0
@ -323,6 +331,7 @@
#cooling-cells = <2>;
L2_700: l2-cache {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
@ -2171,9 +2180,9 @@
iommus = <&apps_smmu 0x480 0x0>,
<&apps_smmu 0x482 0x0>;
reg = <0 0x1e40000 0 0x8000>,
<0 0x1e50000 0 0x4ad0>,
<0 0x1e04000 0 0x23000>;
reg = <0 0x01e40000 0 0x8000>,
<0 0x01e50000 0 0x4ad0>,
<0 0x01e04000 0 0x23000>;
reg-names = "ipa-reg",
"ipa-shared",
"gsi";
@ -2455,7 +2464,7 @@
lpass_hm: clock-controller@3c00000 {
compatible = "qcom,sc7280-lpasshm";
reg = <0 0x3c00000 0 0x28>;
reg = <0 0x03c00000 0 0x28>;
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "bi_tcxo";
#clock-cells = <1>;
@ -2661,6 +2670,12 @@
#power-domain-cells = <1>;
};
dma@117f000 {
compatible = "qcom,sc7280-dcc", "qcom,dcc";
reg = <0x0 0x0117f000 0x0 0x1000>,
<0x0 0x01112000 0x0 0x6000>;
};
adreno_smmu: iommu@3da0000 {
compatible = "qcom,sc7280-smmu-500", "qcom,adreno-smmu", "arm,mmu-500";
reg = <0 0x03da0000 0 0x20000>;
@ -2711,12 +2726,8 @@
interrupt-names = "wdog", "fatal", "ready", "handover",
"stop-ack", "shutdown-ack";
clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
<&gcc GCC_MSS_OFFLINE_AXI_CLK>,
<&gcc GCC_MSS_SNOC_AXI_CLK>,
<&rpmhcc RPMH_PKA_CLK>,
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface", "offline", "snoc_axi", "pka", "xo";
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
power-domains = <&rpmhpd SC7280_CX>,
<&rpmhpd SC7280_MSS>;
@ -2729,14 +2740,6 @@
qcom,smem-states = <&modem_smp2p_out 0>;
qcom,smem-state-names = "stop";
resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
<&pdc_reset PDC_MODEM_SYNC_RESET>;
reset-names = "mss_restart", "pdc_reset";
qcom,halt-regs = <&tcsr_1 0x3000 0x5000 0x8000 0x13000>;
qcom,ext-regs = <&tcsr_2 0x10000 0x10004 &tcsr_1 0x6004 0x6008>;
qcom,qaccept-regs = <&tcsr_1 0x3030 0x3040 0x3020>;
status = "disabled";
glink-edge {
@ -3489,7 +3492,7 @@
pmu@9091000 {
compatible = "qcom,sc7280-llcc-bwmon";
reg = <0 0x9091000 0 0x1000>;
reg = <0 0x09091000 0 0x1000>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
@ -3571,7 +3574,7 @@
};
gem_noc: interconnect@9100000 {
reg = <0 0x9100000 0 0xe2200>;
reg = <0 0x09100000 0 0xe2200>;
compatible = "qcom,sc7280-gem-noc";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
@ -3586,8 +3589,8 @@
eud: eud@88e0000 {
compatible = "qcom,sc7280-eud","qcom,eud";
reg = <0 0x88e0000 0 0x2000>,
<0 0x88e2000 0 0x1000>;
reg = <0 0x088e0000 0 0x2000>,
<0 0x088e2000 0 0x1000>;
interrupts-extended = <&pdc 11 IRQ_TYPE_LEVEL_HIGH>;
ports {
port@0 {
@ -3750,7 +3753,7 @@
videocc: clock-controller@aaf0000 {
compatible = "qcom,sc7280-videocc";
reg = <0 0xaaf0000 0 0x10000>;
reg = <0 0x0aaf0000 0 0x10000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>;
clock-names = "bi_tcxo", "bi_tcxo_ao";
@ -3773,7 +3776,7 @@
dispcc: clock-controller@af00000 {
compatible = "qcom,sc7280-dispcc";
reg = <0 0xaf00000 0 0x20000>;
reg = <0 0x0af00000 0 0x20000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_DISP_GPLL0_CLK_SRC>,
<&mdss_dsi_phy 0>,
@ -3906,7 +3909,8 @@
};
mdss_dsi: dsi@ae94000 {
compatible = "qcom,mdss-dsi-ctrl";
compatible = "qcom,sc7280-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0 0x0ae94000 0 0x400>;
reg-names = "dsi_ctrl";
@ -4001,10 +4005,10 @@
pinctrl-names = "default";
pinctrl-0 = <&edp_hot_plug_det>;
reg = <0 0xaea0000 0 0x200>,
<0 0xaea0200 0 0x200>,
<0 0xaea0400 0 0xc00>,
<0 0xaea1000 0 0x400>;
reg = <0 0x0aea0000 0 0x200>,
<0 0x0aea0200 0 0x200>,
<0 0x0aea0400 0 0xc00>,
<0 0x0aea1000 0 0x400>;
interrupt-parent = <&mdss>;
interrupts = <14>;
@ -4076,10 +4080,10 @@
mdss_edp_phy: phy@aec2a00 {
compatible = "qcom,sc7280-edp-phy";
reg = <0 0xaec2a00 0 0x19c>,
<0 0xaec2200 0 0xa0>,
<0 0xaec2600 0 0xa0>,
<0 0xaec2000 0 0x1c0>;
reg = <0 0x0aec2a00 0 0x19c>,
<0 0x0aec2200 0 0xa0>,
<0 0x0aec2600 0 0xa0>,
<0 0x0aec2000 0 0x1c0>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_EDP_CLKREF_EN>;
@ -4095,11 +4099,11 @@
mdss_dp: displayport-controller@ae90000 {
compatible = "qcom,sc7280-dp";
reg = <0 0xae90000 0 0x200>,
<0 0xae90200 0 0x200>,
<0 0xae90400 0 0xc00>,
<0 0xae91000 0 0x400>,
<0 0xae91400 0 0x400>;
reg = <0 0x0ae90000 0 0x200>,
<0 0x0ae90200 0 0x200>,
<0 0x0ae90400 0 0xc00>,
<0 0x0ae91000 0 0x400>,
<0 0x0ae91400 0 0x400>;
interrupt-parent = <&mdss>;
interrupts = <12>;
@ -4140,7 +4144,7 @@
port@1 {
reg = <1>;
dp_out: endpoint { };
mdss_dp_out: endpoint { };
};
};
@ -4217,7 +4221,7 @@
#reset-cells = <1>;
};
aoss_qmp: power-controller@c300000 {
aoss_qmp: power-management@c300000 {
compatible = "qcom,sc7280-aoss-qmp", "qcom,aoss-qmp";
reg = <0 0x0c300000 0 0x400>;
interrupts-extended = <&ipcc IPCC_CLIENT_AOP
@ -4246,8 +4250,8 @@
interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
qcom,ee = <0>;
qcom,channel = <0>;
#address-cells = <1>;
#size-cells = <1>;
#address-cells = <2>;
#size-cells = <0>;
interrupt-controller;
#interrupt-cells = <4>;
};

246
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
View File

@ -17,10 +17,12 @@
compatible = "qcom,sc8280xp-crd", "qcom,sc8280xp";
aliases {
serial0 = &qup2_uart17;
i2c4 = &i2c4;
i2c21 = &i2c21;
serial0 = &uart17;
};
backlight {
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pmc8280c_lpg 3 1000000>;
enable-gpios = <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>;
@ -34,6 +36,22 @@
stdout-path = "serial0:115200n8";
};
vreg_edp_3p3: regulator-edp-3p3 {
compatible = "regulator-fixed";
regulator-name = "VREG_EDP_3P3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&edp_reg_en>;
regulator-boot-on;
};
vreg_edp_bl: regulator-edp-bl {
compatible = "regulator-fixed";
@ -112,6 +130,15 @@
regulator-boot-on;
};
reserved-memory {
linux,cma {
compatible = "shared-dma-pool";
size = <0x0 0x8000000>;
reusable;
linux,cma-default;
};
};
};
&apps_rsc {
@ -134,7 +161,6 @@
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-boot-on;
regulator-always-on;
};
vreg_l4b: ldo4 {
@ -228,6 +254,113 @@
};
};
&dispcc0 {
status = "okay";
};
&mdss0 {
status = "okay";
};
&mdss0_dp3 {
compatible = "qcom,sc8280xp-edp";
data-lanes = <0 1 2 3>;
status = "okay";
aux-bus {
panel {
compatible = "edp-panel";
power-supply = <&vreg_edp_3p3>;
backlight = <&backlight>;
ports {
port {
edp_panel_in: endpoint {
remote-endpoint = <&mdss0_dp3_out>;
};
};
};
};
};
ports {
port@1 {
reg = <1>;
mdss0_dp3_out: endpoint {
remote-endpoint = <&edp_panel_in>;
};
};
};
};
&mdss0_dp3_phy {
vdda-phy-supply = <&vreg_l6b>;
vdda-pll-supply = <&vreg_l3b>;
status = "okay";
};
&i2c4 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c4_default>;
status = "okay";
touchscreen@10 {
compatible = "hid-over-i2c";
reg = <0x10>;
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vreg_misc_3p3>;
pinctrl-names = "default";
pinctrl-0 = <&ts0_default>;
};
};
&i2c21 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c21_default>;
status = "okay";
touchpad@15 {
compatible = "hid-over-i2c";
reg = <0x15>;
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vreg_misc_3p3>;
pinctrl-names = "default";
pinctrl-0 = <&tpad_default>;
wakeup-source;
};
keyboard@68 {
compatible = "hid-over-i2c";
reg = <0x68>;
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vreg_misc_3p3>;
pinctrl-names = "default";
pinctrl-0 = <&kybd_default>;
wakeup-source;
};
};
&pcie2a {
perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
@ -297,27 +430,6 @@
status = "okay";
};
&qup0_i2c4 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&qup0_i2c4_default>;
status = "okay";
touchscreen@10 {
compatible = "hid-over-i2c";
reg = <0x10>;
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vreg_misc_3p3>;
pinctrl-names = "default";
pinctrl-0 = <&ts0_default>;
};
};
&qup1 {
status = "okay";
};
@ -326,49 +438,6 @@
status = "okay";
};
&qup2_i2c5 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&qup2_i2c5_default>;
status = "okay";
touchpad@15 {
compatible = "hid-over-i2c";
reg = <0x15>;
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vreg_misc_3p3>;
pinctrl-names = "default";
pinctrl-0 = <&tpad_default>;
wakeup-source;
};
keyboard@68 {
compatible = "hid-over-i2c";
reg = <0x68>;
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vreg_misc_3p3>;
pinctrl-names = "default";
pinctrl-0 = <&kybd_default>;
wakeup-source;
};
};
&qup2_uart17 {
compatible = "qcom,geni-debug-uart";
status = "okay";
};
&remoteproc_adsp {
firmware-name = "qcom/sc8280xp/qcadsp8280.mbn";
@ -381,6 +450,12 @@
status = "okay";
};
&uart17 {
compatible = "qcom,geni-debug-uart";
status = "okay";
};
&ufs_mem_hc {
reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
@ -494,6 +569,27 @@
&tlmm {
gpio-reserved-ranges = <74 6>, <83 4>, <125 2>, <128 2>, <154 7>;
edp_reg_en: edp-reg-en-state {
pins = "gpio25";
function = "gpio";
drive-strength = <16>;
bias-disable;
};
i2c4_default: i2c4-default-state {
pins = "gpio171", "gpio172";
function = "qup4";
drive-strength = <16>;
bias-disable;
};
i2c21_default: i2c21-default-state {
pins = "gpio81", "gpio82";
function = "qup21";
drive-strength = <16>;
bias-disable;
};
kybd_default: kybd-default-state {
disable-pins {
pins = "gpio102";
@ -590,22 +686,6 @@
};
};
qup0_i2c4_default: qup0-i2c4-default-state {
pins = "gpio171", "gpio172";
function = "qup4";
bias-disable;
drive-strength = <16>;
};
qup2_i2c5_default: qup2-i2c5-default-state {
pins = "gpio81", "gpio82";
function = "qup21";
bias-disable;
drive-strength = <16>;
};
tpad_default: tpad-default-state {
int-n-pins {
pins = "gpio182";

590
arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
View File

@ -21,7 +21,38 @@
model = "Lenovo ThinkPad X13s";
compatible = "lenovo,thinkpad-x13s", "qcom,sc8280xp";
backlight {
aliases {
i2c4 = &i2c4;
i2c21 = &i2c21;
};
wcd938x: audio-codec {
compatible = "qcom,wcd9380-codec";
pinctrl-names = "default";
pinctrl-0 = <&wcd_default>;
reset-gpios = <&tlmm 106 GPIO_ACTIVE_LOW>;
vdd-buck-supply = <&vreg_s10b>;
vdd-rxtx-supply = <&vreg_s10b>;
vdd-io-supply = <&vreg_s10b>;
vdd-mic-bias-supply = <&vreg_bob>;
qcom,micbias1-microvolt = <1800000>;
qcom,micbias2-microvolt = <1800000>;
qcom,micbias3-microvolt = <1800000>;
qcom,micbias4-microvolt = <1800000>;
qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
qcom,rx-device = <&wcd_rx>;
qcom,tx-device = <&wcd_tx>;
#sound-dai-cells = <1>;
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pmc8280c_lpg 3 1000000>;
enable-gpios = <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>;
@ -31,52 +62,6 @@
pinctrl-0 = <&edp_bl_en>, <&edp_bl_pwm>;
};
thermal-zones {
skin-temp-thermal {
polling-delay-passive = <250>;
polling-delay = <0>;
thermal-sensors = <&pmk8280_adc_tm 5>;
trips {
skin_temp_alert0: trip-point0 {
temperature = <55000>;
hysteresis = <1000>;
type = "passive";
};
skin_temp_alert1: trip-point1 {
temperature = <58000>;
hysteresis = <1000>;
type = "passive";
};
skin-temp-crit {
temperature = <73000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&skin_temp_alert0>;
cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&skin_temp_alert1>;
cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
gpio-keys {
compatible = "gpio-keys";
@ -92,6 +77,22 @@
};
};
vreg_edp_3p3: regulator-edp-3p3 {
compatible = "regulator-fixed";
regulator-name = "VCC3LCD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&edp_reg_en>;
regulator-boot-on;
};
vreg_edp_bl: regulator-edp-bl {
compatible = "regulator-fixed";
@ -141,6 +142,16 @@
regulator-boot-on;
};
vreg_vph_pwr: regulator-vph-pwr {
compatible = "regulator-fixed";
regulator-name = "VPH_VCC3R9";
regulator-min-microvolt = <3900000>;
regulator-max-microvolt = <3900000>;
regulator-always-on;
};
vreg_wlan: regulator-wlan {
compatible = "regulator-fixed";
@ -172,6 +183,61 @@
regulator-boot-on;
};
reserved-memory {
linux,cma {
compatible = "shared-dma-pool";
size = <0x0 0x8000000>;
reusable;
linux,cma-default;
};
};
thermal-zones {
skin-temp-thermal {
polling-delay-passive = <250>;
polling-delay = <0>;
thermal-sensors = <&pmk8280_adc_tm 5>;
trips {
skin_temp_alert0: trip-point0 {
temperature = <55000>;
hysteresis = <1000>;
type = "passive";
};
skin_temp_alert1: trip-point1 {
temperature = <58000>;
hysteresis = <1000>;
type = "passive";
};
skin-temp-crit {
temperature = <73000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&skin_temp_alert0>;
cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&skin_temp_alert1>;
cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
};
&apps_rsc {
@ -181,6 +247,13 @@
vdd-l3-l5-supply = <&vreg_s11b>;
vreg_s10b: smps10 {
regulator-name = "vreg_s10b";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_s11b: smps11 {
regulator-name = "vreg_s11b";
regulator-min-microvolt = <1272000>;
@ -188,6 +261,13 @@
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_s12b: smps12 {
regulator-name = "vreg_s12b";
regulator-min-microvolt = <984000>;
regulator-max-microvolt = <984000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l3b: ldo3 {
regulator-name = "vreg_l3b";
regulator-min-microvolt = <1200000>;
@ -209,13 +289,13 @@
regulator-max-microvolt = <880000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-boot-on;
regulator-always-on; /* FIXME: VDD_A_EDP_0_0P9 */
};
};
pmc8280c-rpmh-regulators {
compatible = "qcom,pm8350c-rpmh-regulators";
qcom,pmic-id = "c";
vdd-bob-supply = <&vreg_vph_pwr>;
vreg_l1c: ldo1 {
regulator-name = "vreg_l1c";
@ -237,6 +317,13 @@
regulator-max-microvolt = <3072000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_bob: bob {
regulator-name = "vreg_bob";
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
};
};
pmc8280-2-rpmh-regulators {
@ -282,6 +369,130 @@
};
};
&dispcc0 {
status = "okay";
};
&mdss0 {
status = "okay";
};
&mdss0_dp3 {
compatible = "qcom,sc8280xp-edp";
data-lanes = <0 1 2 3>;
status = "okay";
aux-bus {
panel {
compatible = "edp-panel";
backlight = <&backlight>;
power-supply = <&vreg_edp_3p3>;
ports {
port {
edp_panel_in: endpoint {
remote-endpoint = <&mdss0_dp3_out>;
};
};
};
};
};
ports {
port@1 {
reg = <1>;
mdss0_dp3_out: endpoint {
remote-endpoint = <&edp_panel_in>;
};
};
};
};
&mdss0_dp3_phy {
vdda-phy-supply = <&vreg_l6b>;
vdda-pll-supply = <&vreg_l3b>;
status = "okay";
};
&i2c4 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c4_default>;
status = "okay";
/* FIXME: verify */
touchscreen@10 {
compatible = "hid-over-i2c";
reg = <0x10>;
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vreg_misc_3p3>;
pinctrl-names = "default";
pinctrl-0 = <&ts0_default>;
};
};
&i2c21 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c21_default>;
status = "okay";
touchpad@15 {
compatible = "hid-over-i2c";
reg = <0x15>;
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vreg_misc_3p3>;
pinctrl-names = "default";
pinctrl-0 = <&tpad_default>;
wakeup-source;
status = "disabled";
};
touchpad@2c {
compatible = "hid-over-i2c";
reg = <0x2c>;
hid-descr-addr = <0x20>;
interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vreg_misc_3p3>;
pinctrl-names = "default";
pinctrl-0 = <&tpad_default>;
wakeup-source;
};
keyboard@68 {
compatible = "hid-over-i2c";
reg = <0x68>;
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vreg_misc_3p3>;
pinctrl-names = "default";
pinctrl-0 = <&kybd_default>;
wakeup-source;
};
};
&pcie2a {
perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
@ -501,28 +712,6 @@
status = "okay";
};
&qup0_i2c4 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&qup0_i2c4_default>;
status = "okay";
/* FIXME: verify */
touchscreen@10 {
compatible = "hid-over-i2c";
reg = <0x10>;
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vreg_misc_3p3>;
pinctrl-names = "default";
pinctrl-0 = <&ts0_default>;
};
};
&qup1 {
status = "okay";
};
@ -531,59 +720,6 @@
status = "okay";
};
&qup2_i2c5 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&qup2_i2c5_default>;
status = "okay";
touchpad@15 {
compatible = "hid-over-i2c";
reg = <0x15>;
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vreg_misc_3p3>;
pinctrl-names = "default";
pinctrl-0 = <&tpad_default>;
wakeup-source;
status = "disabled";
};
touchpad@2c {
compatible = "hid-over-i2c";
reg = <0x2c>;
hid-descr-addr = <0x20>;
interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vreg_misc_3p3>;
pinctrl-names = "default";
pinctrl-0 = <&tpad_default>;
wakeup-source;
};
keyboard@68 {
compatible = "hid-over-i2c";
reg = <0x68>;
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vreg_misc_3p3>;
pinctrl-names = "default";
pinctrl-0 = <&kybd_default>;
wakeup-source;
};
};
&remoteproc_adsp {
firmware-name = "qcom/sc8280xp/LENOVO/21BX/qcadsp8280.mbn";
@ -596,6 +732,140 @@
status = "okay";
};
&rxmacro {
status = "okay";
};
&sound {
compatible = "qcom,sc8280xp-sndcard";
model = "SC8280XP-LENOVO-X13S";
audio-routing =
"SpkrLeft IN", "WSA_SPK1 OUT",
"SpkrRight IN", "WSA_SPK2 OUT",
"IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT",
"AMIC2", "MIC BIAS2",
"VA DMIC0", "MIC BIAS1",
"VA DMIC1", "MIC BIAS1",
"VA DMIC2", "MIC BIAS3",
"TX DMIC0", "MIC BIAS1",
"TX DMIC1", "MIC BIAS2",
"TX DMIC2", "MIC BIAS3",
"TX SWR_ADC1", "ADC2_OUTPUT";
wcd-playback-dai-link {
link-name = "WCD Playback";
cpu {
sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;
};
codec {
sound-dai = <&wcd938x 0>, <&swr1 0>, <&rxmacro 0>;
};
platform {
sound-dai = <&q6apm>;
};
};
wcd-capture-dai-link {
link-name = "WCD Capture";
cpu {
sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
};
codec {
sound-dai = <&wcd938x 1>, <&swr2 0>, <&txmacro 0>;
};
platform {
sound-dai = <&q6apm>;
};
};
wsa-dai-link {
link-name = "WSA Playback";
cpu {
sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
};
codec {
sound-dai = <&left_spkr>, <&right_spkr>, <&swr0 0>, <&wsamacro 0>;
};
platform {
sound-dai = <&q6apm>;
};
};
va-dai-link {
link-name = "VA Capture";
cpu {
sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
};
platform {
sound-dai = <&q6apm>;
};
codec {
sound-dai = <&vamacro 0>;
};
};
};
&swr0 {
status = "okay";
left_spkr: wsa8830-left@0,1 {
compatible = "sdw10217020200";
reg = <0 1>;
pinctrl-names = "default";
pinctrl-0 = <&spkr_1_sd_n_default>;
powerdown-gpios = <&tlmm 178 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
sound-name-prefix = "SpkrLeft";
#sound-dai-cells = <0>;
vdd-supply = <&vreg_s10b>;
};
right_spkr: wsa8830-right@0,2 {
compatible = "sdw10217020200";
reg = <0 2>;
pinctrl-names = "default";
pinctrl-0 = <&spkr_2_sd_n_default>;
powerdown-gpios = <&tlmm 179 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
sound-name-prefix = "SpkrRight";
#sound-dai-cells = <0>;
vdd-supply = <&vreg_s10b>;
};
};
&swr1 {
status = "okay";
wcd_rx: wcd9380-rx@0,4 {
compatible = "sdw20217010d00";
reg = <0 4>;
qcom,rx-port-mapping = <1 2 3 4 5>;
};
};
&swr2 {
status = "okay";
wcd_tx: wcd9380-tx@0,3 {
compatible = "sdw20217010d00";
reg = <0 3>;
qcom,tx-port-mapping = <1 1 2 3>;
};
};
&txmacro {
status = "okay";
};
&usb_0 {
status = "okay";
};
@ -644,12 +914,31 @@
status = "okay";
};
&vamacro {
pinctrl-0 = <&dmic01_default>, <&dmic02_default>;
pinctrl-names = "default";
vdd-micb-supply = <&vreg_s10b>;
qcom,dmic-sample-rate = <600000>;
status = "okay";
};
&wsamacro {
status = "okay";
};
&xo_board_clk {
clock-frequency = <38400000>;
};
/* PINCTRL */
&lpass_tlmm {
status = "okay";
};
&pmc8280_1_gpios {
edp_bl_en: edp-bl-en-state {
pins = "gpio8";
@ -691,6 +980,13 @@
&tlmm {
gpio-reserved-ranges = <70 2>, <74 6>, <83 4>, <125 2>, <128 2>, <154 7>;
edp_reg_en: edp-reg-en-state {
pins = "gpio25";
function = "gpio";
drive-strength = <16>;
bias-disable;
};
hall_int_n_default: hall-int-n-state {
pins = "gpio107";
function = "gpio";
@ -698,6 +994,20 @@
bias-disable;
};
i2c4_default: i2c4-default-state {
pins = "gpio171", "gpio172";
function = "qup4";
drive-strength = <16>;
bias-disable;
};
i2c21_default: i2c21-default-state {
pins = "gpio81", "gpio82";
function = "qup21";
drive-strength = <16>;
bias-disable;
};
kybd_default: kybd-default-state {
disable-pins {
pins = "gpio102";
@ -794,18 +1104,24 @@
};
};
qup0_i2c4_default: qup0-i2c4-default-state {
pins = "gpio171", "gpio172";
function = "qup4";
bias-disable;
drive-strength = <16>;
spkr_1_sd_n_default: spkr-1-sd-n-default-state {
perst-n-pins {
pins = "gpio178";
function = "gpio";
drive-strength = <16>;
bias-disable;
output-high;
};
};
qup2_i2c5_default: qup2-i2c5-default-state {
pins = "gpio81", "gpio82";
function = "qup21";
bias-disable;
drive-strength = <16>;
spkr_2_sd_n_default: spkr-2-sd-n-default-state {
perst-n-pins {
pins = "gpio179";
function = "gpio";
drive-strength = <16>;
bias-disable;
output-high;
};
};
tpad_default: tpad-default-state {
@ -830,4 +1146,12 @@
drive-strength = <16>;
};
};
wcd_default: wcd-default-state {
reset-pins {
pins = "gpio106";
function = "gpio";
bias-disable;
};
};
};

2496
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
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File diff suppressed because it is too large Load Diff

252
arch/arm64/boot/dts/qcom/sdm450-motorola-ali.dts Normal file
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@ -0,0 +1,252 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2022, Julian Braha <julianbraha@gmail.com>
*/
/dts-v1/;
#include "msm8953.dtsi"
#include "pm8953.dtsi"
#include "pmi8950.dtsi"
/delete-node/ &qseecom_mem;
/ {
model = "Motorola Moto G6";
compatible = "motorola,ali", "qcom,sdm450";
chassis-type = "handset";
qcom,msm-id = <338 0>;
qcom,board-id = <0x43 0xc200>;
gpio-keys {
compatible = "gpio-keys";
key-volume-up {
label = "volume_up";
gpios = <&tlmm 85 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
};
reserved-memory {
qseecom_mem: qseecom@84300000 {
reg = <0x0 0x84300000 0x0 0x2000000>;
no-map;
};
ramoops@ef000000 {
compatible = "ramoops";
reg = <0x0 0xef000000 0x0 0xc0000>;
console-size = <0x40000>;
};
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-always-on;
regulator-boot-on;
};
};
&hsusb_phy {
vdd-supply = <&pm8953_l3>;
vdda-pll-supply = <&pm8953_l7>;
vdda-phy-dpdm-supply = <&pm8953_l13>;
status = "okay";
};
&i2c_3 {
status = "okay";
touchscreen@38 {
compatible = "edt,edt-ft5406";
reg = <0x38>;
interrupt-parent = <&tlmm>;
interrupts = <65 IRQ_TYPE_EDGE_FALLING>;
vcc-supply = <&pm8953_l10>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_active &ts_reset_active>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_LOW>;
touchscreen-size-x = <1080>;
touchscreen-size-y = <2160>;
};
};
&pm8953_resin {
linux,code = <KEY_VOLUMEDOWN>;
status = "okay";
};
&pmi8950_wled {
qcom,num-strings = <3>;
qcom,external-pfet;
qcom,cabc;
status = "okay";
};
&rpm_requests {
regulators {
compatible = "qcom,rpm-pm8953-regulators";
vdd_s1-supply = <&vph_pwr>;
vdd_s2-supply = <&vph_pwr>;
vdd_s3-supply = <&vph_pwr>;
vdd_s4-supply = <&vph_pwr>;
vdd_s5-supply = <&vph_pwr>;
vdd_s6-supply = <&vph_pwr>;
vdd_s7-supply = <&vph_pwr>;
vdd_l1-supply = <&pm8953_s3>;
vdd_l2_l3-supply = <&pm8953_s3>;
vdd_l4_l5_l6_l7_l16_l19-supply = <&pm8953_s4>;
vdd_l8_l11_l12_l13_l14_l15-supply = <&vph_pwr>;
vdd_l9_l10_l17_l18_l22-supply = <&vph_pwr>;
pm8953_s1: s1 {
regulator-min-microvolt = <795000>;
regulator-max-microvolt = <1081000>;
};
pm8953_s3: s3 {
regulator-min-microvolt = <1224000>;
regulator-max-microvolt = <1224000>;
};
pm8953_s4: s4 {
regulator-min-microvolt = <1900000>;
regulator-max-microvolt = <2050000>;
};
pm8953_l1: l1 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1100000>;
};
pm8953_l2: l2 {
regulator-min-microvolt = <975000>;
regulator-max-microvolt = <1225000>;
};
pm8953_l3: l3 {
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <925000>;
};
pm8953_l5: l5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l6: l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l7: l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1900000>;
};
pm8953_l8: l8 {
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
};
pm8953_l9: l9 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
};
pm8953_l10: l10 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
};
pm8953_l11: l11 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
};
pm8953_l12: l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
};
pm8953_l13: l13 {
regulator-min-microvolt = <3125000>;
regulator-max-microvolt = <3125000>;
};
pm8953_l16: l16 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l17: l17 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
};
pm8953_l19: l19 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1350000>;
};
pm8953_l22: l22 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2850000>;
};
pm8953_l23: l23 {
regulator-min-microvolt = <975000>;
regulator-max-microvolt = <1225000>;
};
};
};
&sdhc_1 {
vmmc-supply = <&pm8953_l8>;
vqmmc-supply = <&pm8953_l5>;
status = "okay";
};
&sdhc_2 {
vmmc-supply = <&pm8953_l11>;
vqmmc-supply = <&pm8953_l12>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_off>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
status = "okay";
};
&tlmm {
gpio-reserved-ranges = <95 5>, <111 1>, <126 1>;
ts_int_active: ts-int-active-state {
pins = "gpio65";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
ts_reset_active: ts-reset-active-state {
pins = "gpio64";
function = "gpio";
drive-strength = <0x08>;
bias-pull-up;
};
};
&usb3 {
status = "okay";
};
&usb3_dwc3 {
dr_mode = "peripheral";
};

5
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts
View File

@ -21,6 +21,11 @@
};
};
/* Reserve a bigger chunk of RAM for the higher-res display */
&cont_splash_mem {
reg = <0 0x9d400000 0 (2520 * 1080 * 4)>;
};
/* Ganges devices feature a Novatek touchscreen instead. */
/delete-node/ &touchscreen;
/delete-node/ &vreg_l18a_1v8;

15
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
View File

@ -57,7 +57,7 @@
regulator-boot-on;
};
cam_vdig_imx300_219_vreg: cam_vdig_imx300_219_vreg {
cam_vdig_imx300_219_vreg: cam-vdig-imx300-219-regulator {
compatible = "regulator-fixed";
regulator-name = "cam_vdig_imx300_219_vreg";
startup-delay-us = <0>;
@ -67,7 +67,7 @@
pinctrl-0 = <&cam_vdig_default>;
};
cam_vana_front_vreg: cam_vana_front_vreg {
cam_vana_front_vreg: cam-vana-front-regulator {
compatible = "regulator-fixed";
regulator-name = "cam_vana_front_vreg";
startup-delay-us = <0>;
@ -77,7 +77,7 @@
pinctrl-0 = <&imx219_vana_default>;
};
cam_vana_rear_vreg: cam_vana_rear_vreg {
cam_vana_rear_vreg: cam-vana-rear-regulator {
compatible = "regulator-fixed";
regulator-name = "cam_vana_rear_vreg";
startup-delay-us = <0>;
@ -133,15 +133,20 @@
status = "okay";
};
debug_region@ffb00000 {
debug@ffb00000 {
reg = <0x00 0xffb00000 0x00 0x100000>;
no-map;
};
removed_region@85800000 {
reserved@85800000 {
reg = <0x00 0x85800000 0x00 0x3700000>;
no-map;
};
cont_splash_mem: splash@9d400000 {
reg = <0 0x9d400000 0 (1920 * 1080 * 4)>;
no-map;
};
};
/*

35
arch/arm64/boot/dts/qcom/sdm630.dtsi
View File

@ -678,7 +678,7 @@
mnoc: interconnect@1745000 {
compatible = "qcom,sdm660-mnoc";
reg = <0x01745000 0xA010>;
reg = <0x01745000 0xa010>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a", "iface";
clocks = <&rpmcc RPM_SMD_MMSSNOC_AXI_CLK>,
@ -1044,43 +1044,43 @@
opp-hz = /bits/ 64 <775000000>;
opp-level = <RPM_SMD_LEVEL_TURBO>;
opp-peak-kBps = <5412000>;
opp-supported-hw = <0xA2>;
opp-supported-hw = <0xa2>;
};
opp-647000000 {
opp-hz = /bits/ 64 <647000000>;
opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;
opp-peak-kBps = <4068000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-588000000 {
opp-hz = /bits/ 64 <588000000>;
opp-level = <RPM_SMD_LEVEL_NOM>;
opp-peak-kBps = <3072000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-465000000 {
opp-hz = /bits/ 64 <465000000>;
opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;
opp-peak-kBps = <2724000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-370000000 {
opp-hz = /bits/ 64 <370000000>;
opp-level = <RPM_SMD_LEVEL_SVS>;
opp-peak-kBps = <2188000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-240000000 {
opp-hz = /bits/ 64 <240000000>;
opp-level = <RPM_SMD_LEVEL_LOW_SVS>;
opp-peak-kBps = <1648000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
opp-level = <RPM_SMD_LEVEL_MIN_SVS>;
opp-peak-kBps = <1200000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
};
};
@ -1470,7 +1470,7 @@
};
};
mdss: mdss@c900000 {
mdss: display-subsystem@c900000 {
compatible = "qcom,mdss";
reg = <0x0c900000 0x1000>,
<0x0c9b0000 0x1040>;
@ -1497,8 +1497,8 @@
ranges;
status = "disabled";
mdp: mdp@c901000 {
compatible = "qcom,mdp5";
mdp: display-controller@c901000 {
compatible = "qcom,sdm630-mdp5", "qcom,mdp5";
reg = <0x0c901000 0x89000>;
reg-names = "mdp_phys";
@ -1572,7 +1572,8 @@
};
dsi0: dsi@c994000 {
compatible = "qcom,mdss-dsi-ctrl";
compatible = "qcom,sdm660-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0x0c994000 0x400>;
reg-names = "dsi_ctrl";
@ -2409,7 +2410,7 @@
type = "passive";
};
cpu0_crit: cpu_crit {
cpu0_crit: cpu-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
@ -2430,7 +2431,7 @@
type = "passive";
};
cpu1_crit: cpu_crit {
cpu1_crit: cpu-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
@ -2451,7 +2452,7 @@
type = "passive";
};
cpu2_crit: cpu_crit {
cpu2_crit: cpu-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
@ -2472,7 +2473,7 @@
type = "passive";
};
cpu3_crit: cpu_crit {
cpu3_crit: cpu-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
@ -2499,7 +2500,7 @@
type = "passive";
};
pwr_cluster_crit: cpu_crit {
pwr_cluster_crit: cpu-crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";

15
arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts
View File

@ -63,6 +63,21 @@
};
};
&i2c_5 {
status = "okay";
nfc@28 {
compatible = "nxp,nq310", "nxp,nxp-nci-i2c";
reg = <0x28>;
interrupt-parent = <&tlmm>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
enable-gpios = <&tlmm 16 GPIO_ACTIVE_HIGH>;
firmware-gpios = <&tlmm 62 GPIO_ACTIVE_HIGH>;
};
};
&pm8953_resin {
status = "okay";
linux,code = <KEY_VOLUMEDOWN>;

291
arch/arm64/boot/dts/qcom/sdm632-motorola-ocean.dts Normal file
View File

@ -0,0 +1,291 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2022, Gabriela David
*/
/dts-v1/;
#include "sdm632.dtsi"
#include "pm8953.dtsi"
#include <dt-bindings/leds/common.h>
/delete-node/ &cont_splash_mem;
/delete-node/ &qseecom_mem;
/ {
model = "Motorola G7 Power";
compatible = "motorola,ocean", "qcom,sdm632";
chassis-type = "handset";
qcom,msm-id = <349 0>;
qcom,board-id = <0x141 0xc100>;
qcom,pmic-id = <0x10016 0x25 0x00 0x00>;
backlight: backlight {
compatible = "led-backlight";
leds = <&led>;
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
framebuffer@90001000 {
compatible = "simple-framebuffer";
reg = <0 0x90001000 0 (720 * 1520 * 3)>;
width = <720>;
height = <1520>;
stride = <(720 * 3)>;
format = "r8g8b8";
power-domains = <&gcc MDSS_GDSC>;
clocks = <&gcc GCC_MDSS_AHB_CLK>,
<&gcc GCC_MDSS_AXI_CLK>,
<&gcc GCC_MDSS_VSYNC_CLK>,
<&gcc GCC_MDSS_MDP_CLK>,
<&gcc GCC_MDSS_BYTE0_CLK>,
<&gcc GCC_MDSS_PCLK0_CLK>,
<&gcc GCC_MDSS_ESC0_CLK>;
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&gpio_key_default>;
key-volume-up {
label = "Volume Up";
gpios = <&tlmm 85 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
};
reserved-memory {
qseecom_mem: qseecom@84300000 {
reg = <0x0 0x84300000 0x0 0x2000000>;
no-map;
};
cont_splash_mem: cont-splash@90001000 {
reg = <0x0 0x90001000 0x0 (720 * 1520 * 3)>;
no-map;
};
reserved@eefa1800 {
reg = <0x00 0xeefa1800 0x00 0x5e800>;
no-map;
};
ramoops@ef000000 {
compatible = "ramoops";
reg = <0x0 0xef000000 0x0 0xbf800>;
console-size = <0x40000>;
pmsg-size = <0x40000>;
record-size = <0x3f800>;
};
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-always-on;
regulator-boot-on;
};
};
&hsusb_phy {
vdd-supply = <&pm8953_l3>;
vdda-pll-supply = <&pm8953_l7>;
vdda-phy-dpdm-supply = <&pm8953_l13>;
status = "okay";
};
&i2c_3 {
status = "okay";
touchscreen@41 {
compatible = "ilitek,ili2117";
reg = <0x41>;
interrupt-parent = <&tlmm>;
interrupts = <65 IRQ_TYPE_EDGE_FALLING>;
touchscreen-inverted-x;
};
};
&i2c_5 {
status = "okay";
led-controller@36 {
compatible = "ti,lm3697";
reg = <0x36>;
#address-cells = <1>;
#size-cells = <0>;
led: led@1 {
reg = <1>;
default-trigger = "backlight";
function = LED_FUNCTION_BACKLIGHT;
led-sources = <0 1 2>;
};
};
};
&pm8953_resin {
linux,code = <KEY_VOLUMEDOWN>;
status = "okay";
};
&rpm_requests {
regulators {
compatible = "qcom,rpm-pm8953-regulators";
vdd_l1-supply = <&pm8953_s3>;
vdd_l2_l3-supply = <&pm8953_s3>;
vdd_l4_l5_l6_l7_l16_l19-supply = <&pm8953_s4>;
vdd_l8_l11_l12_l13_l14_l15-supply = <&vph_pwr>;
vdd_l9_l10_l17_l18_l22-supply = <&vph_pwr>;
pm8953_s3: s3 {
regulator-min-microvolt = <984000>;
regulator-max-microvolt = <1240000>;
};
pm8953_s4: s4 {
regulator-min-microvolt = <1036000>;
regulator-max-microvolt = <2040000>;
};
pm8953_l1: l1 {
regulator-min-microvolt = <975000>;
regulator-max-microvolt = <1050000>;
};
pm8953_l2: l2 {
regulator-min-microvolt = <975000>;
regulator-max-microvolt = <1175000>;
};
pm8953_l3: l3 {
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <925000>;
regulator-allow-set-load;
};
pm8953_l5: l5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l6: l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
pm8953_l7: l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1900000>;
};
pm8953_l8: l8 {
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
};
pm8953_l9: l9 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
};
pm8953_l10: l10 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <3000000>;
};
pm8953_l11: l11 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
};
pm8953_l12: l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
};
pm8953_l13: l13 {
regulator-min-microvolt = <3125000>;
regulator-max-microvolt = <3125000>;
};
pm8953_l16: l16 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8953_l17: l17 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
};
pm8953_l18: l18 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2700000>;
regulator-always-on;
regulator-boot-on;
};
pm8953_l19: l19 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1350000>;
};
pm8953_l22: l22 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
pm8953_l23: l23 {
regulator-min-microvolt = <975000>;
regulator-max-microvolt = <1225000>;
};
};
};
&sdhc_1 {
vmmc-supply = <&pm8953_l8>;
vqmmc-supply = <&pm8953_l5>;
status = "okay";
};
&sdhc_2 {
vmmc-supply = <&pm8953_l11>;
vqmmc-supply = <&pm8953_l12>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
status = "okay";
};
&tlmm {
gpio-reserved-ranges = <96 4>;
};
&usb3 {
status = "okay";
};
&usb3_dwc3 {
dr_mode = "peripheral";
};

19
arch/arm64/boot/dts/qcom/sdm660.dtsi
View File

@ -37,35 +37,35 @@
opp-hz = /bits/ 64 <700000000>;
opp-level = <RPM_SMD_LEVEL_TURBO>;
opp-peak-kBps = <5184000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-647000000 {
opp-hz = /bits/ 64 <647000000>;
opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;
opp-peak-kBps = <4068000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-588000000 {
opp-hz = /bits/ 64 <588000000>;
opp-level = <RPM_SMD_LEVEL_NOM>;
opp-peak-kBps = <3072000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-465000000 {
opp-hz = /bits/ 64 <465000000>;
opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;
opp-peak-kBps = <2724000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-370000000 {
opp-hz = /bits/ 64 <370000000>;
opp-level = <RPM_SMD_LEVEL_SVS>;
opp-peak-kBps = <2188000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
*/
@ -73,14 +73,14 @@
opp-hz = /bits/ 64 <266000000>;
opp-level = <RPM_SMD_LEVEL_LOW_SVS>;
opp-peak-kBps = <1648000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
opp-level = <RPM_SMD_LEVEL_MIN_SVS>;
opp-peak-kBps = <1200000>;
opp-supported-hw = <0xFF>;
opp-supported-hw = <0xff>;
};
};
};
@ -142,6 +142,8 @@
};
&mdp {
compatible = "qcom,sdm660-mdp5", "qcom,mdp5";
ports {
port@1 {
reg = <1>;
@ -154,7 +156,8 @@
&mdss {
dsi1: dsi@c996000 {
compatible = "qcom,mdss-dsi-ctrl";
compatible = "qcom,sdm660-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0x0c996000 0x400>;
reg-names = "dsi_ctrl";

1
arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts
View File

@ -256,6 +256,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-enable-ramp-delay = <250>;
regulator-always-on;
};
vreg_l9a_1p8: ldo9 {

14
arch/arm64/boot/dts/qcom/sdm670.dtsi
View File

@ -401,6 +401,18 @@
#power-domain-cells = <1>;
};
qfprom: qfprom@784000 {
compatible = "qcom,sdm670-qfprom", "qcom,qfprom";
reg = <0 0x00784000 0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
qusb2_hstx_trim: hstx-trim@1eb {
reg = <0x1eb 0x1>;
bits = <1 4>;
};
};
sdhc_1: mmc@7c4000 {
compatible = "qcom,sdm670-sdhci", "qcom,sdhci-msm-v5";
reg = <0 0x007c4000 0 0x1000>,
@ -928,6 +940,8 @@
resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
nvmem-cells = <&qusb2_hstx_trim>;
status = "disabled";
};

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