ixgbe: Add support for padding packet
This patch adds support for providing a buffer with headroom and tailroom to allow for shared info, NET_SKB_PAD, and NET_IP_ALIGN. With this combined with the DMA changes we can start using build_skb to build frames around an incoming Rx buffer instead of having to memcpy the headers. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -91,6 +91,14 @@
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#define IXGBE_RXBUFFER_4K 4096
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#define IXGBE_MAX_RXBUFFER 16384 /* largest size for a single descriptor */
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#define IXGBE_SKB_PAD (NET_SKB_PAD + NET_IP_ALIGN)
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#if (PAGE_SIZE < 8192)
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#define IXGBE_MAX_FRAME_BUILD_SKB \
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(SKB_WITH_OVERHEAD(IXGBE_RXBUFFER_2K) - IXGBE_SKB_PAD)
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#else
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#define IGB_MAX_FRAME_BUILD_SKB IXGBE_RXBUFFER_2K
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#endif
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/*
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* NOTE: netdev_alloc_skb reserves up to 64 bytes, NET_IP_ALIGN means we
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* reserve 64 more, and skb_shared_info adds an additional 320 bytes more,
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@ -227,6 +235,7 @@ struct ixgbe_rx_queue_stats {
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enum ixgbe_ring_state_t {
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__IXGBE_RX_3K_BUFFER,
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__IXGBE_RX_BUILD_SKB_ENABLED,
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__IXGBE_RX_RSC_ENABLED,
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__IXGBE_RX_CSUM_UDP_ZERO_ERR,
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__IXGBE_RX_FCOE,
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@ -236,6 +245,9 @@ enum ixgbe_ring_state_t {
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__IXGBE_HANG_CHECK_ARMED,
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};
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#define ring_uses_build_skb(ring) \
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test_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &(ring)->state)
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struct ixgbe_fwd_adapter {
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unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
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struct net_device *netdev;
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@ -347,6 +359,10 @@ static inline unsigned int ixgbe_rx_bufsz(struct ixgbe_ring *ring)
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{
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if (test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
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return IXGBE_RXBUFFER_3K;
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#if (PAGE_SIZE < 8192)
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if (ring_uses_build_skb(ring))
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return IXGBE_MAX_FRAME_BUILD_SKB;
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#endif
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return IXGBE_RXBUFFER_2K;
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}
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@ -545,6 +561,7 @@ struct ixgbe_adapter {
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#define IXGBE_FLAG2_VLAN_PROMISC BIT(13)
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#define IXGBE_FLAG2_EEE_CAPABLE BIT(14)
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#define IXGBE_FLAG2_EEE_ENABLED BIT(15)
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#define IXGBE_FLAG2_RX_LEGACY BIT(16)
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/* Tx fast path data */
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int num_tx_queues;
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@ -1552,6 +1552,11 @@ static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
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}
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}
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static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
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{
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return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
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}
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static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
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struct ixgbe_rx_buffer *bi)
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{
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@ -1588,7 +1593,7 @@ static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
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bi->dma = dma;
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bi->page = page;
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bi->page_offset = 0;
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bi->page_offset = ixgbe_rx_offset(rx_ring);
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bi->pagecnt_bias = 1;
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return true;
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@ -2001,7 +2006,9 @@ static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
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#if (PAGE_SIZE < 8192)
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unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
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#else
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unsigned int truesize = SKB_DATA_ALIGN(size);
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unsigned int truesize = ring_uses_build_skb(rx_ring) ?
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SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
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SKB_DATA_ALIGN(size);
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#endif
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skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
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rx_buffer->page_offset, size, truesize);
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@ -2083,7 +2090,7 @@ static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
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#if (PAGE_SIZE < 8192)
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unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
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#else
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unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
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unsigned int truesize = SKB_DATA_ALIGN(size);
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#endif
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struct sk_buff *skb;
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@ -3410,7 +3417,10 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
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srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
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/* configure the packet buffer length */
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srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
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if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state))
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srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
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else
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srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
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/* configure descriptor type */
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srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
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@ -3744,6 +3754,17 @@ void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
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*/
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rxdctl &= ~0x3FFFFF;
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rxdctl |= 0x080420;
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#if (PAGE_SIZE < 8192)
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} else {
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rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
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IXGBE_RXDCTL_RLPML_EN);
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/* Limit the maximum frame size so we don't overrun the skb */
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if (ring_uses_build_skb(ring) &&
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!test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
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rxdctl |= IXGBE_MAX_FRAME_BUILD_SKB |
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IXGBE_RXDCTL_RLPML_EN;
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#endif
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}
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/* initialize Rx descriptor 0 */
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@ -3889,12 +3910,26 @@ static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
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clear_ring_rsc_enabled(rx_ring);
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clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
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clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
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if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
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set_ring_rsc_enabled(rx_ring);
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if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
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set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
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if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
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continue;
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set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
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#if (PAGE_SIZE < 8192)
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if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
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set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
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if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN))
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set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
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#endif
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}
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}
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