drm/nve0/fb/gddr5: fix behaviour of lp3 setting
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -78,6 +78,9 @@ nouveau_gddr5_calc(struct nouveau_ram *ram)
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ram->mr[3] &= ~0x020;
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ram->mr[3] |= (rq & 0x01) << 5;
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/*XXX: LP3, where's the bit? Let's hardcode to off for now */
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ram->mr[5] &= ~0x004;
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if (!vo)
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vo = (ram->mr[6] & 0xff0) >> 4;
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if (ram->mr[6] & 0x001)
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@ -528,7 +528,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
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ram_mask(fuc, mr[8], 0xfff, ram->base.mr[8]);
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ram_nsec(fuc, 1000);
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ram_mask(fuc, mr[1], 0xfff, ram->base.mr[1]);
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ram_mask(fuc, mr[5], 0xfff, ram->base.mr[5]);
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ram_mask(fuc, mr[5], 0xfff, ram->base.mr[5] & ~0x004); /* LP3 later */
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ram_mask(fuc, mr[6], 0xfff, ram->base.mr[6]);
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ram_mask(fuc, mr[7], 0xfff, ram->base.mr[7]);
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@ -582,7 +582,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
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/* MR5: (re)enable LP3 if necessary
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* XXX: need to find the switch, keeping off for now
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*/
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ram_mask(fuc, mr[5], 0x00000004, 0x00000000);
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ram_mask(fuc, mr[5], 0xfff, ram->base.mr[5]);
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if (ram->mode != 2) {
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ram_mask(fuc, 0x10f830, 0x01000000, 0x01000000);
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