drm/i915: Move per-platform power well hooks to intel_display_power_well.c
Move the implementation of platform specific power well hooks to intel_display_power_well.c, to reduce the clutter in intel_display_power.c. The locking of all the power domain/power well state is handled in the power domain functions in intel_display_power.c using i915_power_domains::lock. This patch also moves the chy_phy_powergate_ch/lanes() functions to intel_display_power_well.c which borrow the same lock to protect the DISPLAY_PHY_CONTROL register state, which the HW uses both for toggling power wells and power gating PHY lanes. No functional change. v2: - Clarify in the commit log why CHV functions using the i915_power_domains::lock were moved, while others locking the power domain/well state were kept in intel_display_power.c . (Jouni) - Move forward declaration of chv_phy_powergate_ch/lanes() to intel_display_power_well.h . Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220414210657.1785773-1-imre.deak@intel.com
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@ -305,9 +305,4 @@ void gen9_dbuf_slices_update(struct drm_i915_private *dev_priv,
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for ((wf) = intel_display_power_get_if_enabled((i915), (domain)); (wf); \
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intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)
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void chv_phy_powergate_lanes(struct intel_encoder *encoder,
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bool override, unsigned int mask);
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bool chv_phy_powergate_ch(struct drm_i915_private *dev_priv, enum dpio_phy phy,
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enum dpio_channel ch, bool override);
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#endif /* __INTEL_DISPLAY_POWER_H__ */
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@ -36,41 +36,6 @@ enum i915_power_well_id {
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TGL_DISP_PW_TC_COLD_OFF,
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};
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struct i915_power_well_regs {
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i915_reg_t bios;
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i915_reg_t driver;
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i915_reg_t kvmr;
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i915_reg_t debug;
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};
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struct i915_power_well_ops {
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const struct i915_power_well_regs *regs;
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/*
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* Synchronize the well's hw state to match the current sw state, for
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* example enable/disable it based on the current refcount. Called
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* during driver init and resume time, possibly after first calling
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* the enable/disable handlers.
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*/
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void (*sync_hw)(struct drm_i915_private *i915,
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struct i915_power_well *power_well);
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/*
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* Enable the well and resources that depend on it (for example
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* interrupts located on the well). Called after the 0->1 refcount
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* transition.
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*/
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void (*enable)(struct drm_i915_private *i915,
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struct i915_power_well *power_well);
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/*
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* Disable the well and resources that depend on it. Called after
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* the 1->0 refcount transition.
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*/
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void (*disable)(struct drm_i915_private *i915,
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struct i915_power_well *power_well);
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/* Returns the hw enabled state. */
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bool (*is_enabled)(struct drm_i915_private *i915,
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struct i915_power_well *power_well);
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};
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struct i915_power_well_desc {
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const char *name;
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bool always_on;
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@ -150,4 +115,31 @@ const char *intel_power_well_name(struct i915_power_well *power_well);
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u64 intel_power_well_domains(struct i915_power_well *power_well);
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int intel_power_well_refcount(struct i915_power_well *power_well);
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void chv_phy_powergate_lanes(struct intel_encoder *encoder,
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bool override, unsigned int mask);
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bool chv_phy_powergate_ch(struct drm_i915_private *dev_priv, enum dpio_phy phy,
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enum dpio_channel ch, bool override);
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void gen9_enable_dc5(struct drm_i915_private *dev_priv);
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void skl_enable_dc6(struct drm_i915_private *dev_priv);
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void gen9_sanitize_dc_state(struct drm_i915_private *dev_priv);
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void gen9_set_dc_state(struct drm_i915_private *dev_priv, u32 state);
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void gen9_disable_dc_states(struct drm_i915_private *dev_priv);
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void bxt_enable_dc9(struct drm_i915_private *dev_priv);
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void bxt_disable_dc9(struct drm_i915_private *dev_priv);
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extern const struct i915_power_well_ops i9xx_always_on_power_well_ops;
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extern const struct i915_power_well_ops chv_pipe_power_well_ops;
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extern const struct i915_power_well_ops chv_dpio_cmn_power_well_ops;
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extern const struct i915_power_well_ops i830_pipes_power_well_ops;
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extern const struct i915_power_well_ops hsw_power_well_ops;
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extern const struct i915_power_well_ops gen9_dc_off_power_well_ops;
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extern const struct i915_power_well_ops bxt_dpio_cmn_power_well_ops;
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extern const struct i915_power_well_ops vlv_display_power_well_ops;
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extern const struct i915_power_well_ops vlv_dpio_cmn_power_well_ops;
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extern const struct i915_power_well_ops vlv_dpio_power_well_ops;
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extern const struct i915_power_well_ops icl_aux_power_well_ops;
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extern const struct i915_power_well_ops icl_ddi_power_well_ops;
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extern const struct i915_power_well_ops tgl_tc_cold_off_ops;
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#endif
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@ -24,6 +24,7 @@
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#include "intel_ddi.h"
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#include "intel_ddi_buf_trans.h"
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#include "intel_de.h"
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#include "intel_display_power_well.h"
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#include "intel_display_types.h"
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#include "intel_dp.h"
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#include "intel_dpio_phy.h"
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@ -6,6 +6,7 @@
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#include "g4x_dp.h"
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#include "i915_drv.h"
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#include "intel_de.h"
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#include "intel_display_power_well.h"
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#include "intel_display_types.h"
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#include "intel_dp.h"
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#include "intel_dpll.h"
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