mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driver
The driver adds the support for the STMicroelectronics FMC2 NAND Controller found on STM32MP SOCs. This patch is based on FMC2 command sequencer. The purpose of the command sequencer is to facilitate the programming and the reading of NAND flash pages with the ECC and to free the CPU of sequencing tasks. It requires one DMA channel for write and two DMA channels for read operations. Only NAND_ECC_HW mode is actually supported. The driver supports a maximum 8k page size. The following ECC strength and step size are currently supported: - nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8) - nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4) - nand-ecc-strength = <1>, nand-ecc-step-size = <512> (Extended ECC based on Hamming) This patch has been tested on Micron MT29F8G08ABACAH4 and MT29F8G16ABACAH4 Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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@ -541,4 +541,13 @@ config MTD_NAND_TEGRA
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is supported. Extra OOB bytes when using HW ECC are currently
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not supported.
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config MTD_NAND_STM32_FMC2
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tristate "Support for NAND controller on STM32MP SoCs"
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depends on MACH_STM32MP157 || COMPILE_TEST
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help
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Enables support for NAND Flash chips on SoCs containing the FMC2
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NAND controller. This controller is found on STM32MP SoCs.
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The controller supports a maximum 8k page size and supports
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a maximum 8-bit correction error per sector of 512 bytes.
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endif # MTD_NAND
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@ -56,6 +56,7 @@ obj-$(CONFIG_MTD_NAND_BRCMNAND) += brcmnand/
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obj-$(CONFIG_MTD_NAND_QCOM) += qcom_nandc.o
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obj-$(CONFIG_MTD_NAND_MTK) += mtk_ecc.o mtk_nand.o
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obj-$(CONFIG_MTD_NAND_TEGRA) += tegra_nand.o
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obj-$(CONFIG_MTD_NAND_STM32_FMC2) += stm32_fmc2_nand.o
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nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o
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nand-objs += nand_onfi.o
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