[media] saa7115: Implement i2c_board_info.platform_data
This patch implements i2c_board_info.platform_data, and some options to override the default initialization table for the GM7113C and SAA7113 chips. Signed-off-by: Jon Arne Jørgensen <jonarne@jonarne.no> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This commit is contained in:
Jon Arne Jørgensen
Mauro Carvalho Chehab
parent
b9798bc160
commit
2ccf12afe6
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@ -225,19 +225,25 @@ static const unsigned char saa7111_init[] = {
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0x00, 0x00
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};
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/* SAA7113/GM7113C init codes
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* It's important that R_14... R_17 == 0x00
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* for the gm7113c chip to deliver stable video
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*/
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/* This table has one illegal value, and some values that are not
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correct according to the datasheet initialization table.
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If you need a table with legal/default values tell the driver in
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i2c_board_info.platform_data, and you will get the gm7113c_init
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table instead. */
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/* SAA7113 Init codes */
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static const unsigned char saa7113_init[] = {
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R_01_INC_DELAY, 0x08,
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R_02_INPUT_CNTL_1, 0xc2,
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R_03_INPUT_CNTL_2, 0x30,
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R_04_INPUT_CNTL_3, 0x00,
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R_05_INPUT_CNTL_4, 0x00,
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R_06_H_SYNC_START, 0x89,
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R_06_H_SYNC_START, 0x89, /* Illegal value -119,
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* min. value = -108 (0x94) */
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R_07_H_SYNC_STOP, 0x0d,
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R_08_SYNC_CNTL, 0x88,
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R_08_SYNC_CNTL, 0x88, /* Not datasheet default.
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* HTC = VTR mode, should be 0x98 */
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R_09_LUMA_CNTL, 0x01,
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R_0A_LUMA_BRIGHT_CNTL, 0x80,
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R_0B_LUMA_CONTRAST_CNTL, 0x47,
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@ -245,9 +251,43 @@ static const unsigned char saa7113_init[] = {
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R_0D_CHROMA_HUE_CNTL, 0x00,
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R_0E_CHROMA_CNTL_1, 0x01,
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R_0F_CHROMA_GAIN_CNTL, 0x2a,
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R_10_CHROMA_CNTL_2, 0x08,
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R_10_CHROMA_CNTL_2, 0x08, /* Not datsheet default.
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* VRLN enabled, should be 0x00 */
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R_11_MODE_DELAY_CNTL, 0x0c,
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R_12_RT_SIGNAL_CNTL, 0x07,
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R_12_RT_SIGNAL_CNTL, 0x07, /* Not datasheet default,
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* should be 0x01 */
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R_13_RT_X_PORT_OUT_CNTL, 0x00,
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R_14_ANAL_ADC_COMPAT_CNTL, 0x00,
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R_15_VGATE_START_FID_CHG, 0x00,
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R_16_VGATE_STOP, 0x00,
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R_17_MISC_VGATE_CONF_AND_MSB, 0x00,
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0x00, 0x00
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};
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/* GM7113C is a clone of the SAA7113 chip
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This init table is copied out of the saa7113 datasheet.
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In R_08 we enable "Automatic Field Detection" [AUFD],
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this is disabled when saa711x_set_v4lstd is called. */
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static const unsigned char gm7113c_init[] = {
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R_01_INC_DELAY, 0x08,
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R_02_INPUT_CNTL_1, 0xc0,
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R_03_INPUT_CNTL_2, 0x33,
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R_04_INPUT_CNTL_3, 0x00,
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R_05_INPUT_CNTL_4, 0x00,
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R_06_H_SYNC_START, 0xe9,
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R_07_H_SYNC_STOP, 0x0d,
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R_08_SYNC_CNTL, 0x98,
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R_09_LUMA_CNTL, 0x01,
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R_0A_LUMA_BRIGHT_CNTL, 0x80,
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R_0B_LUMA_CONTRAST_CNTL, 0x47,
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R_0C_CHROMA_SAT_CNTL, 0x40,
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R_0D_CHROMA_HUE_CNTL, 0x00,
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R_0E_CHROMA_CNTL_1, 0x01,
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R_0F_CHROMA_GAIN_CNTL, 0x2a,
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R_10_CHROMA_CNTL_2, 0x00,
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R_11_MODE_DELAY_CNTL, 0x0c,
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R_12_RT_SIGNAL_CNTL, 0x01,
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R_13_RT_X_PORT_OUT_CNTL, 0x00,
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R_14_ANAL_ADC_COMPAT_CNTL, 0x00,
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R_15_VGATE_START_FID_CHG, 0x00,
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@ -1585,6 +1625,65 @@ static const struct v4l2_subdev_ops saa711x_ops = {
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/* ----------------------------------------------------------------------- */
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static void saa711x_write_platform_data(struct saa711x_state *state,
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struct saa7115_platform_data *data)
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{
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struct v4l2_subdev *sd = &state->sd;
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u8 work;
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if (state->ident != GM7113C &&
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state->ident != SAA7113)
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return;
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if (data->saa7113_r08_htc) {
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work = saa711x_read(sd, R_08_SYNC_CNTL);
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work &= ~SAA7113_R_08_HTC_MASK;
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work |= ((*data->saa7113_r08_htc) << SAA7113_R_08_HTC_OFFSET);
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saa711x_write(sd, R_08_SYNC_CNTL, work);
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}
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if (data->saa7113_r10_vrln) {
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work = saa711x_read(sd, R_10_CHROMA_CNTL_2);
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work &= ~SAA7113_R_10_VRLN_MASK;
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if (*data->saa7113_r10_vrln)
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work |= (1 << SAA7113_R_10_VRLN_OFFSET);
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saa711x_write(sd, R_10_CHROMA_CNTL_2, work);
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}
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if (data->saa7113_r10_ofts) {
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work = saa711x_read(sd, R_10_CHROMA_CNTL_2);
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work &= ~SAA7113_R_10_OFTS_MASK;
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work |= (*data->saa7113_r10_ofts << SAA7113_R_10_OFTS_OFFSET);
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saa711x_write(sd, R_10_CHROMA_CNTL_2, work);
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}
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if (data->saa7113_r12_rts0) {
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work = saa711x_read(sd, R_12_RT_SIGNAL_CNTL);
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work &= ~SAA7113_R_12_RTS0_MASK;
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work |= (*data->saa7113_r12_rts0 << SAA7113_R_12_RTS0_OFFSET);
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/* According to the datasheet,
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* SAA7113_RTS_DOT_IN should only be used on RTS1 */
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WARN_ON(*data->saa7113_r12_rts0 == SAA7113_RTS_DOT_IN);
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saa711x_write(sd, R_12_RT_SIGNAL_CNTL, work);
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}
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if (data->saa7113_r12_rts1) {
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work = saa711x_read(sd, R_12_RT_SIGNAL_CNTL);
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work &= ~SAA7113_R_12_RTS1_MASK;
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work |= (*data->saa7113_r12_rts1 << SAA7113_R_12_RTS1_OFFSET);
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saa711x_write(sd, R_12_RT_SIGNAL_CNTL, work);
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}
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if (data->saa7113_r13_adlsb) {
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work = saa711x_read(sd, R_13_RT_X_PORT_OUT_CNTL);
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work &= ~SAA7113_R_13_ADLSB_MASK;
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if (*data->saa7113_r13_adlsb)
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work |= (1 << SAA7113_R_13_ADLSB_OFFSET);
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saa711x_write(sd, R_13_RT_X_PORT_OUT_CNTL, work);
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}
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}
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/**
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* saa711x_detect_chip - Detects the saa711x (or clone) variant
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* @client: I2C client structure.
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@ -1693,6 +1792,7 @@ static int saa711x_probe(struct i2c_client *client,
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struct saa711x_state *state;
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struct v4l2_subdev *sd;
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struct v4l2_ctrl_handler *hdl;
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struct saa7115_platform_data *pdata;
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int ident;
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char name[CHIP_VER_SIZE + 1];
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@ -1756,13 +1856,19 @@ static int saa711x_probe(struct i2c_client *client,
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/* init to 60hz/48khz */
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state->crystal_freq = SAA7115_FREQ_24_576_MHZ;
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pdata = client->dev.platform_data;
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switch (state->ident) {
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case SAA7111:
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case SAA7111A:
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saa711x_writeregs(sd, saa7111_init);
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break;
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case GM7113C:
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saa711x_writeregs(sd, gm7113c_init);
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break;
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case SAA7113:
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if (pdata && pdata->saa7113_force_gm7113c_init)
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saa711x_writeregs(sd, gm7113c_init);
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else
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saa711x_writeregs(sd, saa7113_init);
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break;
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default:
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@ -1771,6 +1877,10 @@ static int saa711x_probe(struct i2c_client *client,
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}
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if (state->ident > SAA7111A && state->ident != GM7113C)
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saa711x_writeregs(sd, saa7115_init_misc);
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if (pdata)
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saa711x_write_platform_data(state, pdata);
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saa711x_set_v4lstd(sd, V4L2_STD_NTSC);
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v4l2_ctrl_handler_setup(hdl);
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@ -202,9 +202,24 @@
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#define R_FF_S_PLL_MAX_PHASE_ERR_THRESH_NUM_LINES 0xff
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/* SAA7113 bit-masks */
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#define SAA7113_R_08_HTC_OFFSET 3
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#define SAA7113_R_08_HTC_MASK (0x3 << SAA7113_R_08_HTC_OFFSET)
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#define SAA7113_R_08_FSEL 0x40
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#define SAA7113_R_08_AUFD 0x80
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#define SAA7113_R_10_VRLN_OFFSET 3
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#define SAA7113_R_10_VRLN_MASK (0x1 << SAA7113_R_10_VRLN_OFFSET)
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#define SAA7113_R_10_OFTS_OFFSET 6
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#define SAA7113_R_10_OFTS_MASK (0x3 << SAA7113_R_10_OFTS_OFFSET)
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#define SAA7113_R_12_RTS0_OFFSET 0
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#define SAA7113_R_12_RTS0_MASK (0xf << SAA7113_R_12_RTS0_OFFSET)
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#define SAA7113_R_12_RTS1_OFFSET 4
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#define SAA7113_R_12_RTS1_MASK (0xf << SAA7113_R_12_RTS1_OFFSET)
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#define SAA7113_R_13_ADLSB_OFFSET 7
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#define SAA7113_R_13_ADLSB_MASK (0x1 << SAA7113_R_13_ADLSB_OFFSET)
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#if 0
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/* Those structs will be used in the future for debug purposes */
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struct saa711x_reg_descr {
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@ -64,5 +64,69 @@
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#define SAA7115_FREQ_FL_APLL (1 << 2) /* SA 3A[3], APLL, SAA7114/5 only */
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#define SAA7115_FREQ_FL_DOUBLE_ASCLK (1 << 3) /* SA 39, LRDIV, SAA7114/5 only */
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/* ===== SAA7113 Config enums ===== */
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/* Register 0x08 "Horizontal time constant" [Bit 3..4]:
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* Should be set to "Fast Locking Mode" according to the datasheet,
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* and that is the default setting in the gm7113c_init table.
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* saa7113_init sets this value to "VTR Mode". */
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enum saa7113_r08_htc {
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SAA7113_HTC_TV_MODE = 0x00,
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SAA7113_HTC_VTR_MODE, /* Default for saa7113_init */
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SAA7113_HTC_FAST_LOCKING_MODE = 0x03 /* Default for gm7113c_init */
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};
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/* Register 0x10 "Output format selection" [Bit 6..7]:
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* Defaults to ITU_656 as specified in datasheet. */
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enum saa7113_r10_ofts {
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SAA7113_OFTS_ITU_656 = 0x0, /* Default */
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SAA7113_OFTS_VFLAG_BY_VREF,
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SAA7113_OFTS_VFLAG_BY_DATA_TYPE
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};
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/* Register 0x12 "Output control" [Bit 0..3 Or Bit 4..7]:
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* This is used to select what data is output on the RTS0 and RTS1 pins.
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* RTS1 [Bit 4..7] Defaults to DOT_IN. (This value can not be set for RTS0)
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* RTS0 [Bit 0..3] Defaults to VIPB in gm7113c_init as specified
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* in the datasheet, but is set to HREF_HS in the saa7113_init table. */
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enum saa7113_r12_rts {
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SAA7113_RTS_DOT_IN = 0, /* OBS: Only for RTS1 (Default RTS1) */
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SAA7113_RTS_VIPB, /* Default RTS0 For gm7113c_init */
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SAA7113_RTS_GPSW,
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SAA7115_RTS_HL,
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SAA7113_RTS_VL,
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SAA7113_RTS_DL,
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SAA7113_RTS_PLIN,
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SAA7113_RTS_HREF_HS, /* Default RTS0 For saa7113_init */
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SAA7113_RTS_HS,
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SAA7113_RTS_HQ,
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SAA7113_RTS_ODD,
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SAA7113_RTS_VS,
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SAA7113_RTS_V123,
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SAA7113_RTS_VGATE,
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SAA7113_RTS_VREF,
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SAA7113_RTS_FID
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};
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struct saa7115_platform_data {
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/* saa7113 only: Force the use of the gm7113c_init table,
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* instead of the old saa7113_init table. */
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bool saa7113_force_gm7113c_init;
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/* SAA7113/GM7113C Specific configurations */
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enum saa7113_r08_htc *saa7113_r08_htc; /* [R_08 - Bit 3..4] */
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bool *saa7113_r10_vrln; /* [R_10 - Bit 3]
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Disabled for gm7113c_init
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Enabled for saa7113c_init */
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enum saa7113_r10_ofts *saa7113_r10_ofts; /* [R_10 - Bit 6..7] */
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enum saa7113_r12_rts *saa7113_r12_rts0; /* [R_12 - Bit 0..3] */
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enum saa7113_r12_rts *saa7113_r12_rts1; /* [R_12 - Bit 4..7] */
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bool *saa7113_r13_adlsb; /* [R_13 - Bit 7]
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Default disabled */
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};
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#endif
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