powerpc/pseries/iommu: Allow DDW windows starting at 0x00
enable_ddw() currently returns the address of the DMA window, which is considered invalid if has the value 0x00. Also, it only considers valid an address returned from find_existing_ddw if it's not 0x00. Changing this behavior makes sense, given the users of enable_ddw() only need to know if direct mapping is possible. It can also allow a DMA window starting at 0x00 to be used. This will be helpful for using a DDW with indirect mapping, as the window address will be different than 0x00, but it will not map the whole partition. Signed-off-by: Leonardo Bras <leobras.c@gmail.com> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210817063929.38701-6-leobras.c@gmail.com
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@ -853,25 +853,26 @@ static void remove_ddw(struct device_node *np, bool remove_prop)
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np, ret);
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}
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static u64 find_existing_ddw(struct device_node *pdn, int *window_shift)
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static bool find_existing_ddw(struct device_node *pdn, u64 *dma_addr, int *window_shift)
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{
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struct direct_window *window;
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const struct dynamic_dma_window_prop *direct64;
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u64 dma_addr = 0;
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bool found = false;
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spin_lock(&direct_window_list_lock);
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/* check if we already created a window and dupe that config if so */
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list_for_each_entry(window, &direct_window_list, list) {
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if (window->device == pdn) {
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direct64 = window->prop;
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dma_addr = be64_to_cpu(direct64->dma_base);
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*dma_addr = be64_to_cpu(direct64->dma_base);
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*window_shift = be32_to_cpu(direct64->window_shift);
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found = true;
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break;
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}
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}
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spin_unlock(&direct_window_list_lock);
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return dma_addr;
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return found;
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}
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static struct direct_window *ddw_list_new_entry(struct device_node *pdn,
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@ -1161,20 +1162,20 @@ static int iommu_get_page_shift(u32 query_page_size)
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* pdn: the parent pe node with the ibm,dma_window property
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* Future: also check if we can remap the base window for our base page size
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*
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* returns the dma offset for use by the direct mapped DMA code.
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* returns true if can map all pages (direct mapping), false otherwise..
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*/
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static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
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static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn)
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{
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int len = 0, ret;
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int max_ram_len = order_base_2(ddw_memory_hotplug_max());
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struct ddw_query_response query;
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struct ddw_create_response create;
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int page_shift;
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u64 dma_addr;
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struct device_node *dn;
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u32 ddw_avail[DDW_APPLICABLE_SIZE];
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struct direct_window *window;
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struct property *win64;
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bool ddw_enabled = false;
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struct dynamic_dma_window_prop *ddwprop;
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struct failed_ddw_pdn *fpdn;
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bool default_win_removed = false;
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@ -1186,9 +1187,10 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
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mutex_lock(&direct_window_init_mutex);
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dma_addr = find_existing_ddw(pdn, &len);
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if (dma_addr != 0)
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if (find_existing_ddw(pdn, &dev->dev.archdata.dma_offset, &len)) {
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ddw_enabled = true;
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goto out_unlock;
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}
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/*
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* If we already went through this for a previous function of
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@ -1342,7 +1344,8 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
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list_add(&window->list, &direct_window_list);
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spin_unlock(&direct_window_list_lock);
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dma_addr = be64_to_cpu(ddwprop->dma_base);
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dev->dev.archdata.dma_offset = be64_to_cpu(ddwprop->dma_base);
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ddw_enabled = true;
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goto out_unlock;
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out_free_window:
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@ -1374,10 +1377,10 @@ out_unlock:
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* as RAM, then we failed to create a window to cover persistent
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* memory and need to set the DMA limit.
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*/
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if (pmem_present && dma_addr && (len == max_ram_len))
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dev->dev.bus_dma_limit = dma_addr + (1ULL << len);
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if (pmem_present && ddw_enabled && (len == max_ram_len))
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dev->dev.bus_dma_limit = dev->dev.archdata.dma_offset + (1ULL << len);
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return dma_addr;
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return ddw_enabled;
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}
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static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
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@ -1456,11 +1459,8 @@ static bool iommu_bypass_supported_pSeriesLP(struct pci_dev *pdev, u64 dma_mask)
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break;
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}
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if (pdn && PCI_DN(pdn)) {
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pdev->dev.archdata.dma_offset = enable_ddw(pdev, pdn);
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if (pdev->dev.archdata.dma_offset)
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return true;
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}
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if (pdn && PCI_DN(pdn))
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return enable_ddw(pdev, pdn);
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return false;
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}
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