sfc: Add definitions for new stats counters and capability flag
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
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@ -2574,8 +2574,58 @@
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#define MC_CMD_MAC_RX_LANES01_DISP_ERR 0x39 /* enum */
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#define MC_CMD_MAC_RX_LANES23_DISP_ERR 0x3a /* enum */
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#define MC_CMD_MAC_RX_MATCH_FAULT 0x3b /* enum */
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#define MC_CMD_GMAC_DMABUF_START 0x40 /* enum */
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#define MC_CMD_GMAC_DMABUF_END 0x5f /* enum */
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/* enum: PM trunc_bb_overflow counter. Valid for EF10 with PM_AND_RXDP_COUNTERS
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* capability only.
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*/
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#define MC_CMD_MAC_PM_TRUNC_BB_OVERFLOW 0x3c
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/* enum: PM discard_bb_overflow counter. Valid for EF10 with
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* PM_AND_RXDP_COUNTERS capability only.
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*/
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#define MC_CMD_MAC_PM_DISCARD_BB_OVERFLOW 0x3d
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/* enum: PM trunc_vfifo_full counter. Valid for EF10 with PM_AND_RXDP_COUNTERS
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* capability only.
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*/
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#define MC_CMD_MAC_PM_TRUNC_VFIFO_FULL 0x3e
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/* enum: PM discard_vfifo_full counter. Valid for EF10 with
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* PM_AND_RXDP_COUNTERS capability only.
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*/
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#define MC_CMD_MAC_PM_DISCARD_VFIFO_FULL 0x3f
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/* enum: PM trunc_qbb counter. Valid for EF10 with PM_AND_RXDP_COUNTERS
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* capability only.
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*/
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#define MC_CMD_MAC_PM_TRUNC_QBB 0x40
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/* enum: PM discard_qbb counter. Valid for EF10 with PM_AND_RXDP_COUNTERS
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* capability only.
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*/
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#define MC_CMD_MAC_PM_DISCARD_QBB 0x41
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/* enum: PM discard_mapping counter. Valid for EF10 with PM_AND_RXDP_COUNTERS
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* capability only.
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*/
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#define MC_CMD_MAC_PM_DISCARD_MAPPING 0x42
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/* enum: RXDP counter: Number of packets dropped due to the queue being
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* disabled. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only.
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*/
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#define MC_CMD_MAC_RXDP_Q_DISABLED_PKTS 0x43
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/* enum: RXDP counter: Number of packets dropped by the DICPU. Valid for EF10
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* with PM_AND_RXDP_COUNTERS capability only.
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*/
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#define MC_CMD_MAC_RXDP_DI_DROPPED_PKTS 0x45
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/* enum: RXDP counter: Number of non-host packets. Valid for EF10 with
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* PM_AND_RXDP_COUNTERS capability only.
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*/
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#define MC_CMD_MAC_RXDP_STREAMING_PKTS 0x46
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/* enum: RXDP counter: Number of times an emergency descriptor fetch was
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* performed. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only.
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*/
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#define MC_CMD_MAC_RXDP_EMERGENCY_FETCH_CONDITIONS 0x47
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/* enum: RXDP counter: Number of times the DPCPU waited for an existing
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* descriptor fetch. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only.
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*/
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#define MC_CMD_MAC_RXDP_EMERGENCY_WAIT_CONDITIONS 0x48
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/* enum: Start of GMAC stats buffer space, for Siena only. */
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#define MC_CMD_GMAC_DMABUF_START 0x40
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/* enum: End of GMAC stats buffer space, for Siena only. */
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#define MC_CMD_GMAC_DMABUF_END 0x5f
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#define MC_CMD_MAC_GENERATION_END 0x60 /* enum */
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#define MC_CMD_MAC_NSTATS 0x61 /* enum */
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@ -5065,6 +5115,8 @@
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#define MC_CMD_GET_CAPABILITIES_OUT_RX_BATCHING_WIDTH 1
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#define MC_CMD_GET_CAPABILITIES_OUT_MCAST_FILTER_CHAINING_LBN 26
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#define MC_CMD_GET_CAPABILITIES_OUT_MCAST_FILTER_CHAINING_WIDTH 1
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#define MC_CMD_GET_CAPABILITIES_OUT_PM_AND_RXDP_COUNTERS_LBN 27
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#define MC_CMD_GET_CAPABILITIES_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1
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/* RxDPCPU firmware id. */
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#define MC_CMD_GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID_OFST 4
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#define MC_CMD_GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID_LEN 2
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