powerpc/vdso32: Don't read cache line size from the datapage on PPC32.
On PPC32, the cache lines have a fixed size known at build time. Don't read it from the datapage. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/dfa7b35e27e01964fcda84bf1ed8b2b31cf93826.1575273217.git.christophe.leroy@c-s.fr
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@ -108,10 +108,6 @@ struct vdso_data {
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__u32 stamp_sec_fraction; /* fractional seconds of stamp_xtime */
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__u32 hrtimer_res; /* hrtimer resolution */
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__u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */
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__u32 dcache_block_size; /* L1 d-cache block size */
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__u32 icache_block_size; /* L1 i-cache block size */
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__u32 dcache_log_block_size; /* L1 d-cache log block size */
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__u32 icache_log_block_size; /* L1 i-cache log block size */
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};
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#endif /* CONFIG_PPC64 */
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@ -389,11 +389,11 @@ int main(void)
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OFFSET(STAMP_XTIME_NSEC, vdso_data, stamp_xtime_nsec);
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OFFSET(STAMP_SEC_FRAC, vdso_data, stamp_sec_fraction);
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OFFSET(CLOCK_HRTIMER_RES, vdso_data, hrtimer_res);
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#ifdef CONFIG_PPC64
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OFFSET(CFG_ICACHE_BLOCKSZ, vdso_data, icache_block_size);
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OFFSET(CFG_DCACHE_BLOCKSZ, vdso_data, dcache_block_size);
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OFFSET(CFG_ICACHE_LOGBLOCKSZ, vdso_data, icache_log_block_size);
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OFFSET(CFG_DCACHE_LOGBLOCKSZ, vdso_data, dcache_log_block_size);
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#ifdef CONFIG_PPC64
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OFFSET(CFG_SYSCALL_MAP64, vdso_data, syscall_map_64);
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OFFSET(TVAL64_TV_SEC, __kernel_old_timeval, tv_sec);
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OFFSET(TVAL64_TV_USEC, __kernel_old_timeval, tv_usec);
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@ -728,11 +728,6 @@ static int __init vdso_init(void)
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*/
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vdso64_pages = (&vdso64_end - &vdso64_start) >> PAGE_SHIFT;
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DBG("vdso64_kbase: %p, 0x%x pages\n", vdso64_kbase, vdso64_pages);
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#else
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vdso_data->dcache_block_size = L1_CACHE_BYTES;
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vdso_data->dcache_log_block_size = L1_CACHE_SHIFT;
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vdso_data->icache_block_size = L1_CACHE_BYTES;
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vdso_data->icache_log_block_size = L1_CACHE_SHIFT;
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#endif /* CONFIG_PPC64 */
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@ -10,6 +10,7 @@
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#include <asm/vdso.h>
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#include <asm/vdso_datapage.h>
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#include <asm/asm-offsets.h>
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#include <asm/cache.h>
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.text
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@ -23,28 +24,44 @@
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*/
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V_FUNCTION_BEGIN(__kernel_sync_dicache)
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.cfi_startproc
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#ifdef CONFIG_PPC64
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mflr r12
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.cfi_register lr,r12
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get_datapage r10, r0
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mtlr r12
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#endif
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#ifdef CONFIG_PPC64
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lwz r7,CFG_DCACHE_BLOCKSZ(r10)
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addi r5,r7,-1
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#else
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li r5, L1_CACHE_BYTES - 1
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#endif
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andc r6,r3,r5 /* round low to line bdy */
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subf r8,r6,r4 /* compute length */
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add r8,r8,r5 /* ensure we get enough */
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#ifdef CONFIG_PPC64
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lwz r9,CFG_DCACHE_LOGBLOCKSZ(r10)
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srw. r8,r8,r9 /* compute line count */
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#else
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srwi. r8, r8, L1_CACHE_SHIFT
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mr r7, r6
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#endif
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crclr cr0*4+so
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beqlr /* nothing to do? */
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mtctr r8
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1: dcbst 0,r6
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#ifdef CONFIG_PPC64
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add r6,r6,r7
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#else
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addi r6, r6, L1_CACHE_BYTES
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#endif
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bdnz 1b
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sync
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/* Now invalidate the instruction cache */
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#ifdef CONFIG_PPC64
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lwz r7,CFG_ICACHE_BLOCKSZ(r10)
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addi r5,r7,-1
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andc r6,r3,r5 /* round low to line bdy */
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@ -54,9 +71,15 @@ V_FUNCTION_BEGIN(__kernel_sync_dicache)
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srw. r8,r8,r9 /* compute line count */
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crclr cr0*4+so
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beqlr /* nothing to do? */
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#endif
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mtctr r8
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#ifdef CONFIG_PPC64
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2: icbi 0,r6
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add r6,r6,r7
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#else
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2: icbi 0, r7
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addi r7, r7, L1_CACHE_BYTES
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#endif
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bdnz 2b
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isync
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li r3,0
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