iio: adc: meson: move meson_sar_adc_set_chan7_mux routine upper
meson_sar_adc_set_chan7_mux is a basic func() for writing single register, defined as static. Moved it up so it could be used in more places. Signed-off-by: George Stark <GNStark@sberdevices.ru> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230714114010.293440-4-gnstark@sberdevices.ru Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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@ -336,6 +336,19 @@ static int meson_sar_adc_wait_busy_clear(struct iio_dev *indio_dev)
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1, 10000);
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}
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static void meson_sar_adc_set_chan7_mux(struct iio_dev *indio_dev,
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enum meson_sar_adc_chan7_mux_sel sel)
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{
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struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
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u32 regval;
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regval = FIELD_PREP(MESON_SAR_ADC_REG3_CTRL_CHAN7_MUX_SEL_MASK, sel);
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3,
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MESON_SAR_ADC_REG3_CTRL_CHAN7_MUX_SEL_MASK, regval);
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usleep_range(10, 20);
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}
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static int meson_sar_adc_read_raw_sample(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan,
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int *val)
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@ -432,19 +445,6 @@ static void meson_sar_adc_enable_channel(struct iio_dev *indio_dev,
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}
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}
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static void meson_sar_adc_set_chan7_mux(struct iio_dev *indio_dev,
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enum meson_sar_adc_chan7_mux_sel sel)
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{
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struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
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u32 regval;
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regval = FIELD_PREP(MESON_SAR_ADC_REG3_CTRL_CHAN7_MUX_SEL_MASK, sel);
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3,
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MESON_SAR_ADC_REG3_CTRL_CHAN7_MUX_SEL_MASK, regval);
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usleep_range(10, 20);
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}
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static void meson_sar_adc_start_sample_engine(struct iio_dev *indio_dev)
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{
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struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
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