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clk: sunxi-ng: sun8i-de2: Split out H5 definitions 

H5 has less clocks and resets than A64. Currently that's not obvious
because A64 is missing rotation core related clocks and reset.

Split out H5 definition. A64 structures will be fixed in subsequent
commit.

Note that this patch depends on commit 19368d9974 ("clk: sunxi-ng:
add support for Allwinner H3 DE2 CCU") for the H3 clock list.

Fixes: 763c5bd045 ("clk: sunxi-ng: add support for DE2 CCU")
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
This commit is contained in:
Jernej Skrabec 2020-02-11 19:59:30 +01:00 committed by Maxime Ripard
parent 1de8493069
commit 2b48dcb7a8
No known key found for this signature in database
GPG Key ID: E3EF0D6F671851C5
1 changed files with 17 additions and 1 deletions
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18
drivers/clk/sunxi-ng/ccu-sun8i-de2.c
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@ -192,6 +192,12 @@ static struct ccu_reset_map sun50i_a64_de2_resets[] = {
[RST_WB] = { 0x08, BIT(2) }, [RST_WB] = { 0x08, BIT(2) },
}; };
static struct ccu_reset_map sun50i_h5_de2_resets[] = {
[RST_MIXER0] = { 0x08, BIT(0) },
[RST_MIXER1] = { 0x08, BIT(1) },
[RST_WB] = { 0x08, BIT(2) },
};
static struct ccu_reset_map sun50i_h6_de3_resets[] = { static struct ccu_reset_map sun50i_h6_de3_resets[] = {
[RST_MIXER0] = { 0x08, BIT(0) }, [RST_MIXER0] = { 0x08, BIT(0) },
[RST_MIXER1] = { 0x08, BIT(1) }, [RST_MIXER1] = { 0x08, BIT(1) },
@ -229,6 +235,16 @@ static const struct sunxi_ccu_desc sun50i_a64_de2_clk_desc = {
.num_resets = ARRAY_SIZE(sun50i_a64_de2_resets), .num_resets = ARRAY_SIZE(sun50i_a64_de2_resets),
}; };
static const struct sunxi_ccu_desc sun50i_h5_de2_clk_desc = {
.ccu_clks = sun8i_h3_de2_clks,
.num_ccu_clks = ARRAY_SIZE(sun8i_h3_de2_clks),
.hw_clks = &sun8i_h3_de2_hw_clks,
.resets = sun50i_h5_de2_resets,
.num_resets = ARRAY_SIZE(sun50i_h5_de2_resets),
};
static const struct sunxi_ccu_desc sun50i_h6_de3_clk_desc = { static const struct sunxi_ccu_desc sun50i_h6_de3_clk_desc = {
.ccu_clks = sun50i_h6_de3_clks, .ccu_clks = sun50i_h6_de3_clks,
.num_ccu_clks = ARRAY_SIZE(sun50i_h6_de3_clks), .num_ccu_clks = ARRAY_SIZE(sun50i_h6_de3_clks),
@ -347,7 +363,7 @@ static const struct of_device_id sunxi_de2_clk_ids[] = {
}, },
{ {
.compatible = "allwinner,sun50i-h5-de2-clk", .compatible = "allwinner,sun50i-h5-de2-clk",
.data = &sun50i_a64_de2_clk_desc, .data = &sun50i_h5_de2_clk_desc,
}, },
{ {
.compatible = "allwinner,sun50i-h6-de3-clk", .compatible = "allwinner,sun50i-h6-de3-clk",