iommu/amd: Add routines to manage irq remapping tables
Add routines to: * Alloc remapping tables and single entries from these tables * Change entries in the tables * Free entries in the table Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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2b32450634
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@ -31,6 +31,12 @@
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#include <linux/amd-iommu.h>
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#include <linux/notifier.h>
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#include <linux/export.h>
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#include <linux/irq.h>
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#include <linux/msi.h>
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#include <asm/irq_remapping.h>
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#include <asm/io_apic.h>
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#include <asm/apic.h>
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#include <asm/hw_irq.h>
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#include <asm/msidef.h>
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#include <asm/proto.h>
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#include <asm/iommu.h>
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@ -3773,3 +3779,225 @@ int amd_iommu_device_info(struct pci_dev *pdev,
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return 0;
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}
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EXPORT_SYMBOL(amd_iommu_device_info);
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#ifdef CONFIG_IRQ_REMAP
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/*****************************************************************************
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*
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* Interrupt Remapping Implementation
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*
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*****************************************************************************/
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union irte {
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u32 val;
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struct {
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u32 valid : 1,
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no_fault : 1,
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int_type : 3,
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rq_eoi : 1,
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dm : 1,
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rsvd_1 : 1,
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destination : 8,
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vector : 8,
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rsvd_2 : 8;
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} fields;
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};
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#define DTE_IRQ_PHYS_ADDR_MASK (((1ULL << 45)-1) << 6)
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#define DTE_IRQ_REMAP_INTCTL (2ULL << 60)
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#define DTE_IRQ_TABLE_LEN (8ULL << 1)
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#define DTE_IRQ_REMAP_ENABLE 1ULL
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static void set_dte_irq_entry(u16 devid, struct irq_remap_table *table)
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{
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u64 dte;
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dte = amd_iommu_dev_table[devid].data[2];
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dte &= ~DTE_IRQ_PHYS_ADDR_MASK;
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dte |= virt_to_phys(table->table);
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dte |= DTE_IRQ_REMAP_INTCTL;
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dte |= DTE_IRQ_TABLE_LEN;
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dte |= DTE_IRQ_REMAP_ENABLE;
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amd_iommu_dev_table[devid].data[2] = dte;
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}
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#define IRTE_ALLOCATED (~1U)
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static struct irq_remap_table *get_irq_table(u16 devid, bool ioapic)
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{
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struct irq_remap_table *table = NULL;
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struct amd_iommu *iommu;
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unsigned long flags;
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u16 alias;
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write_lock_irqsave(&amd_iommu_devtable_lock, flags);
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iommu = amd_iommu_rlookup_table[devid];
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if (!iommu)
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goto out_unlock;
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table = irq_lookup_table[devid];
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if (table)
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goto out;
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alias = amd_iommu_alias_table[devid];
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table = irq_lookup_table[alias];
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if (table) {
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irq_lookup_table[devid] = table;
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set_dte_irq_entry(devid, table);
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iommu_flush_dte(iommu, devid);
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goto out;
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}
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/* Nothing there yet, allocate new irq remapping table */
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table = kzalloc(sizeof(*table), GFP_ATOMIC);
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if (!table)
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goto out;
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if (ioapic)
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/* Keep the first 32 indexes free for IOAPIC interrupts */
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table->min_index = 32;
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table->table = kmem_cache_alloc(amd_iommu_irq_cache, GFP_ATOMIC);
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if (!table->table) {
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kfree(table);
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goto out;
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}
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memset(table->table, 0, MAX_IRQS_PER_TABLE * sizeof(u32));
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if (ioapic) {
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int i;
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for (i = 0; i < 32; ++i)
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table->table[i] = IRTE_ALLOCATED;
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}
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irq_lookup_table[devid] = table;
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set_dte_irq_entry(devid, table);
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iommu_flush_dte(iommu, devid);
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if (devid != alias) {
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irq_lookup_table[alias] = table;
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set_dte_irq_entry(devid, table);
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iommu_flush_dte(iommu, alias);
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}
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out:
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iommu_completion_wait(iommu);
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out_unlock:
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write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
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return table;
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}
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static int alloc_irq_index(struct irq_cfg *cfg, u16 devid, int count)
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{
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struct irq_remap_table *table;
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unsigned long flags;
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int index, c;
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table = get_irq_table(devid, false);
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if (!table)
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return -ENODEV;
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spin_lock_irqsave(&table->lock, flags);
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/* Scan table for free entries */
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for (c = 0, index = table->min_index;
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index < MAX_IRQS_PER_TABLE;
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++index) {
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if (table->table[index] == 0)
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c += 1;
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else
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c = 0;
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if (c == count) {
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struct irq_2_iommu *irte_info;
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for (; c != 0; --c)
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table->table[index - c + 1] = IRTE_ALLOCATED;
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index -= count - 1;
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irte_info = &cfg->irq_2_iommu;
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irte_info->sub_handle = devid;
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irte_info->irte_index = index;
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irte_info->iommu = (void *)cfg;
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goto out;
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}
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}
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index = -ENOSPC;
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out:
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spin_unlock_irqrestore(&table->lock, flags);
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return index;
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}
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static int get_irte(u16 devid, int index, union irte *irte)
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{
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struct irq_remap_table *table;
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unsigned long flags;
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table = get_irq_table(devid, false);
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if (!table)
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return -ENOMEM;
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spin_lock_irqsave(&table->lock, flags);
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irte->val = table->table[index];
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spin_unlock_irqrestore(&table->lock, flags);
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return 0;
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}
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static int modify_irte(u16 devid, int index, union irte irte)
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{
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struct irq_remap_table *table;
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struct amd_iommu *iommu;
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unsigned long flags;
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iommu = amd_iommu_rlookup_table[devid];
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if (iommu == NULL)
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return -EINVAL;
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table = get_irq_table(devid, false);
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if (!table)
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return -ENOMEM;
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spin_lock_irqsave(&table->lock, flags);
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table->table[index] = irte.val;
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spin_unlock_irqrestore(&table->lock, flags);
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iommu_flush_irt(iommu, devid);
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iommu_completion_wait(iommu);
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return 0;
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}
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static void free_irte(u16 devid, int index)
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{
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struct irq_remap_table *table;
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struct amd_iommu *iommu;
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unsigned long flags;
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iommu = amd_iommu_rlookup_table[devid];
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if (iommu == NULL)
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return;
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table = get_irq_table(devid, false);
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if (!table)
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return;
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spin_lock_irqsave(&table->lock, flags);
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table->table[index] = 0;
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spin_unlock_irqrestore(&table->lock, flags);
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iommu_flush_irt(iommu, devid);
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iommu_completion_wait(iommu);
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}
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#endif
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