iwlwifi: pcie: add jacket bit to device configuration parsing
Some devices have same HW ID's and the only way to differentiate them is by checking the jacket bit. Signed-off-by: Mike Golant <michael.golant@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20211210090244.cffa843734d3.I01963e494c459efde5d909c1085cd561e0df9df9@changeid Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
This commit is contained in:
parent
15664c1cbc
commit
2b0ceda953
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@ -448,6 +448,9 @@ struct iwl_cfg {
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#define IWL_CFG_NO_CDB 0x0
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#define IWL_CFG_CDB 0x1
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#define IWL_CFG_NO_JACKET 0x0
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#define IWL_CFG_IS_JACKET 0x1
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#define IWL_SUBDEVICE_RF_ID(subdevice) ((u16)((subdevice) & 0x00F0) >> 4)
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#define IWL_SUBDEVICE_NO_160(subdevice) ((u16)((subdevice) & 0x0200) >> 9)
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#define IWL_SUBDEVICE_CORES(subdevice) ((u16)((subdevice) & 0x1C00) >> 10)
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@ -462,6 +465,7 @@ struct iwl_dev_info {
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u8 no_160;
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u8 cores;
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u8 cdb;
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u8 jacket;
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const struct iwl_cfg *cfg;
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const char *name;
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};
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@ -510,16 +510,16 @@ static const struct pci_device_id iwl_hw_card_ids[] = {
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MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
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#define _IWL_DEV_INFO(_device, _subdevice, _mac_type, _mac_step, _rf_type, \
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_rf_id, _no_160, _cores, _cdb, _cfg, _name) \
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_rf_id, _no_160, _cores, _cdb, _jacket, _cfg, _name) \
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{ .device = (_device), .subdevice = (_subdevice), .cfg = &(_cfg), \
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.name = _name, .mac_type = _mac_type, .rf_type = _rf_type, \
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.no_160 = _no_160, .cores = _cores, .rf_id = _rf_id, \
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.mac_step = _mac_step, .cdb = _cdb }
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.mac_step = _mac_step, .cdb = _cdb, .jacket = _jacket }
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#define IWL_DEV_INFO(_device, _subdevice, _cfg, _name) \
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_IWL_DEV_INFO(_device, _subdevice, IWL_CFG_ANY, IWL_CFG_ANY, \
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IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY, \
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IWL_CFG_ANY, _cfg, _name)
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IWL_CFG_ANY, IWL_CFG_ANY, _cfg, _name)
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static const struct iwl_dev_info iwl_dev_info_table[] = {
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#if IS_ENABLED(CONFIG_IWLMVM)
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@ -676,87 +676,87 @@ static const struct iwl_dev_info iwl_dev_info_table[] = {
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_2ac_cfg_soc, iwl9461_160_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_2ac_cfg_soc, iwl9461_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_2ac_cfg_soc, iwl9462_160_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_2ac_cfg_soc, iwl9462_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_2ac_cfg_soc, iwl9560_160_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_2ac_cfg_soc, iwl9560_name),
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_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9260_2ac_cfg, iwl9461_160_name),
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_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9260_2ac_cfg, iwl9461_name),
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_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9260_2ac_cfg, iwl9462_160_name),
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_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9260_2ac_cfg, iwl9462_name),
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_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY,
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IWL_CFG_160, IWL_CFG_CORES_BT_GNSS, IWL_CFG_NO_CDB,
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IWL_CFG_160, IWL_CFG_CORES_BT_GNSS, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9260_2ac_cfg, iwl9270_160_name),
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_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT_GNSS, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT_GNSS, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9260_2ac_cfg, iwl9270_name),
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_IWL_DEV_INFO(0x271B, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_TH1, IWL_CFG_ANY,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9260_2ac_cfg, iwl9162_160_name),
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_IWL_DEV_INFO(0x271B, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_TH1, IWL_CFG_ANY,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9260_2ac_cfg, iwl9162_name),
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_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9260_2ac_cfg, iwl9260_160_name),
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_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9260_2ac_cfg, iwl9260_name),
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/* Qu with Jf */
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@ -764,176 +764,176 @@ static const struct iwl_dev_info iwl_dev_info_table[] = {
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_qu_b0_jf_b0_cfg, iwl9461_160_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_qu_b0_jf_b0_cfg, iwl9461_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_qu_b0_jf_b0_cfg, iwl9462_160_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_qu_b0_jf_b0_cfg, iwl9462_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
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IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_qu_b0_jf_b0_cfg, iwl9560_160_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
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IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_qu_b0_jf_b0_cfg, iwl9560_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, 0x1551,
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IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
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IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_qu_b0_jf_b0_cfg, iwl9560_killer_1550s_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, 0x1552,
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IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
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IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_qu_b0_jf_b0_cfg, iwl9560_killer_1550i_name),
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/* Qu C step */
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_qu_c0_jf_b0_cfg, iwl9461_160_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_qu_c0_jf_b0_cfg, iwl9461_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_qu_c0_jf_b0_cfg, iwl9462_160_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_qu_c0_jf_b0_cfg, iwl9462_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
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IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_qu_c0_jf_b0_cfg, iwl9560_160_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
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IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_qu_c0_jf_b0_cfg, iwl9560_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, 0x1551,
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IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
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IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_qu_c0_jf_b0_cfg, iwl9560_killer_1550s_name),
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_IWL_DEV_INFO(IWL_CFG_ANY, 0x1552,
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IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
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IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_qu_c0_jf_b0_cfg, iwl9560_killer_1550i_name),
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/* QuZ */
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_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
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IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
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IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
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IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
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iwl9560_quz_a0_jf_b0_cfg, iwl9461_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl9560_quz_a0_jf_b0_cfg, iwl9461_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl9560_quz_a0_jf_b0_cfg, iwl9462_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl9560_quz_a0_jf_b0_cfg, iwl9462_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl9560_quz_a0_jf_b0_cfg, iwl9560_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl9560_quz_a0_jf_b0_cfg, iwl9560_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, 0x1551,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl9560_quz_a0_jf_b0_cfg, iwl9560_killer_1550s_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, 0x1552,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl9560_quz_a0_jf_b0_cfg, iwl9560_killer_1550i_name),
|
||||
|
||||
/* QnJ */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl9560_qnj_b0_jf_b0_cfg, iwl9461_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl9560_qnj_b0_jf_b0_cfg, iwl9461_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl9560_qnj_b0_jf_b0_cfg, iwl9462_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl9560_qnj_b0_jf_b0_cfg, iwl9462_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl9560_qnj_b0_jf_b0_cfg, iwl9560_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl9560_qnj_b0_jf_b0_cfg, iwl9560_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, 0x1551,
|
||||
IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl9560_qnj_b0_jf_b0_cfg, iwl9560_killer_1550s_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, 0x1552,
|
||||
IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl9560_qnj_b0_jf_b0_cfg, iwl9560_killer_1550i_name),
|
||||
|
||||
/* Qu with Hr */
|
||||
|
@ -941,325 +941,325 @@ static const struct iwl_dev_info iwl_dev_info_table[] = {
|
|||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
|
||||
IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_qu_b0_hr1_b0, iwl_ax101_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_qu_b0_hr_b0, iwl_ax203_name),
|
||||
|
||||
/* Qu C step */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
|
||||
IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_qu_c0_hr1_b0, iwl_ax101_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_qu_c0_hr_b0, iwl_ax203_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_qu_c0_hr_b0, iwl_ax201_name),
|
||||
|
||||
/* QuZ */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_quz_a0_hr1_b0, iwl_ax101_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QUZ, SILICON_B_STEP,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_quz_a0_hr_b0, iwl_ax203_name),
|
||||
|
||||
/* QnJ with Hr */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_qnj_b0_hr_b0_cfg, iwl_ax201_name),
|
||||
|
||||
/* SnJ with Jf */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_snj_a0_jf_b0, iwl9461_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_snj_a0_jf_b0, iwl9461_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_snj_a0_jf_b0, iwl9462_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_snj_a0_jf_b0, iwl9462_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_snj_a0_jf_b0, iwl9560_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_snj_a0_jf_b0, iwl9560_name),
|
||||
|
||||
/* SnJ with Hr */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_snj_hr_b0, iwl_ax101_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_snj_hr_b0, iwl_ax201_name),
|
||||
|
||||
/* Ma */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_ma_a0_hr_b0, iwl_ax201_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_ma_a0_gf_a0, iwl_ax211_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_ma_a0_gf4_a0, iwl_ax211_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_MR, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_ma_a0_mr_a0, iwl_ax221_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_ma_a0_fm_a0, iwl_ax231_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SNJ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_MR, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_snj_a0_mr_a0, iwl_ax221_name),
|
||||
|
||||
/* So with Hr */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_so_a0_hr_a0, iwl_ax203_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_so_a0_hr_a0, iwl_ax101_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_so_a0_hr_a0, iwl_ax201_name),
|
||||
|
||||
/* So-F with Hr */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_so_a0_hr_a0, iwl_ax203_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_so_a0_hr_a0, iwl_ax101_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_so_a0_hr_a0, iwl_ax201_name),
|
||||
|
||||
/* So-F with Gf */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_CDB, IWL_CFG_ANY,
|
||||
iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_name),
|
||||
|
||||
/* Bz */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_BZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_bz_a0_hr_b0, iwl_bz_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_BZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_bz_a0_gf_a0, iwl_bz_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_BZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_bz_a0_gf4_a0, iwl_bz_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_BZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_MR, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_bz_a0_mr_a0, iwl_bz_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_BZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_bz_a0_fm_a0, iwl_bz_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_GL, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_gl_a0_fm_a0, iwl_bz_name),
|
||||
|
||||
/* BZ Z step */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_BZ, SILICON_Z_STEP,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwl_cfg_bz_z0_gf_a0, iwl_bz_name),
|
||||
|
||||
/* SoF with JF2 */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9560_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9560_name),
|
||||
|
||||
/* SoF with JF */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9461_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9462_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9461_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9462_name),
|
||||
|
||||
/* SoF with JF2 */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9560_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9560_name),
|
||||
|
||||
/* SoF with JF */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9461_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9462_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9461_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9462_name),
|
||||
|
||||
/* So with GF */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_CDB, IWL_CFG_ANY,
|
||||
iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_name),
|
||||
|
||||
/* So with JF2 */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9560_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9560_name),
|
||||
|
||||
/* So with JF */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9461_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9462_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9461_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9462_name)
|
||||
|
||||
#endif /* CONFIG_IWLMVM */
|
||||
|
@ -1360,7 +1360,7 @@ out:
|
|||
static const struct iwl_dev_info *
|
||||
iwl_pci_find_dev_info(u16 device, u16 subsystem_device,
|
||||
u16 mac_type, u8 mac_step,
|
||||
u16 rf_type, u8 cdb, u8 rf_id, u8 no_160, u8 cores)
|
||||
u16 rf_type, u8 cdb, u8 jacket, u8 rf_id, u8 no_160, u8 cores)
|
||||
{
|
||||
int num_devices = ARRAY_SIZE(iwl_dev_info_table);
|
||||
int i;
|
||||
|
@ -1395,6 +1395,10 @@ iwl_pci_find_dev_info(u16 device, u16 subsystem_device,
|
|||
dev_info->cdb != cdb)
|
||||
continue;
|
||||
|
||||
if (dev_info->jacket != (u8)IWL_CFG_ANY &&
|
||||
dev_info->jacket != jacket)
|
||||
continue;
|
||||
|
||||
if (dev_info->rf_id != (u8)IWL_CFG_ANY &&
|
||||
dev_info->rf_id != rf_id)
|
||||
continue;
|
||||
|
@ -1482,6 +1486,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
iwl_trans->hw_rev_step,
|
||||
CSR_HW_RFID_TYPE(iwl_trans->hw_rf_id),
|
||||
CSR_HW_RFID_IS_CDB(iwl_trans->hw_rf_id),
|
||||
CSR_HW_RFID_IS_JACKET(iwl_trans->hw_rf_id),
|
||||
IWL_SUBDEVICE_RF_ID(pdev->subsystem_device),
|
||||
IWL_SUBDEVICE_NO_160(pdev->subsystem_device),
|
||||
IWL_SUBDEVICE_CORES(pdev->subsystem_device));
|
||||
|
|
Loading…
Reference in New Issue