Revert "drm/amd/display: enable S/G for RAVEN chip"
This reverts commit 1c42591591
.
S/G display is not stable with the IOMMU enabled on some
platforms.
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205523
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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parent
3f2a06ac81
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@ -514,7 +514,7 @@ uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
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* Also, don't allow GTT domain if the BO doens't have USWC falg set.
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*/
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if (adev->asic_type >= CHIP_CARRIZO &&
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adev->asic_type <= CHIP_RAVEN &&
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adev->asic_type < CHIP_RAVEN &&
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(adev->flags & AMD_IS_APU) &&
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(bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) &&
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amdgpu_bo_support_uswc(bo_flags) &&
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@ -930,7 +930,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
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*/
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if (adev->flags & AMD_IS_APU &&
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adev->asic_type >= CHIP_CARRIZO &&
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adev->asic_type <= CHIP_RAVEN)
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adev->asic_type < CHIP_RAVEN)
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init_data.flags.gpu_vm_support = true;
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if (amdgpu_dc_feature_mask & DC_FBC_MASK)
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