drm/nouveau/disp/dp: gm1xx appears to have same dp lane ordering as gm2xx
Fixes 2-lane DP on Quadro K620. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -214,6 +214,7 @@ extern struct nvkm_output_dp_impl nv50_pior_dp_impl;
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extern struct nvkm_oclass *nv50_disp_outp_sclass[];
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extern struct nvkm_output_dp_impl g94_sor_dp_impl;
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u32 g94_sor_dp_lane_map(struct nv50_disp_priv *, u8 lane);
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int g94_sor_dp_lnk_pwr(struct nvkm_output_dp *, int);
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extern struct nvkm_oclass *g94_disp_outp_sclass[];
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@ -39,11 +39,14 @@ g94_sor_loff(struct nvkm_output_dp *outp)
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return g94_sor_soff(outp) + !(outp->base.info.sorconf.link & 1) * 0x80;
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}
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static inline u32
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u32
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g94_sor_dp_lane_map(struct nv50_disp_priv *priv, u8 lane)
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{
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static const u8 gm100[] = { 0, 8, 16, 24 };
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static const u8 mcp89[] = { 24, 16, 8, 0 }; /* thanks, apple.. */
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static const u8 g94[] = { 16, 8, 0, 24 };
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if (nv_device(priv)->chipset >= 0x110)
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return gm100[lane];
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if (nv_device(priv)->chipset == 0xaf)
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return mcp89[lane];
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return g94[lane];
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@ -36,13 +36,6 @@ gf110_sor_loff(struct nvkm_output_dp *outp)
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return gf110_sor_soff(outp) + !(outp->base.info.sorconf.link & 1) * 0x80;
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}
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static inline u32
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gf110_sor_dp_lane_map(struct nv50_disp_priv *priv, u8 lane)
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{
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static const u8 gf110[] = { 16, 8, 0, 24 };
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return gf110[lane];
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}
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static int
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gf110_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
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{
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@ -77,7 +70,7 @@ gf110_sor_dp_drv_ctl(struct nvkm_output_dp *outp,
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{
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struct nv50_disp_priv *priv = (void *)nvkm_disp(outp);
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struct nvkm_bios *bios = nvkm_bios(priv);
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const u32 shift = gf110_sor_dp_lane_map(priv, ln);
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const u32 shift = g94_sor_dp_lane_map(priv, ln);
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const u32 loff = gf110_sor_loff(outp);
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u32 addr, data[4];
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u8 ver, hdr, cnt, len;
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