ZTE PM domain driver support for 4.11:
- It includes a series which adds DT bindings and PM domain driver for
PCU (Power Control Unit) block found on ZTE ZX2967 family SoC.
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Merge tag 'zte-pd-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers
ZTE PM domain driver support for 4.11:
- It includes a series which adds DT bindings and PM domain driver for
PCU (Power Control Unit) block found on ZTE ZX2967 family SoC.
* tag 'zte-pd-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: zte: pm_domains: Add support for zx296718
soc: zte: pm_domains: Prepare for supporting ARMv8 zx2967 family
soc: zte: Add header for PM domains specifiers
MAINTAINERS: add zx2967 SoC drivers to ARM ZTE architecture
dt-bindings: zte: add bindings document for zx2967 power domain controller
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
2a742e1b18
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@ -0,0 +1,19 @@
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* ZTE zx2967 family Power Domains
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zx2967 family includes support for multiple power domains which are used
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to gate power to one or more peripherals on the processor.
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Required Properties:
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- compatible: should be one of the following.
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* zte,zx296718-pcu - for zx296718 power domain.
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- reg: physical base address of the controller and length of memory mapped
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region.
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- #power-domain-cells: Must be 1.
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Example:
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pcu_domain: pcu@117000 {
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compatible = "zte,zx296718-pcu";
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reg = <0x00117000 0x1000>;
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#power-domain-cells = <1>;
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};
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@ -1982,14 +1982,18 @@ F: arch/arm/mach-pxa/include/mach/z2.h
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ARM/ZTE ARCHITECTURE
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M: Jun Nie <jun.nie@linaro.org>
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M: Baoyou Xie <baoyou.xie@linaro.org>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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F: arch/arm/mach-zx/
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F: drivers/clk/zte/
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F: drivers/reset/reset-zx2967.c
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F: drivers/soc/zte/
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F: Documentation/devicetree/bindings/arm/zte.txt
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F: Documentation/devicetree/bindings/clock/zx296702-clk.txt
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F: Documentation/devicetree/bindings/reset/zte,zx2967-reset.txt
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F: Documentation/devicetree/bindings/soc/zte/
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F: include/dt-bindings/soc/zx*.h
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ARM/ZYNQ ARCHITECTURE
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M: Michal Simek <michal.simek@xilinx.com>
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@ -11,5 +11,6 @@ source "drivers/soc/tegra/Kconfig"
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source "drivers/soc/ti/Kconfig"
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source "drivers/soc/ux500/Kconfig"
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source "drivers/soc/versatile/Kconfig"
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source "drivers/soc/zte/Kconfig"
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endmenu
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@ -16,3 +16,4 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
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obj-$(CONFIG_SOC_TI) += ti/
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obj-$(CONFIG_ARCH_U8500) += ux500/
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obj-$(CONFIG_PLAT_VERSATILE) += versatile/
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obj-$(CONFIG_ARCH_ZX) += zte/
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@ -0,0 +1,13 @@
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#
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# ZTE SoC drivers
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#
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menuconfig SOC_ZTE
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bool "ZTE SoC driver support"
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if SOC_ZTE
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config ZX2967_PM_DOMAINS
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bool "ZX2967 PM domains"
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depends on PM_GENERIC_DOMAINS
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endif
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@ -0,0 +1,5 @@
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#
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# ZTE SOC drivers
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#
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obj-$(CONFIG_ZX2967_PM_DOMAINS) += zx2967_pm_domains.o
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obj-$(CONFIG_ZX2967_PM_DOMAINS) += zx296718_pm_domains.o
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@ -0,0 +1,182 @@
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/*
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* Copyright (C) 2017 ZTE Ltd.
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*
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* Author: Baoyou Xie <baoyou.xie@linaro.org>
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* License terms: GNU General Public License (GPL) version 2
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*/
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#include <dt-bindings/soc/zte,pm_domains.h>
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#include "zx2967_pm_domains.h"
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static u16 zx296718_offsets[REG_ARRAY_SIZE] = {
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[REG_CLKEN] = 0x18,
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[REG_ISOEN] = 0x1c,
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[REG_RSTEN] = 0x20,
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[REG_PWREN] = 0x24,
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[REG_ACK_SYNC] = 0x28,
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};
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enum {
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PCU_DM_VOU = 0,
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PCU_DM_SAPPU,
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PCU_DM_VDE,
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PCU_DM_VCE,
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PCU_DM_HDE,
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PCU_DM_VIU,
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PCU_DM_USB20,
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PCU_DM_USB21,
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PCU_DM_USB30,
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PCU_DM_HSIC,
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PCU_DM_GMAC,
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PCU_DM_TS,
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};
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static struct zx2967_pm_domain vou_domain = {
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.dm = {
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.name = "vou_domain",
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},
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.bit = PCU_DM_VOU,
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.polarity = PWREN,
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.reg_offset = zx296718_offsets,
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};
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static struct zx2967_pm_domain sappu_domain = {
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.dm = {
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.name = "sappu_domain",
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},
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.bit = PCU_DM_SAPPU,
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.polarity = PWREN,
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.reg_offset = zx296718_offsets,
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};
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static struct zx2967_pm_domain vde_domain = {
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.dm = {
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.name = "vde_domain",
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},
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.bit = PCU_DM_VDE,
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.polarity = PWREN,
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.reg_offset = zx296718_offsets,
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};
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static struct zx2967_pm_domain vce_domain = {
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.dm = {
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.name = "vce_domain",
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},
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.bit = PCU_DM_VCE,
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.polarity = PWREN,
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.reg_offset = zx296718_offsets,
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};
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static struct zx2967_pm_domain hde_domain = {
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.dm = {
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.name = "hde_domain",
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},
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.bit = PCU_DM_HDE,
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.polarity = PWREN,
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.reg_offset = zx296718_offsets,
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};
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static struct zx2967_pm_domain viu_domain = {
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.dm = {
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.name = "viu_domain",
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},
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.bit = PCU_DM_VIU,
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.polarity = PWREN,
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.reg_offset = zx296718_offsets,
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};
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static struct zx2967_pm_domain usb20_domain = {
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.dm = {
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.name = "usb20_domain",
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},
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.bit = PCU_DM_USB20,
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.polarity = PWREN,
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.reg_offset = zx296718_offsets,
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};
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static struct zx2967_pm_domain usb21_domain = {
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.dm = {
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.name = "usb21_domain",
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},
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.bit = PCU_DM_USB21,
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.polarity = PWREN,
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.reg_offset = zx296718_offsets,
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};
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static struct zx2967_pm_domain usb30_domain = {
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.dm = {
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.name = "usb30_domain",
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},
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.bit = PCU_DM_USB30,
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.polarity = PWREN,
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.reg_offset = zx296718_offsets,
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};
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static struct zx2967_pm_domain hsic_domain = {
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.dm = {
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.name = "hsic_domain",
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},
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.bit = PCU_DM_HSIC,
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.polarity = PWREN,
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.reg_offset = zx296718_offsets,
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};
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static struct zx2967_pm_domain gmac_domain = {
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.dm = {
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.name = "gmac_domain",
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},
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.bit = PCU_DM_GMAC,
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.polarity = PWREN,
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.reg_offset = zx296718_offsets,
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};
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static struct zx2967_pm_domain ts_domain = {
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.dm = {
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.name = "ts_domain",
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},
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.bit = PCU_DM_TS,
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.polarity = PWREN,
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.reg_offset = zx296718_offsets,
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};
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static struct generic_pm_domain *zx296718_pm_domains[] = {
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[DM_ZX296718_VOU] = &vou_domain.dm,
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[DM_ZX296718_SAPPU] = &sappu_domain.dm,
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[DM_ZX296718_VDE] = &vde_domain.dm,
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[DM_ZX296718_VCE] = &vce_domain.dm,
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[DM_ZX296718_HDE] = &hde_domain.dm,
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[DM_ZX296718_VIU] = &viu_domain.dm,
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[DM_ZX296718_USB20] = &usb20_domain.dm,
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[DM_ZX296718_USB21] = &usb21_domain.dm,
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[DM_ZX296718_USB30] = &usb30_domain.dm,
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[DM_ZX296718_HSIC] = &hsic_domain.dm,
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[DM_ZX296718_GMAC] = &gmac_domain.dm,
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[DM_ZX296718_TS] = &ts_domain.dm,
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};
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static int zx296718_pd_probe(struct platform_device *pdev)
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{
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return zx2967_pd_probe(pdev,
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zx296718_pm_domains,
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ARRAY_SIZE(zx296718_pm_domains));
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}
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static const struct of_device_id zx296718_pm_domain_matches[] = {
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{ .compatible = "zte,zx296718-pcu", },
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{ },
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};
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static struct platform_driver zx296718_pd_driver = {
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.driver = {
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.name = "zx296718-powerdomain",
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.owner = THIS_MODULE,
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.of_match_table = zx296718_pm_domain_matches,
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},
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.probe = zx296718_pd_probe,
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};
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static int __init zx296718_pd_init(void)
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{
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return platform_driver_register(&zx296718_pd_driver);
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}
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subsys_initcall(zx296718_pd_init);
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@ -0,0 +1,143 @@
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/*
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* Copyright (C) 2017 ZTE Ltd.
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*
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* Author: Baoyou Xie <baoyou.xie@linaro.org>
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* License terms: GNU General Public License (GPL) version 2
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include "zx2967_pm_domains.h"
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#define PCU_DM_CLKEN(zpd) ((zpd)->reg_offset[REG_CLKEN])
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#define PCU_DM_ISOEN(zpd) ((zpd)->reg_offset[REG_ISOEN])
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#define PCU_DM_RSTEN(zpd) ((zpd)->reg_offset[REG_RSTEN])
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#define PCU_DM_PWREN(zpd) ((zpd)->reg_offset[REG_PWREN])
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#define PCU_DM_ACK_SYNC(zpd) ((zpd)->reg_offset[REG_ACK_SYNC])
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static void __iomem *pcubase;
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static int zx2967_power_on(struct generic_pm_domain *domain)
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{
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struct zx2967_pm_domain *zpd = (struct zx2967_pm_domain *)domain;
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unsigned long loop = 1000;
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u32 val;
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val = readl_relaxed(pcubase + PCU_DM_PWREN(zpd));
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if (zpd->polarity == PWREN)
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val |= BIT(zpd->bit);
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else
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val &= ~BIT(zpd->bit);
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writel_relaxed(val, pcubase + PCU_DM_PWREN(zpd));
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|
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do {
|
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udelay(1);
|
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val = readl_relaxed(pcubase + PCU_DM_ACK_SYNC(zpd))
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& BIT(zpd->bit);
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} while (--loop && !val);
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|
||||
if (!loop) {
|
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pr_err("Error: %s %s fail\n", __func__, domain->name);
|
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return -EIO;
|
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}
|
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|
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val = readl_relaxed(pcubase + PCU_DM_RSTEN(zpd));
|
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val |= BIT(zpd->bit);
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writel_relaxed(val, pcubase + PCU_DM_RSTEN(zpd));
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udelay(5);
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|
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val = readl_relaxed(pcubase + PCU_DM_ISOEN(zpd));
|
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val &= ~BIT(zpd->bit);
|
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writel_relaxed(val, pcubase + PCU_DM_ISOEN(zpd));
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udelay(5);
|
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|
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val = readl_relaxed(pcubase + PCU_DM_CLKEN(zpd));
|
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val |= BIT(zpd->bit);
|
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writel_relaxed(val, pcubase + PCU_DM_CLKEN(zpd));
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udelay(5);
|
||||
|
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pr_debug("poweron %s\n", domain->name);
|
||||
|
||||
return 0;
|
||||
}
|
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|
||||
static int zx2967_power_off(struct generic_pm_domain *domain)
|
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{
|
||||
struct zx2967_pm_domain *zpd = (struct zx2967_pm_domain *)domain;
|
||||
unsigned long loop = 1000;
|
||||
u32 val;
|
||||
|
||||
val = readl_relaxed(pcubase + PCU_DM_CLKEN(zpd));
|
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val &= ~BIT(zpd->bit);
|
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writel_relaxed(val, pcubase + PCU_DM_CLKEN(zpd));
|
||||
udelay(5);
|
||||
|
||||
val = readl_relaxed(pcubase + PCU_DM_ISOEN(zpd));
|
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val |= BIT(zpd->bit);
|
||||
writel_relaxed(val, pcubase + PCU_DM_ISOEN(zpd));
|
||||
udelay(5);
|
||||
|
||||
val = readl_relaxed(pcubase + PCU_DM_RSTEN(zpd));
|
||||
val &= ~BIT(zpd->bit);
|
||||
writel_relaxed(val, pcubase + PCU_DM_RSTEN(zpd));
|
||||
udelay(5);
|
||||
|
||||
val = readl_relaxed(pcubase + PCU_DM_PWREN(zpd));
|
||||
if (zpd->polarity == PWREN)
|
||||
val &= ~BIT(zpd->bit);
|
||||
else
|
||||
val |= BIT(zpd->bit);
|
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writel_relaxed(val, pcubase + PCU_DM_PWREN(zpd));
|
||||
|
||||
do {
|
||||
udelay(1);
|
||||
val = readl_relaxed(pcubase + PCU_DM_ACK_SYNC(zpd))
|
||||
& BIT(zpd->bit);
|
||||
} while (--loop && val);
|
||||
|
||||
if (!loop) {
|
||||
pr_err("Error: %s %s fail\n", __func__, domain->name);
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
pr_debug("poweroff %s\n", domain->name);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int zx2967_pd_probe(struct platform_device *pdev,
|
||||
struct generic_pm_domain **zx_pm_domains,
|
||||
int domain_num)
|
||||
{
|
||||
struct genpd_onecell_data *genpd_data;
|
||||
struct resource *res;
|
||||
int i;
|
||||
|
||||
genpd_data = devm_kzalloc(&pdev->dev, sizeof(*genpd_data), GFP_KERNEL);
|
||||
if (!genpd_data)
|
||||
return -ENOMEM;
|
||||
|
||||
genpd_data->domains = zx_pm_domains;
|
||||
genpd_data->num_domains = domain_num;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
pcubase = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(pcubase)) {
|
||||
dev_err(&pdev->dev, "ioremap fail.\n");
|
||||
return PTR_ERR(pcubase);
|
||||
}
|
||||
|
||||
for (i = 0; i < domain_num; ++i) {
|
||||
zx_pm_domains[i]->power_on = zx2967_power_on;
|
||||
zx_pm_domains[i]->power_off = zx2967_power_off;
|
||||
|
||||
pm_genpd_init(zx_pm_domains[i], NULL, false);
|
||||
}
|
||||
|
||||
of_genpd_add_provider_onecell(pdev->dev.of_node, genpd_data);
|
||||
dev_info(&pdev->dev, "powerdomain init ok\n");
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,44 @@
|
|||
/*
|
||||
* Header for ZTE's Power Domain Driver support
|
||||
*
|
||||
* Copyright (C) 2017 ZTE Ltd.
|
||||
*
|
||||
* Author: Baoyou Xie <baoyou.xie@linaro.org>
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
*/
|
||||
|
||||
#ifndef __ZTE_ZX2967_PM_DOMAIN_H
|
||||
#define __ZTE_ZX2967_PM_DOMAIN_H
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm_domain.h>
|
||||
|
||||
enum {
|
||||
REG_CLKEN,
|
||||
REG_ISOEN,
|
||||
REG_RSTEN,
|
||||
REG_PWREN,
|
||||
REG_PWRDN,
|
||||
REG_ACK_SYNC,
|
||||
|
||||
/* The size of the array - must be last */
|
||||
REG_ARRAY_SIZE,
|
||||
};
|
||||
|
||||
enum zx2967_power_polarity {
|
||||
PWREN,
|
||||
PWRDN,
|
||||
};
|
||||
|
||||
struct zx2967_pm_domain {
|
||||
struct generic_pm_domain dm;
|
||||
const u16 bit;
|
||||
const enum zx2967_power_polarity polarity;
|
||||
const u16 *reg_offset;
|
||||
};
|
||||
|
||||
int zx2967_pd_probe(struct platform_device *pdev,
|
||||
struct generic_pm_domain **zx_pm_domains,
|
||||
int domain_num);
|
||||
|
||||
#endif /* __ZTE_ZX2967_PM_DOMAIN_H */
|
||||
|
|
@ -0,0 +1,24 @@
|
|||
/*
|
||||
* Copyright (C) 2017 Linaro Ltd.
|
||||
*
|
||||
* Author: Baoyou Xie <baoyou.xie@linaro.org>
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_SOC_ZTE_PM_DOMAINS_H
|
||||
#define _DT_BINDINGS_SOC_ZTE_PM_DOMAINS_H
|
||||
|
||||
#define DM_ZX296718_SAPPU 0
|
||||
#define DM_ZX296718_VDE 1 /* g1v6 */
|
||||
#define DM_ZX296718_VCE 2 /* h1v6 */
|
||||
#define DM_ZX296718_HDE 3 /* g2v2 */
|
||||
#define DM_ZX296718_VIU 4
|
||||
#define DM_ZX296718_USB20 5
|
||||
#define DM_ZX296718_USB21 6
|
||||
#define DM_ZX296718_USB30 7
|
||||
#define DM_ZX296718_HSIC 8
|
||||
#define DM_ZX296718_GMAC 9
|
||||
#define DM_ZX296718_TS 10
|
||||
#define DM_ZX296718_VOU 11
|
||||
|
||||
#endif /* _DT_BINDINGS_SOC_ZTE_PM_DOMAINS_H */
|
||||
Loading…
Reference in New Issue