cpufreq: kirkwood: Add a cpufreq driver for Marvell Kirkwood SoCs
The Marvell Kirkwood SoCs have simple cpufreq support in hardware. The CPU can either use the a high speed cpu clock, or the slower DDR clock. Add a driver to swap between these two clock sources. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Jason Cooper <jason@lakedaemon.net> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -0,0 +1,27 @@
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Marvell Kirkwood Platforms Device Tree Bindings
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-----------------------------------------------
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Boards with a SoC of the Marvell Kirkwood
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shall have the following property:
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Required root node property:
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compatible: must contain "marvell,kirkwood";
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In order to support the kirkwood cpufreq driver, there must be a node
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cpus/cpu@0 with three clocks, "cpu_clk", "ddrclk" and "powersave",
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where the "powersave" clock is a gating clock used to switch the CPU
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between the "cpu_clk" and the "ddrclk".
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Example:
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "marvell,sheeva-88SV131";
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clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
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clock-names = "cpu_clk", "ddrclk", "powersave";
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};
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@ -193,6 +193,7 @@ static const struct mvebu_soc_descr __initconst kirkwood_gating_descr[] = {
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{ "runit", NULL, 7 },
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{ "xor0", NULL, 8 },
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{ "audio", NULL, 9 },
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{ "powersave", "cpuclk", 11 },
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{ "sata0", NULL, 14 },
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{ "sata1", NULL, 15 },
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{ "xor1", NULL, 16 },
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@ -77,6 +77,12 @@ config ARM_EXYNOS5250_CPUFREQ
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This adds the CPUFreq driver for Samsung EXYNOS5250
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SoC.
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config ARM_KIRKWOOD_CPUFREQ
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def_bool ARCH_KIRKWOOD && OF
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help
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This adds the CPUFreq driver for Marvell Kirkwood
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SoCs.
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config ARM_IMX6Q_CPUFREQ
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tristate "Freescale i.MX6Q cpufreq support"
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depends on SOC_IMX6Q
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@ -52,6 +52,7 @@ obj-$(CONFIG_ARM_EXYNOS_CPUFREQ) += exynos-cpufreq.o
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obj-$(CONFIG_ARM_EXYNOS4210_CPUFREQ) += exynos4210-cpufreq.o
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obj-$(CONFIG_ARM_EXYNOS4X12_CPUFREQ) += exynos4x12-cpufreq.o
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obj-$(CONFIG_ARM_EXYNOS5250_CPUFREQ) += exynos5250-cpufreq.o
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obj-$(CONFIG_ARM_KIRKWOOD_CPUFREQ) += kirkwood-cpufreq.o
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obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o
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obj-$(CONFIG_ARM_SPEAR_CPUFREQ) += spear-cpufreq.o
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obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += highbank-cpufreq.o
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/*
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* kirkwood_freq.c: cpufreq driver for the Marvell kirkwood
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*
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* Copyright (C) 2013 Andrew Lunn <andrew@lunn.ch>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/cpufreq.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <asm/proc-fns.h>
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#define CPU_SW_INT_BLK BIT(28)
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static struct priv
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{
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struct clk *cpu_clk;
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struct clk *ddr_clk;
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struct clk *powersave_clk;
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struct device *dev;
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void __iomem *base;
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} priv;
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#define STATE_CPU_FREQ 0x01
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#define STATE_DDR_FREQ 0x02
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/*
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* Kirkwood can swap the clock to the CPU between two clocks:
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*
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* - cpu clk
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* - ddr clk
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*
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* The frequencies are set at runtime before registering this *
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* table.
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*/
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static struct cpufreq_frequency_table kirkwood_freq_table[] = {
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{STATE_CPU_FREQ, 0}, /* CPU uses cpuclk */
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{STATE_DDR_FREQ, 0}, /* CPU uses ddrclk */
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{0, CPUFREQ_TABLE_END},
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};
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static unsigned int kirkwood_cpufreq_get_cpu_frequency(unsigned int cpu)
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{
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if (__clk_is_enabled(priv.powersave_clk))
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return kirkwood_freq_table[1].frequency;
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return kirkwood_freq_table[0].frequency;
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}
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static void kirkwood_cpufreq_set_cpu_state(unsigned int index)
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{
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struct cpufreq_freqs freqs;
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unsigned int state = kirkwood_freq_table[index].index;
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unsigned long reg;
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freqs.old = kirkwood_cpufreq_get_cpu_frequency(0);
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freqs.new = kirkwood_freq_table[index].frequency;
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freqs.cpu = 0; /* Kirkwood is UP */
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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dev_dbg(priv.dev, "Attempting to set frequency to %i KHz\n",
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kirkwood_freq_table[index].frequency);
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dev_dbg(priv.dev, "old frequency was %i KHz\n",
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kirkwood_cpufreq_get_cpu_frequency(0));
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if (freqs.old != freqs.new) {
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local_irq_disable();
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/* Disable interrupts to the CPU */
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reg = readl_relaxed(priv.base);
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reg |= CPU_SW_INT_BLK;
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writel_relaxed(reg, priv.base);
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switch (state) {
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case STATE_CPU_FREQ:
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clk_disable(priv.powersave_clk);
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break;
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case STATE_DDR_FREQ:
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clk_enable(priv.powersave_clk);
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break;
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}
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/* Wait-for-Interrupt, while the hardware changes frequency */
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cpu_do_idle();
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/* Enable interrupts to the CPU */
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reg = readl_relaxed(priv.base);
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reg &= ~CPU_SW_INT_BLK;
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writel_relaxed(reg, priv.base);
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local_irq_enable();
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}
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cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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};
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static int kirkwood_cpufreq_verify(struct cpufreq_policy *policy)
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{
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return cpufreq_frequency_table_verify(policy, kirkwood_freq_table);
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}
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static int kirkwood_cpufreq_target(struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int relation)
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{
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unsigned int index = 0;
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if (cpufreq_frequency_table_target(policy, kirkwood_freq_table,
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target_freq, relation, &index))
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return -EINVAL;
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kirkwood_cpufreq_set_cpu_state(index);
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return 0;
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}
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/* Module init and exit code */
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static int kirkwood_cpufreq_cpu_init(struct cpufreq_policy *policy)
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{
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int result;
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/* cpuinfo and default policy values */
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policy->cpuinfo.transition_latency = 5000; /* 5uS */
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policy->cur = kirkwood_cpufreq_get_cpu_frequency(0);
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result = cpufreq_frequency_table_cpuinfo(policy, kirkwood_freq_table);
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if (result)
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return result;
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cpufreq_frequency_table_get_attr(kirkwood_freq_table, policy->cpu);
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return 0;
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}
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static int kirkwood_cpufreq_cpu_exit(struct cpufreq_policy *policy)
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{
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cpufreq_frequency_table_put_attr(policy->cpu);
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return 0;
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}
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static struct freq_attr *kirkwood_cpufreq_attr[] = {
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&cpufreq_freq_attr_scaling_available_freqs,
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NULL,
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};
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static struct cpufreq_driver kirkwood_cpufreq_driver = {
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.get = kirkwood_cpufreq_get_cpu_frequency,
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.verify = kirkwood_cpufreq_verify,
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.target = kirkwood_cpufreq_target,
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.init = kirkwood_cpufreq_cpu_init,
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.exit = kirkwood_cpufreq_cpu_exit,
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.name = "kirkwood-cpufreq",
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.owner = THIS_MODULE,
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.attr = kirkwood_cpufreq_attr,
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};
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static int kirkwood_cpufreq_probe(struct platform_device *pdev)
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{
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struct device_node *np;
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struct resource *res;
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int err;
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priv.dev = &pdev->dev;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&pdev->dev, "Cannot get memory resource\n");
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return -ENODEV;
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}
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priv.base = devm_request_and_ioremap(&pdev->dev, res);
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if (!priv.base) {
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dev_err(&pdev->dev, "Cannot ioremap\n");
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return -EADDRNOTAVAIL;
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}
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np = of_find_node_by_path("/cpus/cpu@0");
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if (!np)
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return -ENODEV;
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priv.cpu_clk = of_clk_get_by_name(np, "cpu_clk");
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if (IS_ERR(priv.cpu_clk)) {
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dev_err(priv.dev, "Unable to get cpuclk");
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return PTR_ERR(priv.cpu_clk);
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}
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clk_prepare_enable(priv.cpu_clk);
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kirkwood_freq_table[0].frequency = clk_get_rate(priv.cpu_clk) / 1000;
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priv.ddr_clk = of_clk_get_by_name(np, "ddrclk");
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if (IS_ERR(priv.ddr_clk)) {
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dev_err(priv.dev, "Unable to get ddrclk");
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err = PTR_ERR(priv.ddr_clk);
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goto out_cpu;
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}
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clk_prepare_enable(priv.ddr_clk);
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kirkwood_freq_table[1].frequency = clk_get_rate(priv.ddr_clk) / 1000;
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priv.powersave_clk = of_clk_get_by_name(np, "powersave");
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if (IS_ERR(priv.powersave_clk)) {
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dev_err(priv.dev, "Unable to get powersave");
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err = PTR_ERR(priv.powersave_clk);
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goto out_ddr;
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}
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clk_prepare(priv.powersave_clk);
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of_node_put(np);
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np = NULL;
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err = cpufreq_register_driver(&kirkwood_cpufreq_driver);
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if (!err)
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return 0;
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dev_err(priv.dev, "Failed to register cpufreq driver");
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clk_disable_unprepare(priv.powersave_clk);
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out_ddr:
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clk_disable_unprepare(priv.ddr_clk);
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out_cpu:
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clk_disable_unprepare(priv.cpu_clk);
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of_node_put(np);
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return err;
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}
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static int kirkwood_cpufreq_remove(struct platform_device *pdev)
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{
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cpufreq_unregister_driver(&kirkwood_cpufreq_driver);
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clk_disable_unprepare(priv.powersave_clk);
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clk_disable_unprepare(priv.ddr_clk);
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clk_disable_unprepare(priv.cpu_clk);
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return 0;
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}
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static struct platform_driver kirkwood_cpufreq_platform_driver = {
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.probe = kirkwood_cpufreq_probe,
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.remove = kirkwood_cpufreq_remove,
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.driver = {
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.name = "kirkwood-cpufreq",
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.owner = THIS_MODULE,
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},
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};
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module_platform_driver(kirkwood_cpufreq_platform_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch");
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MODULE_DESCRIPTION("cpufreq driver for Marvell's kirkwood CPU");
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MODULE_ALIAS("platform:kirkwood-cpufreq");
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