Merge remote-tracking branches 'regmap/fix/be', 'regmap/fix/doc' and 'regmap/fix/spmi' into regmap-linus
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commit
2a2cd52190
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@ -1,50 +1,29 @@
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Device-Tree binding for regmap
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Devicetree binding for regmap
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The endianness mode of CPU & Device scenarios:
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Index Device Endianness properties
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---------------------------------------------------
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1 BE 'big-endian'
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2 LE 'little-endian'
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3 Native 'native-endian'
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For one device driver, which will run in different scenarios above
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on different SoCs using the devicetree, we need one way to simplify
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this.
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Optional properties:
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Optional properties:
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- {big,little,native}-endian: these are boolean properties, if absent
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then the implementation will choose a default based on the device
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little-endian,
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being controlled. These properties are for register values and all
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big-endian,
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the buffers only. Native endian means that the CPU and device have
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native-endian: See common-properties.txt for a definition
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the same endianness.
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Note:
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Regmap defaults to little-endian register access on MMIO based
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devices, this is by far the most common setting. On CPU
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architectures that typically run big-endian operating systems
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(e.g. PowerPC), registers can be defined as big-endian and must
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be marked that way in the devicetree.
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On SoCs that can be operated in both big-endian and little-endian
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modes, with a single hardware switch controlling both the endianess
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of the CPU and a byteswap for MMIO registers (e.g. many Broadcom MIPS
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chips), "native-endian" is used to allow using the same device tree
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blob in both cases.
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Examples:
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Examples:
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Scenario 1 : CPU in LE mode & device in LE mode.
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Scenario 1 : a register set in big-endian mode.
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dev: dev@40031000 {
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dev: dev@40031000 {
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compatible = "name";
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compatible = "syscon";
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reg = <0x40031000 0x1000>;
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reg = <0x40031000 0x1000>;
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...
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};
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Scenario 2 : CPU in LE mode & device in BE mode.
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dev: dev@40031000 {
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compatible = "name";
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reg = <0x40031000 0x1000>;
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...
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big-endian;
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big-endian;
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};
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Scenario 3 : CPU in BE mode & device in BE mode.
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dev: dev@40031000 {
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compatible = "name";
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reg = <0x40031000 0x1000>;
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...
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...
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};
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};
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Scenario 4 : CPU in BE mode & device in LE mode.
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dev: dev@40031000 {
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compatible = "name";
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reg = <0x40031000 0x1000>;
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...
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little-endian;
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};
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@ -13,6 +13,7 @@
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#ifndef _REGMAP_INTERNAL_H
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#ifndef _REGMAP_INTERNAL_H
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#define _REGMAP_INTERNAL_H
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#define _REGMAP_INTERNAL_H
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#include <linux/device.h>
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#include <linux/regmap.h>
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#include <linux/regmap.h>
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#include <linux/fs.h>
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#include <linux/fs.h>
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#include <linux/list.h>
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#include <linux/list.h>
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@ -23,6 +23,8 @@
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#include <linux/regmap.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include "internal.h"
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struct regmap_mmio_context {
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struct regmap_mmio_context {
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void __iomem *regs;
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void __iomem *regs;
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unsigned val_bytes;
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unsigned val_bytes;
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@ -246,7 +248,7 @@ static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev,
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ctx->val_bytes = config->val_bits / 8;
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ctx->val_bytes = config->val_bits / 8;
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ctx->clk = ERR_PTR(-ENODEV);
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ctx->clk = ERR_PTR(-ENODEV);
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switch (config->reg_format_endian) {
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switch (regmap_get_val_endian(dev, ®map_mmio, config)) {
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case REGMAP_ENDIAN_DEFAULT:
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case REGMAP_ENDIAN_DEFAULT:
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case REGMAP_ENDIAN_LITTLE:
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case REGMAP_ENDIAN_LITTLE:
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#ifdef __LITTLE_ENDIAN
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#ifdef __LITTLE_ENDIAN
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@ -142,7 +142,7 @@ static int regmap_spmi_ext_read(void *context,
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while (val_size) {
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while (val_size) {
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len = min_t(size_t, val_size, 8);
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len = min_t(size_t, val_size, 8);
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err = spmi_ext_register_readl(context, addr, val, val_size);
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err = spmi_ext_register_readl(context, addr, val, len);
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if (err)
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if (err)
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goto err_out;
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goto err_out;
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