powerpc/mm: Fix tlbie to add AVAL fields for 64K pages
The if condition check was based on a draft ISA doc. Remove the same. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -82,17 +82,14 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize)
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va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1);
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va |= penc << 12;
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va |= ssize << 8;
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/* Add AVAL part */
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if (psize != apsize) {
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/*
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* MPSS, 64K base page size and 16MB parge page size
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* We don't need all the bits, but rest of the bits
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* must be ignored by the processor.
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* vpn cover upto 65 bits of va. (0...65) and we need
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* 58..64 bits of va.
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*/
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va |= (vpn & 0xfe);
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}
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/*
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* AVAL bits:
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* We don't need all the bits, but rest of the bits
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* must be ignored by the processor.
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* vpn cover upto 65 bits of va. (0...65) and we need
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* 58..64 bits of va.
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*/
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va |= (vpn & 0xfe); /* AVAL */
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va |= 1; /* L */
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asm volatile(ASM_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0), %2)
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: : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206)
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@ -133,17 +130,14 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize)
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va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1);
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va |= penc << 12;
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va |= ssize << 8;
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/* Add AVAL part */
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if (psize != apsize) {
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/*
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* MPSS, 64K base page size and 16MB parge page size
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* We don't need all the bits, but rest of the bits
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* must be ignored by the processor.
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* vpn cover upto 65 bits of va. (0...65) and we need
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* 58..64 bits of va.
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*/
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va |= (vpn & 0xfe);
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}
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/*
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* AVAL bits:
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* We don't need all the bits, but rest of the bits
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* must be ignored by the processor.
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* vpn cover upto 65 bits of va. (0...65) and we need
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* 58..64 bits of va.
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*/
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va |= (vpn & 0xfe);
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va |= 1; /* L */
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asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)"
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: : "r"(va) : "memory");
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