iommu/io-pgtable: Rename iommu_gather_ops to iommu_flush_ops
In preparation for TLB flush gathering in the IOMMU API, rename the iommu_gather_ops structure in io-pgtable to iommu_flush_ops, which better describes its purpose and avoids the potential for confusion between different levels of the API. $ find linux/ -type f -name '*.[ch]' | xargs sed -i 's/gather_ops/flush_ops/g' Signed-off-by: Will Deacon <will@kernel.org>
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@ -257,7 +257,7 @@ static void mmu_tlb_sync_context(void *cookie)
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// TODO: Wait 1000 GPU cycles for HW_ISSUE_6367/T60X
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}
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static const struct iommu_gather_ops mmu_tlb_ops = {
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static const struct iommu_flush_ops mmu_tlb_ops = {
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.tlb_flush_all = mmu_tlb_inv_context_s1,
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.tlb_add_flush = mmu_tlb_inv_range_nosync,
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.tlb_sync = mmu_tlb_sync_context,
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@ -1603,7 +1603,7 @@ static void arm_smmu_tlb_inv_range_nosync(unsigned long iova, size_t size,
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} while (size -= granule);
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}
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static const struct iommu_gather_ops arm_smmu_gather_ops = {
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static const struct iommu_flush_ops arm_smmu_flush_ops = {
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.tlb_flush_all = arm_smmu_tlb_inv_context,
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.tlb_add_flush = arm_smmu_tlb_inv_range_nosync,
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.tlb_sync = arm_smmu_tlb_sync,
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@ -1796,7 +1796,7 @@ static int arm_smmu_domain_finalise(struct iommu_domain *domain)
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.ias = ias,
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.oas = oas,
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.coherent_walk = smmu->features & ARM_SMMU_FEAT_COHERENCY,
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.tlb = &arm_smmu_gather_ops,
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.tlb = &arm_smmu_flush_ops,
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.iommu_dev = smmu->dev,
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};
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@ -251,7 +251,7 @@ enum arm_smmu_domain_stage {
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struct arm_smmu_domain {
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struct arm_smmu_device *smmu;
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struct io_pgtable_ops *pgtbl_ops;
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const struct iommu_gather_ops *tlb_ops;
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const struct iommu_flush_ops *tlb_ops;
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struct arm_smmu_cfg cfg;
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enum arm_smmu_domain_stage stage;
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bool non_strict;
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@ -547,19 +547,19 @@ static void arm_smmu_tlb_inv_vmid_nosync(unsigned long iova, size_t size,
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writel_relaxed(smmu_domain->cfg.vmid, base + ARM_SMMU_GR0_TLBIVMID);
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}
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static const struct iommu_gather_ops arm_smmu_s1_tlb_ops = {
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static const struct iommu_flush_ops arm_smmu_s1_tlb_ops = {
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.tlb_flush_all = arm_smmu_tlb_inv_context_s1,
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.tlb_add_flush = arm_smmu_tlb_inv_range_nosync,
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.tlb_sync = arm_smmu_tlb_sync_context,
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};
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static const struct iommu_gather_ops arm_smmu_s2_tlb_ops_v2 = {
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static const struct iommu_flush_ops arm_smmu_s2_tlb_ops_v2 = {
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.tlb_flush_all = arm_smmu_tlb_inv_context_s2,
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.tlb_add_flush = arm_smmu_tlb_inv_range_nosync,
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.tlb_sync = arm_smmu_tlb_sync_context,
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};
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static const struct iommu_gather_ops arm_smmu_s2_tlb_ops_v1 = {
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static const struct iommu_flush_ops arm_smmu_s2_tlb_ops_v1 = {
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.tlb_flush_all = arm_smmu_tlb_inv_context_s2,
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.tlb_add_flush = arm_smmu_tlb_inv_vmid_nosync,
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.tlb_sync = arm_smmu_tlb_sync_vmid,
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@ -817,7 +817,7 @@ static void dummy_tlb_sync(void *cookie)
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WARN_ON(cookie != cfg_cookie);
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}
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static const struct iommu_gather_ops dummy_tlb_ops = {
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static const struct iommu_flush_ops dummy_tlb_ops = {
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.tlb_flush_all = dummy_tlb_flush_all,
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.tlb_add_flush = dummy_tlb_add_flush,
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.tlb_sync = dummy_tlb_sync,
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@ -1081,7 +1081,7 @@ static void dummy_tlb_sync(void *cookie)
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WARN_ON(cookie != cfg_cookie);
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}
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static const struct iommu_gather_ops dummy_tlb_ops __initconst = {
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static const struct iommu_flush_ops dummy_tlb_ops __initconst = {
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.tlb_flush_all = dummy_tlb_flush_all,
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.tlb_add_flush = dummy_tlb_add_flush,
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.tlb_sync = dummy_tlb_sync,
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@ -367,7 +367,7 @@ static void ipmmu_tlb_add_flush(unsigned long iova, size_t size,
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/* The hardware doesn't support selective TLB flush. */
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}
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static const struct iommu_gather_ops ipmmu_gather_ops = {
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static const struct iommu_flush_ops ipmmu_flush_ops = {
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.tlb_flush_all = ipmmu_tlb_flush_all,
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.tlb_add_flush = ipmmu_tlb_add_flush,
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.tlb_sync = ipmmu_tlb_flush_all,
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@ -480,7 +480,7 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)
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domain->cfg.pgsize_bitmap = SZ_1G | SZ_2M | SZ_4K;
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domain->cfg.ias = 32;
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domain->cfg.oas = 40;
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domain->cfg.tlb = &ipmmu_gather_ops;
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domain->cfg.tlb = &ipmmu_flush_ops;
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domain->io_domain.geometry.aperture_end = DMA_BIT_MASK(32);
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domain->io_domain.geometry.force_aperture = true;
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/*
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@ -178,7 +178,7 @@ static void __flush_iotlb_sync(void *cookie)
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*/
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}
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static const struct iommu_gather_ops msm_iommu_gather_ops = {
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static const struct iommu_flush_ops msm_iommu_flush_ops = {
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.tlb_flush_all = __flush_iotlb,
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.tlb_add_flush = __flush_iotlb_range,
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.tlb_sync = __flush_iotlb_sync,
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@ -345,7 +345,7 @@ static int msm_iommu_domain_config(struct msm_priv *priv)
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.pgsize_bitmap = msm_iommu_ops.pgsize_bitmap,
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.ias = 32,
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.oas = 32,
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.tlb = &msm_iommu_gather_ops,
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.tlb = &msm_iommu_flush_ops,
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.iommu_dev = priv->dev,
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};
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@ -188,7 +188,7 @@ static void mtk_iommu_tlb_sync(void *cookie)
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}
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}
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static const struct iommu_gather_ops mtk_iommu_gather_ops = {
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static const struct iommu_flush_ops mtk_iommu_flush_ops = {
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.tlb_flush_all = mtk_iommu_tlb_flush_all,
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.tlb_add_flush = mtk_iommu_tlb_add_flush_nosync,
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.tlb_sync = mtk_iommu_tlb_sync,
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@ -267,7 +267,7 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom)
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.pgsize_bitmap = mtk_iommu_ops.pgsize_bitmap,
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.ias = 32,
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.oas = 32,
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.tlb = &mtk_iommu_gather_ops,
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.tlb = &mtk_iommu_flush_ops,
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.iommu_dev = data->dev,
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};
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@ -164,7 +164,7 @@ static void qcom_iommu_tlb_inv_range_nosync(unsigned long iova, size_t size,
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}
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}
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static const struct iommu_gather_ops qcom_gather_ops = {
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static const struct iommu_flush_ops qcom_flush_ops = {
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.tlb_flush_all = qcom_iommu_tlb_inv_context,
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.tlb_add_flush = qcom_iommu_tlb_inv_range_nosync,
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.tlb_sync = qcom_iommu_tlb_sync,
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@ -215,7 +215,7 @@ static int qcom_iommu_init_domain(struct iommu_domain *domain,
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.pgsize_bitmap = qcom_iommu_ops.pgsize_bitmap,
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.ias = 32,
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.oas = 40,
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.tlb = &qcom_gather_ops,
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.tlb = &qcom_flush_ops,
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.iommu_dev = qcom_iommu->dev,
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};
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@ -17,7 +17,7 @@ enum io_pgtable_fmt {
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};
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/**
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* struct iommu_gather_ops - IOMMU callbacks for TLB and page table management.
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* struct iommu_flush_ops - IOMMU callbacks for TLB and page table management.
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*
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* @tlb_flush_all: Synchronously invalidate the entire TLB context.
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* @tlb_add_flush: Queue up a TLB invalidation for a virtual address range.
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@ -28,7 +28,7 @@ enum io_pgtable_fmt {
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* Note that these can all be called in atomic context and must therefore
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* not block.
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*/
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struct iommu_gather_ops {
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struct iommu_flush_ops {
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void (*tlb_flush_all)(void *cookie);
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void (*tlb_add_flush)(unsigned long iova, size_t size, size_t granule,
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bool leaf, void *cookie);
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@ -84,7 +84,7 @@ struct io_pgtable_cfg {
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unsigned int ias;
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unsigned int oas;
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bool coherent_walk;
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const struct iommu_gather_ops *tlb;
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const struct iommu_flush_ops *tlb;
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struct device *iommu_dev;
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/* Low-level data specific to the table format */
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