arm: Xilinx ZynqMP DT fixes for v4.14
- Fix DTC warnings - Add idle states, OP, cci-400, RTC, pcie prefetchable memory fpd/lpd dmas, clocks for ep108 - Enable can1 - Fix smmu IRQ, aliases, uart compatible string - Use generic compatible string for i2c eeprom -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlmazlMACgkQykllyylKDCEBuACfVNqg0NgBOKmANE9pEYj68GdR z7MAnRtPKoa8E+3AocdCvlIHiMVyFaJ4 =GNsh -----END PGP SIGNATURE----- Merge tag 'zynqmp-dt-for-4.14' of https://github.com/Xilinx/linux-xlnx into next/dt64 Pull "arm64: Xilinx ZynqMP DT fixes for v4.14" from Michal Simek: - Fix DTC warnings - Add idle states, OP, cci-400, RTC, pcie prefetchable memory fpd/lpd dmas, clocks for ep108 - Enable can1 - Fix smmu IRQ, aliases, uart compatible string - Use generic compatible string for i2c eeprom * tag 'zynqmp-dt-for-4.14' of https://github.com/Xilinx/linux-xlnx: arm64: zynqmp: Add generic compatible string for I2C EEPROM arm64: zynqmp: Add missing mmc aliases in ep108 arm64: zynqmp: Enable can1 for ep108 arm64: zynqmp: Added clocks to DT for ep108 arm64: zynqmp: Use C pre-processor for includes arm64: zynqmp: Add fpd/lpd dmas arm64: zynqmp: Set status disabled in dtsi arm64: zynqmp: Add new uartps compatible string arm64: zynqmp: Correct IRQ nr for the SMMU arm64: zynqmp: Add support for RTC arm64: zynqmp: Adding prefetchable memory space to pcie node arm64: zynqmp: Add CCI-400 node arm64: zynqmp: Add dcc console for zynqmp arm64: zynqmp: Add operating points arm64: zynqmp: Add idle state for ZynqMP arm64: zynqmp: Add references to cpu nodes arm64: zynqmp: Move nodes which have no reg property out of bus arm64: zynqmp: Remove leading 0s from mtd table for spi flashes arm64: dts: xilinx: fix PCI bus dtc warnings
This commit is contained in:
Arnd Bergmann
commit
298f2a3aaa
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@ -11,7 +11,7 @@
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* the License, or (at your option) any later version.
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*/
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&amba {
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/ {
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misc_clk: misc_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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@ -29,12 +29,60 @@
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#clock-cells = <0>;
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clock-frequency = <75000000>;
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};
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clk100: clk100 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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};
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clk600: clk600 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <600000000>;
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};
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};
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&can0 {
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clocks = <&misc_clk &misc_clk>;
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};
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&can1 {
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clocks = <&misc_clk &misc_clk>;
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};
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&fpd_dma_chan1 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan2 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan3 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan4 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan5 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan6 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan7 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan8 {
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clocks = <&clk600>, <&clk100>;
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};
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&gem0 {
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clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>;
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};
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@ -13,13 +13,15 @@
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/dts-v1/;
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/include/ "zynqmp.dtsi"
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/include/ "zynqmp-ep108-clk.dtsi"
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#include "zynqmp.dtsi"
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#include "zynqmp-ep108-clk.dtsi"
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/ {
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model = "ZynqMP EP108";
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aliases {
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mmc0 = &sdhci0;
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mmc1 = &sdhci1;
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serial0 = &uart0;
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};
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@ -37,6 +39,10 @@
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status = "okay";
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};
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&can1 {
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status = "okay";
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};
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&gem0 {
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status = "okay";
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phy-handle = <&phy0>;
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@ -55,7 +61,7 @@
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status = "okay";
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clock-frequency = <400000>;
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eeprom@54 {
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compatible = "at,24c64";
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compatible = "atmel,24c64";
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reg = <0x54>;
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};
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};
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@ -64,7 +70,7 @@
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status = "okay";
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clock-frequency = <400000>;
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eeprom@55 {
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compatible = "at,24c64";
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compatible = "atmel,24c64";
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reg = <0x55>;
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};
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};
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@ -92,7 +98,7 @@
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spi-max-frequency = <50000000>;
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reg = <0>;
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spi0_flash0@00000000 {
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spi0_flash0@0 {
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label = "spi0_flash0";
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reg = <0x0 0x100000>;
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};
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@ -109,7 +115,7 @@
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spi-max-frequency = <50000000>;
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reg = <0>;
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spi1_flash0@00000000 {
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spi1_flash0@0 {
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label = "spi1_flash0";
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reg = <0x0 0x100000>;
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};
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@ -20,33 +20,84 @@
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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cpu0: cpu@0 {
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compatible = "arm,cortex-a53", "arm,armv8";
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device_type = "cpu";
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enable-method = "psci";
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operating-points-v2 = <&cpu_opp_table>;
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reg = <0x0>;
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cpu-idle-states = <&CPU_SLEEP_0>;
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};
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cpu@1 {
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cpu1: cpu@1 {
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compatible = "arm,cortex-a53", "arm,armv8";
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device_type = "cpu";
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enable-method = "psci";
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reg = <0x1>;
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operating-points-v2 = <&cpu_opp_table>;
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cpu-idle-states = <&CPU_SLEEP_0>;
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};
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cpu@2 {
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cpu2: cpu@2 {
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compatible = "arm,cortex-a53", "arm,armv8";
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device_type = "cpu";
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enable-method = "psci";
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reg = <0x2>;
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operating-points-v2 = <&cpu_opp_table>;
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cpu-idle-states = <&CPU_SLEEP_0>;
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};
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cpu@3 {
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cpu3: cpu@3 {
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compatible = "arm,cortex-a53", "arm,armv8";
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device_type = "cpu";
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enable-method = "psci";
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reg = <0x3>;
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operating-points-v2 = <&cpu_opp_table>;
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cpu-idle-states = <&CPU_SLEEP_0>;
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};
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idle-states {
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entry-method = "arm,psci";
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CPU_SLEEP_0: cpu-sleep-0 {
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compatible = "arm,idle-state";
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arm,psci-suspend-param = <0x40000000>;
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local-timer-stop;
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entry-latency-us = <300>;
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exit-latency-us = <600>;
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min-residency-us = <10000>;
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};
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};
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};
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cpu_opp_table: cpu_opp_table {
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compatible = "operating-points-v2";
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opp-shared;
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opp00 {
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opp-hz = /bits/ 64 <1199999988>;
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opp-microvolt = <1000000>;
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clock-latency-ns = <500000>;
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};
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opp01 {
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opp-hz = /bits/ 64 <599999994>;
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opp-microvolt = <1000000>;
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clock-latency-ns = <500000>;
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};
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opp02 {
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opp-hz = /bits/ 64 <399999996>;
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opp-microvolt = <1000000>;
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clock-latency-ns = <500000>;
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};
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opp03 {
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opp-hz = /bits/ 64 <299999997>;
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opp-microvolt = <1000000>;
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clock-latency-ns = <500000>;
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};
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};
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dcc: dcc {
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compatible = "arm,dcc";
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status = "disabled";
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};
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pmu {
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@ -119,6 +170,190 @@
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rx-fifo-depth = <0x40>;
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};
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cci: cci@fd6e0000 {
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compatible = "arm,cci-400";
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reg = <0x0 0xfd6e0000 0x0 0x9000>;
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ranges = <0x0 0x0 0xfd6e0000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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pmu@9000 {
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compatible = "arm,cci-400-pmu,r1";
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reg = <0x9000 0x5000>;
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interrupt-parent = <&gic>;
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interrupts = <0 123 4>,
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<0 123 4>,
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<0 123 4>,
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<0 123 4>,
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<0 123 4>;
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};
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};
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/* GDMA */
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fpd_dma_chan1: dma@fd500000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xfd500000 0x0 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 124 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <128>;
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};
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fpd_dma_chan2: dma@fd510000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xfd510000 0x0 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 125 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <128>;
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};
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fpd_dma_chan3: dma@fd520000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xfd520000 0x0 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 126 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <128>;
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};
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fpd_dma_chan4: dma@fd530000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xfd530000 0x0 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 127 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <128>;
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};
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fpd_dma_chan5: dma@fd540000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xfd540000 0x0 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 128 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <128>;
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};
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fpd_dma_chan6: dma@fd550000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xfd550000 0x0 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 129 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <128>;
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};
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fpd_dma_chan7: dma@fd560000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xfd560000 0x0 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 130 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <128>;
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};
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fpd_dma_chan8: dma@fd570000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xfd570000 0x0 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 131 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <128>;
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};
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/* LPDDMA default allows only secured access. inorder to enable
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* These dma channels, Users should ensure that these dma
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* Channels are allowed for non secure access.
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*/
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lpd_dma_chan1: dma@ffa80000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xffa80000 0x0 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 77 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <64>;
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};
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lpd_dma_chan2: dma@ffa90000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xffa90000 0x0 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 78 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <64>;
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};
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lpd_dma_chan3: dma@ffaa0000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xffaa0000 0x0 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <0 79 4>;
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <64>;
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};
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lpd_dma_chan4: dma@ffab0000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xffab0000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
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interrupts = <0 80 4>;
|
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clock-names = "clk_main", "clk_apb";
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xlnx,bus-width = <64>;
|
||||
};
|
||||
|
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lpd_dma_chan5: dma@ffac0000 {
|
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status = "disabled";
|
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compatible = "xlnx,zynqmp-dma-1.0";
|
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reg = <0x0 0xffac0000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 81 4>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
xlnx,bus-width = <64>;
|
||||
};
|
||||
|
||||
lpd_dma_chan6: dma@ffad0000 {
|
||||
status = "disabled";
|
||||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xffad0000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 82 4>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
xlnx,bus-width = <64>;
|
||||
};
|
||||
|
||||
lpd_dma_chan7: dma@ffae0000 {
|
||||
status = "disabled";
|
||||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xffae0000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 83 4>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
xlnx,bus-width = <64>;
|
||||
};
|
||||
|
||||
lpd_dma_chan8: dma@ffaf0000 {
|
||||
status = "disabled";
|
||||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xffaf0000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 84 4>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
xlnx,bus-width = <64>;
|
||||
};
|
||||
|
||||
gem0: ethernet@ff0b0000 {
|
||||
compatible = "cdns,gem";
|
||||
status = "disabled";
|
||||
|
|
@ -215,12 +450,9 @@
|
|||
<0x0 0xfd480000 0x0 0x1000>,
|
||||
<0x80 0x00000000 0x0 0x1000000>;
|
||||
reg-names = "breg", "pcireg", "cfg";
|
||||
ranges = <0x02000000 0x00000000 0xe0000000 0x00000000
|
||||
0xe0000000 0x00000000 0x10000000
|
||||
/* non-prefetchable memory */
|
||||
0x43000000 0x00000006 0x00000000 0x00000006
|
||||
0x00000000 0x00000002 0x00000000>;
|
||||
/* prefetchable memory */
|
||||
ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */
|
||||
0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
|
||||
<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
|
||||
|
|
@ -233,6 +465,16 @@
|
|||
};
|
||||
};
|
||||
|
||||
rtc: rtc@ffa60000 {
|
||||
compatible = "xlnx,zynqmp-rtc";
|
||||
status = "disabled";
|
||||
reg = <0x0 0xffa60000 0x0 0x100>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 26 4>, <0 27 4>;
|
||||
interrupt-names = "alarm", "sec";
|
||||
calibration = <0x8000>;
|
||||
};
|
||||
|
||||
sata: ahci@fd0c0000 {
|
||||
compatible = "ceva,ahci-1v84";
|
||||
status = "disabled";
|
||||
|
|
@ -262,13 +504,14 @@
|
|||
smmu: smmu@fd800000 {
|
||||
compatible = "arm,mmu-500";
|
||||
reg = <0x0 0xfd800000 0x0 0x20000>;
|
||||
status = "disabled";
|
||||
#global-interrupts = <1>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 157 4>,
|
||||
<0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>,
|
||||
<0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>,
|
||||
<0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>,
|
||||
<0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>;
|
||||
interrupts = <0 155 4>,
|
||||
<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
|
||||
<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
|
||||
<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
|
||||
<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
|
||||
};
|
||||
|
||||
spi0: spi@ff040000 {
|
||||
|
|
@ -330,7 +573,7 @@
|
|||
};
|
||||
|
||||
uart0: serial@ff000000 {
|
||||
compatible = "cdns,uart-r1p8";
|
||||
compatible = "cdns,uart-r1p12", "xlnx,xuartps";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 21 4>;
|
||||
|
|
@ -339,7 +582,7 @@
|
|||
};
|
||||
|
||||
uart1: serial@ff010000 {
|
||||
compatible = "cdns,uart-r1p8";
|
||||
compatible = "cdns,uart-r1p12", "xlnx,xuartps";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 22 4>;
|
||||
|
|
|
|||
Loading…
Reference in New Issue