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mtd: rawnand: Get rid of chip->bits_per_cell 

Now that we inherit from nand_device, we can use
nand_device->memorg.bits_per_cell instead of having our own field at
the nand_chip level.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
This commit is contained in:
Boris Brezillon 2018-10-25 17:16:47 +02:00 committed by Miquel Raynal
parent 7beb37e5f0
commit 298151689b
6 changed files with 4 additions and 12 deletions
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4
drivers/mtd/nand/raw/nand_base.c
View File

@ -4457,7 +4457,6 @@ void nand_decode_ext_id(struct nand_chip *chip)
/* The 3rd id byte holds MLC / multichip data */
memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]);
chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]);
/* The 4th id byte is the important one */
extid = id_data[3];
@ -4501,7 +4500,6 @@ static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type)
/* All legacy ID NAND are small-page, SLC */
memorg->bits_per_cell = 1;
chip->bits_per_cell = 1;
}
/*
@ -4544,7 +4542,6 @@ static bool find_full_id_nand(struct nand_chip *chip,
mtd->oobsize = memorg->oobsize;
memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]);
chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]);
chip->chipsize = (uint64_t)type->chipsize << 20;
memorg->eraseblocks_per_lun =
DIV_ROUND_DOWN_ULL((u64)type->chipsize << 20,
@ -4584,7 +4581,6 @@ static void nand_manufacturer_detect(struct nand_chip *chip)
/* The 3rd id byte holds MLC / multichip data */
memorg->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]);
chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]);
chip->manufacturer.desc->ops->detect(chip);
} else {
nand_decode_ext_id(chip);

2
drivers/mtd/nand/raw/nand_hynix.c
View File

@ -592,7 +592,7 @@ static void hynix_nand_extract_scrambling_requirements(struct nand_chip *chip,
u8 nand_tech;
/* We need scrambling on all TLC NANDs*/
if (chip->bits_per_cell > 2)
if (nanddev_bits_per_cell(&chip->base) > 2)
chip->options |= NAND_NEED_SCRAMBLING;
/* And on MLC NANDs with sub-3xnm process */

1
drivers/mtd/nand/raw/nand_jedec.c
View File

@ -104,7 +104,6 @@ int nand_jedec_detect(struct nand_chip *chip)
chip->chipsize = memorg->eraseblocks_per_lun;
chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
memorg->bits_per_cell = p->bits_per_cell;
chip->bits_per_cell = p->bits_per_cell;
if (le16_to_cpu(p->features) & JEDEC_FEATURE_16_BIT_BUS)
chip->options |= NAND_BUSWIDTH_16;

2
drivers/mtd/nand/raw/nand_micron.c
View File

@ -385,7 +385,7 @@ static int micron_supports_on_die_ecc(struct nand_chip *chip)
if (!chip->parameters.onfi)
return MICRON_ON_DIE_UNSUPPORTED;
if (chip->bits_per_cell != 1)
if (nanddev_bits_per_cell(&chip->base) != 1)
return MICRON_ON_DIE_UNSUPPORTED;
/*

1
drivers/mtd/nand/raw/nand_onfi.c
View File

@ -249,7 +249,6 @@ int nand_onfi_detect(struct nand_chip *chip)
chip->chipsize = memorg->eraseblocks_per_lun;
chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
memorg->bits_per_cell = p->bits_per_cell;
chip->bits_per_cell = p->bits_per_cell;
if (le16_to_cpu(p->features) & ONFI_FEATURE_16_BIT_BUS)
chip->options |= NAND_BUSWIDTH_16;

6
include/linux/mtd/rawnand.h
View File

@ -992,7 +992,6 @@ struct nand_legacy {
* @badblockbits: [INTERN] minimum number of set bits in a good block's
* bad block marker position; i.e., BBM == 11110111b is
* not bad when badblockbits == 7
* @bits_per_cell: [INTERN] number of bits per cell. i.e., 1 means SLC.
* @ecc_strength_ds: [INTERN] ECC correctability from the datasheet.
* Minimum amount of bit errors per @ecc_step_ds guaranteed
* to be correctable. If unknown, set to zero.
@ -1064,7 +1063,6 @@ struct nand_chip {
} pagecache;
int subpagesize;
uint8_t bits_per_cell;
uint16_t ecc_strength_ds;
uint16_t ecc_step_ds;
int onfi_timing_mode_default;
@ -1236,9 +1234,9 @@ int nand_create_bbt(struct nand_chip *chip);
*/
static inline bool nand_is_slc(struct nand_chip *chip)
{
WARN(chip->bits_per_cell == 0,
WARN(nanddev_bits_per_cell(&chip->base) == 0,
"chip->bits_per_cell is used uninitialized\n");
return chip->bits_per_cell == 1;
return nanddev_bits_per_cell(&chip->base) == 1;
}
/**