dt-bindings: spi: mxic: Convert to yaml
Straightforward conversion from regular text to yaml schema of the Macronix SPI controller DT bindings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-9-miquel.raynal@bootlin.com
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/mxicy,mx25f0a-spi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Macronix SPI controller device tree bindings
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maintainers:
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- Miquel Raynal <miquel.raynal@bootlin.com>
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allOf:
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- $ref: "spi-controller.yaml#"
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properties:
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compatible:
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const: mxicy,mx25f0a-spi
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reg:
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minItems: 2
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maxItems: 2
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reg-names:
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items:
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- const: regs
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- const: dirmap
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interrupts:
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maxItems: 1
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clocks:
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minItems: 3
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maxItems: 3
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clock-names:
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items:
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- const: send_clk
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- const: send_dly_clk
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- const: ps_clk
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required:
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- compatible
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- reg
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- reg-names
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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spi@43c30000 {
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compatible = "mxicy,mx25f0a-spi";
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reg = <0x43c30000 0x10000>, <0xa0000000 0x20000000>;
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reg-names = "regs", "dirmap";
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clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 18>;
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clock-names = "send_clk", "send_dly_clk", "ps_clk";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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Macronix SPI controller Device Tree Bindings
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--------------------------------------------
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Required properties:
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- compatible: should be "mxicy,mx25f0a-spi"
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- #address-cells: should be 1
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- #size-cells: should be 0
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- reg: should contain 2 entries, one for the registers and one for the direct
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mapping area
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- reg-names: should contain "regs" and "dirmap"
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- clock-names: should contain "ps_clk", "send_clk" and "send_dly_clk"
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- clocks: should contain 3 entries for the "ps_clk", "send_clk" and
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"send_dly_clk" clocks
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Optional properties:
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- interrupts: interrupt line connected to the SPI controller
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Example:
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spi@43c30000 {
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compatible = "mxicy,mx25f0a-spi";
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reg = <0x43c30000 0x10000>, <0xa0000000 0x20000000>;
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reg-names = "regs", "dirmap";
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clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 18>;
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clock-names = "send_clk", "send_dly_clk", "ps_clk";
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#address-cells = <1>;
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#size-cells = <0>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <25000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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};
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};
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