net: hns3: add device version to replace pci revision
To better identify the device version, struct hnae3_handle adds a member dev_version to replace pci revision. The dev_version consists of hardware version and PCI revision. The hardware version is queried from firmware by an existing firmware version query command. Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
090bc03bc9
commit
295ba232a8
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@ -34,6 +34,13 @@
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#define HNAE3_MIN_VECTOR_NUM 2 /* first one for misc, another for IO */
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/* Device version */
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#define HNAE3_DEVICE_VERSION_V1 0x00020
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#define HNAE3_DEVICE_VERSION_V2 0x00021
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#define HNAE3_DEVICE_VERSION_V3 0x00030
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#define HNAE3_PCI_REVISION_BIT_SIZE 8
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/* Device IDs */
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#define HNAE3_DEV_ID_GE 0xA220
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#define HNAE3_DEV_ID_25GE 0xA221
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@ -235,6 +242,7 @@ struct hnae3_ae_dev {
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struct list_head node;
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u32 flag;
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unsigned long hw_err_reset_req;
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u32 dev_version;
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void *priv;
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};
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@ -629,9 +629,11 @@ void hns3_enable_vlan_filter(struct net_device *netdev, bool enable)
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{
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struct hns3_nic_priv *priv = netdev_priv(netdev);
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struct hnae3_handle *h = priv->ae_handle;
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struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h->pdev);
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bool last_state;
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if (h->pdev->revision >= 0x21 && h->ae_algo->ops->enable_vlan_filter) {
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if (ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2 &&
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h->ae_algo->ops->enable_vlan_filter) {
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last_state = h->netdev_flags & HNAE3_VLAN_FLTR ? true : false;
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if (enable != last_state) {
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netdev_info(netdev,
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@ -2265,6 +2267,7 @@ static void hns3_set_default_feature(struct net_device *netdev)
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{
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struct hnae3_handle *h = hns3_get_handle(netdev);
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struct pci_dev *pdev = h->pdev;
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struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
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netdev->priv_flags |= IFF_UNICAST_FLT;
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@ -2302,7 +2305,7 @@ static void hns3_set_default_feature(struct net_device *netdev)
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NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC |
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NETIF_F_FRAGLIST;
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if (pdev->revision >= 0x21) {
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if (ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) {
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netdev->hw_features |= NETIF_F_GRO_HW;
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netdev->features |= NETIF_F_GRO_HW;
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@ -2801,8 +2804,9 @@ static bool hns3_parse_vlan_tag(struct hns3_enet_ring *ring,
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{
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struct hnae3_handle *handle = ring->tqp->handle;
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struct pci_dev *pdev = ring->tqp->handle->pdev;
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struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
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if (pdev->revision == 0x20) {
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if (unlikely(ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2)) {
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*vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
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if (!(*vlan_tag & VLAN_VID_MASK))
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*vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
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@ -77,6 +77,7 @@ static const struct hns3_stats hns3_rxq_stats[] = {
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static int hns3_lp_setup(struct net_device *ndev, enum hnae3_loop loop, bool en)
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{
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struct hnae3_handle *h = hns3_get_handle(ndev);
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struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h->pdev);
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bool vlan_filter_enable;
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int ret;
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@ -96,7 +97,7 @@ static int hns3_lp_setup(struct net_device *ndev, enum hnae3_loop loop, bool en)
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break;
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}
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if (ret || h->pdev->revision >= 0x21)
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if (ret || ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2)
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return ret;
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if (en) {
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@ -147,6 +148,7 @@ static void hns3_lp_setup_skb(struct sk_buff *skb)
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struct net_device *ndev = skb->dev;
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struct hnae3_handle *handle;
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struct hnae3_ae_dev *ae_dev;
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unsigned char *packet;
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struct ethhdr *ethh;
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unsigned int i;
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@ -163,7 +165,8 @@ static void hns3_lp_setup_skb(struct sk_buff *skb)
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* the purpose of mac or serdes selftest.
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*/
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handle = hns3_get_handle(ndev);
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if (handle->pdev->revision == 0x20)
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ae_dev = pci_get_drvdata(handle->pdev);
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if (ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2)
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ethh->h_dest[5] += HNS3_NIC_LB_DST_MAC_ADDR;
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eth_zero_addr(ethh->h_source);
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ethh->h_proto = htons(ETH_P_ARP);
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@ -761,6 +764,7 @@ static int hns3_set_link_ksettings(struct net_device *netdev,
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const struct ethtool_link_ksettings *cmd)
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{
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struct hnae3_handle *handle = hns3_get_handle(netdev);
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struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
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const struct hnae3_ae_ops *ops = handle->ae_algo->ops;
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int ret;
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@ -782,7 +786,7 @@ static int hns3_set_link_ksettings(struct net_device *netdev,
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return phy_ethtool_ksettings_set(netdev->phydev, cmd);
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}
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if (handle->pdev->revision == 0x20)
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if (ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2)
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return -EOPNOTSUPP;
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ret = hns3_check_ksettings_param(netdev, cmd);
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@ -846,11 +850,12 @@ static int hns3_set_rss(struct net_device *netdev, const u32 *indir,
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const u8 *key, const u8 hfunc)
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{
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struct hnae3_handle *h = hns3_get_handle(netdev);
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struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h->pdev);
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if (!h->ae_algo->ops->set_rss)
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return -EOPNOTSUPP;
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if ((h->pdev->revision == 0x20 &&
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if ((ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2 &&
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hfunc != ETH_RSS_HASH_TOP) || (hfunc != ETH_RSS_HASH_NO_CHANGE &&
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hfunc != ETH_RSS_HASH_TOP && hfunc != ETH_RSS_HASH_XOR)) {
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netdev_err(netdev, "hash func not supported\n");
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@ -1404,11 +1409,13 @@ static int hns3_get_module_info(struct net_device *netdev,
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#define HNS3_SFF_8636_V1_3 0x03
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struct hnae3_handle *handle = hns3_get_handle(netdev);
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struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
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const struct hnae3_ae_ops *ops = handle->ae_algo->ops;
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struct hns3_sfp_type sfp_type;
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int ret;
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if (handle->pdev->revision == 0x20 || !ops->get_module_eeprom)
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if (ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2 ||
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!ops->get_module_eeprom)
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return -EOPNOTSUPP;
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memset(&sfp_type, 0, sizeof(sfp_type));
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@ -1452,9 +1459,11 @@ static int hns3_get_module_eeprom(struct net_device *netdev,
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struct ethtool_eeprom *ee, u8 *data)
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{
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struct hnae3_handle *handle = hns3_get_handle(netdev);
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struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
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const struct hnae3_ae_ops *ops = handle->ae_algo->ops;
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if (handle->pdev->revision == 0x20 || !ops->get_module_eeprom)
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if (ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2 ||
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!ops->get_module_eeprom)
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return -EOPNOTSUPP;
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if (!ee->len)
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@ -330,9 +330,9 @@ int hclge_cmd_send(struct hclge_hw *hw, struct hclge_desc *desc, int num)
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return retval;
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}
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static enum hclge_cmd_status hclge_cmd_query_firmware_version(
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struct hclge_hw *hw, u32 *version)
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static enum hclge_cmd_status hclge_cmd_query_version(struct hclge_dev *hdev)
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{
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struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev);
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struct hclge_query_version_cmd *resp;
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struct hclge_desc desc;
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int ret;
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@ -340,9 +340,15 @@ static enum hclge_cmd_status hclge_cmd_query_firmware_version(
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hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_QUERY_FW_VER, 1);
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resp = (struct hclge_query_version_cmd *)desc.data;
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ret = hclge_cmd_send(hw, &desc, 1);
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if (!ret)
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*version = le32_to_cpu(resp->firmware);
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ret = hclge_cmd_send(&hdev->hw, &desc, 1);
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if (ret)
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return ret;
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hdev->fw_version = le32_to_cpu(resp->firmware);
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ae_dev->dev_version = le32_to_cpu(resp->hardware) <<
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HNAE3_PCI_REVISION_BIT_SIZE;
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ae_dev->dev_version |= hdev->pdev->revision;
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return ret;
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}
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@ -402,7 +408,6 @@ static int hclge_firmware_compat_config(struct hclge_dev *hdev)
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int hclge_cmd_init(struct hclge_dev *hdev)
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{
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u32 version;
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int ret;
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spin_lock_bh(&hdev->hw.cmq.csq.lock);
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@ -431,22 +436,21 @@ int hclge_cmd_init(struct hclge_dev *hdev)
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goto err_cmd_init;
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}
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ret = hclge_cmd_query_firmware_version(&hdev->hw, &version);
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ret = hclge_cmd_query_version(hdev);
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if (ret) {
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dev_err(&hdev->pdev->dev,
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"firmware version query failed %d\n", ret);
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"failed to query version ret=%d\n", ret);
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goto err_cmd_init;
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}
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hdev->fw_version = version;
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dev_info(&hdev->pdev->dev, "The firmware version is %lu.%lu.%lu.%lu\n",
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hnae3_get_field(version, HNAE3_FW_VERSION_BYTE3_MASK,
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hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE3_MASK,
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HNAE3_FW_VERSION_BYTE3_SHIFT),
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hnae3_get_field(version, HNAE3_FW_VERSION_BYTE2_MASK,
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hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE2_MASK,
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HNAE3_FW_VERSION_BYTE2_SHIFT),
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hnae3_get_field(version, HNAE3_FW_VERSION_BYTE1_MASK,
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hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE1_MASK,
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HNAE3_FW_VERSION_BYTE1_SHIFT),
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hnae3_get_field(version, HNAE3_FW_VERSION_BYTE0_MASK,
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hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE0_MASK,
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HNAE3_FW_VERSION_BYTE0_SHIFT));
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/* ask the firmware to enable some features, driver can work without
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@ -364,7 +364,8 @@ struct hclge_rx_priv_buff_cmd {
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struct hclge_query_version_cmd {
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__le32 firmware;
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__le32 firmware_rsv[5];
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__le32 hardware;
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__le32 rsv[4];
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};
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#define HCLGE_RX_PRIV_EN_B 15
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@ -729,7 +729,7 @@ static int hclge_config_ncsi_hw_err_int(struct hclge_dev *hdev, bool en)
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struct hclge_desc desc;
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int ret;
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if (hdev->pdev->revision < 0x21)
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if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2)
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return 0;
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/* configure NCSI error interrupts */
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@ -808,7 +808,7 @@ static int hclge_config_ppp_error_interrupt(struct hclge_dev *hdev, u32 cmd,
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cpu_to_le32(HCLGE_PPP_MPF_ECC_ERR_INT0_EN_MASK);
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desc[1].data[1] =
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cpu_to_le32(HCLGE_PPP_MPF_ECC_ERR_INT1_EN_MASK);
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if (hdev->pdev->revision >= 0x21)
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if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2)
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desc[1].data[2] =
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cpu_to_le32(HCLGE_PPP_PF_ERR_INT_EN_MASK);
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} else if (cmd == HCLGE_PPP_CMD1_INT_CMD) {
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@ -1041,7 +1041,7 @@ static int hclge_config_ssu_hw_err_int(struct hclge_dev *hdev, bool en)
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hclge_cmd_setup_basic_desc(&desc[1], HCLGE_SSU_COMMON_INT_CMD, false);
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if (en) {
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if (hdev->pdev->revision >= 0x21)
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if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2)
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desc[0].data[0] =
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cpu_to_le32(HCLGE_SSU_COMMON_INT_EN);
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else
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@ -1550,7 +1550,8 @@ int hclge_config_rocee_ras_interrupt(struct hclge_dev *hdev, bool en)
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struct hclge_desc desc;
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int ret;
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if (hdev->pdev->revision < 0x21 || !hnae3_dev_roce_supported(hdev))
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if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2 ||
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!hnae3_dev_roce_supported(hdev))
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return 0;
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hclge_cmd_setup_basic_desc(&desc, HCLGE_CONFIG_ROCEE_RAS_INT_EN, false);
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@ -1663,7 +1664,7 @@ pci_ers_result_t hclge_handle_hw_ras_error(struct hnae3_ae_dev *ae_dev)
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}
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/* Handling Non-fatal Rocee RAS errors */
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if (hdev->pdev->revision >= 0x21 &&
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if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2 &&
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status & HCLGE_RAS_REG_ROCEE_ERR_MASK) {
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dev_err(dev, "ROCEE Non-Fatal RAS error identified\n");
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hclge_handle_rocee_ras_error(ae_dev);
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@ -740,7 +740,7 @@ static int hclge_get_sset_count(struct hnae3_handle *handle, int stringset)
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if (stringset == ETH_SS_TEST) {
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/* clear loopback bit flags at first */
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handle->flags = (handle->flags & (~HCLGE_LOOPBACK_TEST_FLAGS));
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if (hdev->pdev->revision >= 0x21 ||
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if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2 ||
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hdev->hw.mac.speed == HCLGE_MAC_SPEED_10M ||
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hdev->hw.mac.speed == HCLGE_MAC_SPEED_100M ||
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hdev->hw.mac.speed == HCLGE_MAC_SPEED_1G) {
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@ -2892,7 +2892,7 @@ static int hclge_update_port_info(struct hclge_dev *hdev)
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if (!hdev->support_sfp_query)
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return 0;
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if (hdev->pdev->revision >= 0x21)
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if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2)
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ret = hclge_get_sfp_info(hdev, mac);
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else
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ret = hclge_get_sfp_speed(hdev, &speed);
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@ -2904,7 +2904,7 @@ static int hclge_update_port_info(struct hclge_dev *hdev)
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return ret;
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}
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if (hdev->pdev->revision >= 0x21) {
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if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) {
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if (mac->speed_type == QUERY_ACTIVE_SPEED) {
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hclge_update_port_capability(mac);
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return 0;
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@ -3569,7 +3569,7 @@ static void hclge_clear_reset_cause(struct hclge_dev *hdev)
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/* For revision 0x20, the reset interrupt source
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* can only be cleared after hardware reset done
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*/
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if (hdev->pdev->revision == 0x20)
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if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2)
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hclge_write_dev(&hdev->hw, HCLGE_MISC_RESET_STS_REG,
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clearval);
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@ -4576,7 +4576,7 @@ static void hclge_rss_init_cfg(struct hclge_dev *hdev)
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int i, rss_algo = HCLGE_RSS_HASH_ALGO_TOEPLITZ;
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struct hclge_vport *vport = hdev->vport;
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if (hdev->pdev->revision >= 0x21)
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if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2)
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rss_algo = HCLGE_RSS_HASH_ALGO_SIMPLE;
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for (i = 0; i < hdev->num_vmdq_vport + 1; i++) {
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@ -4776,13 +4776,14 @@ static int hclge_set_promisc_mode(struct hnae3_handle *handle, bool en_uc_pmc,
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bool en_mc_pmc)
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{
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struct hclge_vport *vport = hclge_get_vport(handle);
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struct hclge_dev *hdev = vport->back;
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bool en_bc_pmc = true;
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/* For revision 0x20, if broadcast promisc enabled, vlan filter is
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* always bypassed. So broadcast promisc should be disabled until
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* user enable promisc mode
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/* For device whose version below V2, if broadcast promisc enabled,
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* vlan filter is always bypassed. So broadcast promisc should be
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* disabled until user enable promisc mode
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*/
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if (handle->pdev->revision == 0x20)
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if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2)
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en_bc_pmc = handle->netdev_flags & HNAE3_BPE ? true : false;
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return hclge_set_vport_promisc_mode(vport, en_uc_pmc, en_mc_pmc,
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||||
|
@ -6797,7 +6798,7 @@ static int hclge_set_loopback(struct hnae3_handle *handle,
|
|||
* the same, the packets are looped back in the SSU. If SSU loopback
|
||||
* is disabled, packets can reach MAC even if SMAC is the same as DMAC.
|
||||
*/
|
||||
if (hdev->pdev->revision >= 0x21) {
|
||||
if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) {
|
||||
u8 switch_param = en ? 0 : BIT(HCLGE_SWITCH_ALW_LPBK_B);
|
||||
|
||||
ret = hclge_config_switch_param(hdev, PF_VPORT_ID, switch_param,
|
||||
|
@ -8299,7 +8300,7 @@ static void hclge_enable_vlan_filter(struct hnae3_handle *handle, bool enable)
|
|||
struct hclge_vport *vport = hclge_get_vport(handle);
|
||||
struct hclge_dev *hdev = vport->back;
|
||||
|
||||
if (hdev->pdev->revision >= 0x21) {
|
||||
if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) {
|
||||
hclge_set_vlan_filter_ctrl(hdev, HCLGE_FILTER_TYPE_VF,
|
||||
HCLGE_FILTER_FE_EGRESS, enable, 0);
|
||||
hclge_set_vlan_filter_ctrl(hdev, HCLGE_FILTER_TYPE_PORT,
|
||||
|
@ -8659,7 +8660,7 @@ static int hclge_init_vlan_config(struct hclge_dev *hdev)
|
|||
int ret;
|
||||
int i;
|
||||
|
||||
if (hdev->pdev->revision >= 0x21) {
|
||||
if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) {
|
||||
/* for revision 0x21, vf vlan filter is per function */
|
||||
for (i = 0; i < hdev->num_alloc_vport; i++) {
|
||||
vport = &hdev->vport[i];
|
||||
|
@ -9014,7 +9015,7 @@ static int hclge_set_vf_vlan_filter(struct hnae3_handle *handle, int vfid,
|
|||
u16 state;
|
||||
int ret;
|
||||
|
||||
if (hdev->pdev->revision == 0x20)
|
||||
if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
vport = hclge_get_vf_vport(hdev, vfid);
|
||||
|
@ -10186,7 +10187,7 @@ static int hclge_set_vf_spoofchk(struct hnae3_handle *handle, int vf,
|
|||
u32 new_spoofchk = enable ? 1 : 0;
|
||||
int ret;
|
||||
|
||||
if (hdev->pdev->revision == 0x20)
|
||||
if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
vport = hclge_get_vf_vport(hdev, vf);
|
||||
|
@ -10219,7 +10220,7 @@ static int hclge_reset_vport_spoofchk(struct hclge_dev *hdev)
|
|||
int ret;
|
||||
int i;
|
||||
|
||||
if (hdev->pdev->revision == 0x20)
|
||||
if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2)
|
||||
return 0;
|
||||
|
||||
/* resume the vf spoof check state after reset */
|
||||
|
@ -10239,6 +10240,7 @@ static int hclge_set_vf_trust(struct hnae3_handle *handle, int vf, bool enable)
|
|||
{
|
||||
struct hclge_vport *vport = hclge_get_vport(handle);
|
||||
struct hclge_dev *hdev = vport->back;
|
||||
struct hnae3_ae_dev *ae_dev = hdev->ae_dev;
|
||||
u32 new_trusted = enable ? 1 : 0;
|
||||
bool en_bc_pmc;
|
||||
int ret;
|
||||
|
@ -10252,7 +10254,7 @@ static int hclge_set_vf_trust(struct hnae3_handle *handle, int vf, bool enable)
|
|||
|
||||
/* Disable promisc mode for VF if it is not trusted any more. */
|
||||
if (!enable && vport->vf_info.promisc_enable) {
|
||||
en_bc_pmc = hdev->pdev->revision != 0x20;
|
||||
en_bc_pmc = ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2;
|
||||
ret = hclge_set_vport_promisc_mode(vport, false, false,
|
||||
en_bc_pmc);
|
||||
if (ret)
|
||||
|
|
|
@ -313,9 +313,9 @@ int hclgevf_cmd_send(struct hclgevf_hw *hw, struct hclgevf_desc *desc, int num)
|
|||
return status;
|
||||
}
|
||||
|
||||
static int hclgevf_cmd_query_firmware_version(struct hclgevf_hw *hw,
|
||||
u32 *version)
|
||||
static int hclgevf_cmd_query_version(struct hclgevf_dev *hdev)
|
||||
{
|
||||
struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev);
|
||||
struct hclgevf_query_version_cmd *resp;
|
||||
struct hclgevf_desc desc;
|
||||
int status;
|
||||
|
@ -323,9 +323,15 @@ static int hclgevf_cmd_query_firmware_version(struct hclgevf_hw *hw,
|
|||
resp = (struct hclgevf_query_version_cmd *)desc.data;
|
||||
|
||||
hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_QUERY_FW_VER, 1);
|
||||
status = hclgevf_cmd_send(hw, &desc, 1);
|
||||
if (!status)
|
||||
*version = le32_to_cpu(resp->firmware);
|
||||
status = hclgevf_cmd_send(&hdev->hw, &desc, 1);
|
||||
if (status)
|
||||
return status;
|
||||
|
||||
hdev->fw_version = le32_to_cpu(resp->firmware);
|
||||
|
||||
ae_dev->dev_version = le32_to_cpu(resp->hardware) <<
|
||||
HNAE3_PCI_REVISION_BIT_SIZE;
|
||||
ae_dev->dev_version |= hdev->pdev->revision;
|
||||
|
||||
return status;
|
||||
}
|
||||
|
@ -364,7 +370,6 @@ err_csq:
|
|||
|
||||
int hclgevf_cmd_init(struct hclgevf_dev *hdev)
|
||||
{
|
||||
u32 version;
|
||||
int ret;
|
||||
|
||||
spin_lock_bh(&hdev->hw.cmq.csq.lock);
|
||||
|
@ -395,23 +400,20 @@ int hclgevf_cmd_init(struct hclgevf_dev *hdev)
|
|||
goto err_cmd_init;
|
||||
}
|
||||
|
||||
/* get firmware version */
|
||||
ret = hclgevf_cmd_query_firmware_version(&hdev->hw, &version);
|
||||
ret = hclgevf_cmd_query_version(hdev);
|
||||
if (ret) {
|
||||
dev_err(&hdev->pdev->dev,
|
||||
"failed(%d) to query firmware version\n", ret);
|
||||
dev_err(&hdev->pdev->dev, "failed(%d) to query version\n", ret);
|
||||
goto err_cmd_init;
|
||||
}
|
||||
hdev->fw_version = version;
|
||||
|
||||
dev_info(&hdev->pdev->dev, "The firmware version is %lu.%lu.%lu.%lu\n",
|
||||
hnae3_get_field(version, HNAE3_FW_VERSION_BYTE3_MASK,
|
||||
hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE3_MASK,
|
||||
HNAE3_FW_VERSION_BYTE3_SHIFT),
|
||||
hnae3_get_field(version, HNAE3_FW_VERSION_BYTE2_MASK,
|
||||
hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE2_MASK,
|
||||
HNAE3_FW_VERSION_BYTE2_SHIFT),
|
||||
hnae3_get_field(version, HNAE3_FW_VERSION_BYTE1_MASK,
|
||||
hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE1_MASK,
|
||||
HNAE3_FW_VERSION_BYTE1_SHIFT),
|
||||
hnae3_get_field(version, HNAE3_FW_VERSION_BYTE0_MASK,
|
||||
hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE0_MASK,
|
||||
HNAE3_FW_VERSION_BYTE0_SHIFT));
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -143,7 +143,8 @@ struct hclgevf_ctrl_vector_chain {
|
|||
|
||||
struct hclgevf_query_version_cmd {
|
||||
__le32 firmware;
|
||||
__le32 firmware_rsv[5];
|
||||
__le32 hardware;
|
||||
__le32 rsv[4];
|
||||
};
|
||||
|
||||
#define HCLGEVF_MSIX_OFT_ROCEE_S 0
|
||||
|
|
|
@ -746,7 +746,7 @@ static int hclgevf_get_rss(struct hnae3_handle *handle, u32 *indir, u8 *key,
|
|||
struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg;
|
||||
int i, ret;
|
||||
|
||||
if (handle->pdev->revision >= 0x21) {
|
||||
if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) {
|
||||
/* Get hash algorithm */
|
||||
if (hfunc) {
|
||||
switch (rss_cfg->hash_algo) {
|
||||
|
@ -792,7 +792,7 @@ static int hclgevf_set_rss(struct hnae3_handle *handle, const u32 *indir,
|
|||
struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg;
|
||||
int ret, i;
|
||||
|
||||
if (handle->pdev->revision >= 0x21) {
|
||||
if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) {
|
||||
/* Set the RSS Hash Key if specififed by the user */
|
||||
if (key) {
|
||||
switch (hfunc) {
|
||||
|
@ -864,7 +864,7 @@ static int hclgevf_set_rss_tuple(struct hnae3_handle *handle,
|
|||
u8 tuple_sets;
|
||||
int ret;
|
||||
|
||||
if (handle->pdev->revision == 0x20)
|
||||
if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
if (nfc->data &
|
||||
|
@ -942,7 +942,7 @@ static int hclgevf_get_rss_tuple(struct hnae3_handle *handle,
|
|||
struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg;
|
||||
u8 tuple_sets;
|
||||
|
||||
if (handle->pdev->revision == 0x20)
|
||||
if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
nfc->data = 0;
|
||||
|
@ -1155,10 +1155,9 @@ static int hclgevf_set_promisc_mode(struct hnae3_handle *handle, bool en_uc_pmc,
|
|||
bool en_mc_pmc)
|
||||
{
|
||||
struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
|
||||
struct pci_dev *pdev = hdev->pdev;
|
||||
bool en_bc_pmc;
|
||||
|
||||
en_bc_pmc = pdev->revision != 0x20;
|
||||
en_bc_pmc = hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2;
|
||||
|
||||
return hclgevf_cmd_set_promisc_mode(hdev, en_uc_pmc, en_mc_pmc,
|
||||
en_bc_pmc);
|
||||
|
@ -2288,7 +2287,7 @@ static enum hclgevf_evt_cause hclgevf_check_evt_cause(struct hclgevf_dev *hdev,
|
|||
* register, so we should just write 0 to the bit we are
|
||||
* handling, and keep other bits as cmdq_stat_reg.
|
||||
*/
|
||||
if (hdev->pdev->revision >= 0x21)
|
||||
if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2)
|
||||
*clearval = ~(1U << HCLGEVF_VECTOR0_RX_CMDQ_INT_B);
|
||||
else
|
||||
*clearval = cmdq_stat_reg &
|
||||
|
@ -2431,7 +2430,7 @@ static void hclgevf_rss_init_cfg(struct hclgevf_dev *hdev)
|
|||
rss_cfg->hash_algo = HCLGEVF_RSS_HASH_ALGO_TOEPLITZ;
|
||||
rss_cfg->rss_size = hdev->nic.kinfo.rss_size;
|
||||
tuple_sets = &rss_cfg->rss_tuple_sets;
|
||||
if (hdev->pdev->revision >= 0x21) {
|
||||
if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) {
|
||||
rss_cfg->hash_algo = HCLGEVF_RSS_HASH_ALGO_SIMPLE;
|
||||
memcpy(rss_cfg->rss_hash_key, hclgevf_hash_key,
|
||||
HCLGEVF_RSS_KEY_SIZE);
|
||||
|
@ -2456,7 +2455,7 @@ static int hclgevf_rss_init_hw(struct hclgevf_dev *hdev)
|
|||
struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg;
|
||||
int ret;
|
||||
|
||||
if (hdev->pdev->revision >= 0x21) {
|
||||
if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) {
|
||||
ret = hclgevf_set_rss_algo_key(hdev, rss_cfg->hash_algo,
|
||||
rss_cfg->rss_hash_key);
|
||||
if (ret)
|
||||
|
|
Loading…
Reference in New Issue