OMAP: DSS2: Add FEAT_DSI_REVERSE_TXCLKESC
OMAP3430 has RESETDONETXCLKESCx bits in the order following bitnumber order for lanes 0, 1, 2: 28, 27, 26. OMAP3630 and later have them in saner order: 24, 25, 26 (and 27, 28 for OMAP4). This patch adds a dss_feature that can be used to differentiate between those two orders of RESETDONETXCLKESCx bits. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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@ -253,7 +253,7 @@ static struct omap_dss_features omap3430_dss_features = {
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FEAT_LCDENABLESIGNAL | FEAT_PCKFREEENABLE |
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FEAT_FUNCGATED | FEAT_ROWREPEATENABLE |
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FEAT_LINEBUFFERSPLIT | FEAT_RESIZECONF |
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FEAT_DSI_PLL_FREQSEL,
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FEAT_DSI_PLL_FREQSEL | FEAT_DSI_REVERSE_TXCLKESC,
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.num_mgrs = 2,
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.num_ovls = 3,
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@ -45,6 +45,7 @@ enum dss_feat_id {
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FEAT_DSI_PLL_FREQSEL = 1 << 14,
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FEAT_DSI_DCS_CMD_CONFIG_VC = 1 << 15,
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FEAT_DSI_VC_OCP_WIDTH = 1 << 16,
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FEAT_DSI_REVERSE_TXCLKESC = 1 << 17,
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};
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/* DSS register field id */
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