ASoC: tlv320dac33: Add new FIFO mode: mode 7
Mode 7 of tlv320dac33 operates in the following way: The codec is in master mode. Host configures upper and lower thresholds in tlv320dac33 During playback the codec will clock in the data until the upper threshold is reached in FIFO. At this point the codec stops the colocks on the serial bus. When the FIFO fill is reaching the lower threshold limit the codec will enable the clocks on the serial bus, and clocks in data till the upper threshold is reached. In this mode, we can also request interrupts for threshold events (upper, lower and alarm), which could be used for power management. At this point the interrupts are not enabled for this mode, but it can be taken into use in the future, when the surrounding code makes it possible to use it. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: Liam Girdwood <lrg@slimlogic.oc.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@ -62,6 +62,7 @@ enum dac33_state {
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enum dac33_fifo_modes {
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DAC33_FIFO_BYPASS = 0,
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DAC33_FIFO_MODE1,
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DAC33_FIFO_MODE7,
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DAC33_FIFO_LAST_MODE,
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};
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@ -422,7 +423,7 @@ static int dac33_set_fifo_mode(struct snd_kcontrol *kcontrol,
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/* Codec operation modes */
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static const char *dac33_fifo_mode_texts[] = {
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"Bypass", "Mode 1"
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"Bypass", "Mode 1", "Mode 7"
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};
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static const struct soc_enum dac33_fifo_mode_enum =
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@ -556,6 +557,10 @@ static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33)
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dac33_write16(codec, DAC33_PREFILL_MSB,
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DAC33_THRREG(dac33->alarm_threshold));
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break;
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case DAC33_FIFO_MODE7:
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dac33_write16(codec, DAC33_PREFILL_MSB,
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DAC33_THRREG(20));
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break;
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default:
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dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
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dac33->fifo_mode);
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@ -574,6 +579,9 @@ static inline void dac33_playback_handler(struct tlv320dac33_priv *dac33)
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dac33_write16(codec, DAC33_NSAMPLE_MSB,
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DAC33_THRREG(dac33->nsample));
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break;
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case DAC33_FIFO_MODE7:
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/* At the moment we are not using interrupts in mode7 */
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break;
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default:
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dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
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dac33->fifo_mode);
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@ -788,6 +796,10 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
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DAC33_ATM(DAC33_FIFO_IRQ_MODE_LEVEL));
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dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MAT);
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break;
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case DAC33_FIFO_MODE7:
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/* Disable all interrupts */
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dac33_write(codec, DAC33_FIFO_IRQ_MASK, 0);
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break;
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default:
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/* in FIFO bypass mode, the interrupts are not used */
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break;
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@ -807,6 +819,17 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
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fifoctrl_a &= ~DAC33_FAUTO;
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aictrl_b &= ~DAC33_BCLKON;
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break;
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case DAC33_FIFO_MODE7:
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/*
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* For mode1:
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* Disable the FIFO bypass (Enable the use of FIFO)
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* Select Threshold mode
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* BCLK is only running when data is needed by DAC33
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*/
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fifoctrl_a &= ~DAC33_FBYPAS;
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fifoctrl_a |= DAC33_FAUTO;
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aictrl_b &= ~DAC33_BCLKON;
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break;
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default:
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/*
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* For FIFO bypass mode:
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@ -830,6 +853,16 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
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dac33_write16(codec, DAC33_ATHR_MSB,
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DAC33_THRREG(dac33->alarm_threshold));
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break;
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case DAC33_FIFO_MODE7:
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/*
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* Configure the threshold levels, and leave 10 sample space
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* at the bottom, and also at the top of the FIFO
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*/
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dac33_write16(codec, DAC33_UTHR_MSB,
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DAC33_THRREG(DAC33_BUFFER_SIZE_SAMPLES - 10));
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dac33_write16(codec, DAC33_LTHR_MSB,
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DAC33_THRREG(10));
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break;
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default:
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/* BYPASS mode */
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dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32);
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