mmc: sdhci: Tidy caps variables in sdhci_setup_host()
In preparation for adding a function to read the capability registers. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
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8cb851a4da
commit
28da35899e
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@ -2844,7 +2844,6 @@ static int sdhci_set_dma_mask(struct sdhci_host *host)
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int sdhci_setup_host(struct sdhci_host *host)
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int sdhci_setup_host(struct sdhci_host *host)
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{
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{
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struct mmc_host *mmc;
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struct mmc_host *mmc;
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u32 caps[2] = {0, 0};
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u32 max_current_caps;
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u32 max_current_caps;
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unsigned int ocr_avail;
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unsigned int ocr_avail;
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unsigned int override_timeout_clk;
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unsigned int override_timeout_clk;
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@ -2874,17 +2873,15 @@ int sdhci_setup_host(struct sdhci_host *host)
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mmc_hostname(mmc), host->version);
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mmc_hostname(mmc), host->version);
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}
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}
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caps[0] = (host->quirks & SDHCI_QUIRK_MISSING_CAPS) ? host->caps :
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if (!(host->quirks & SDHCI_QUIRK_MISSING_CAPS)) {
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sdhci_readl(host, SDHCI_CAPABILITIES);
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host->caps = sdhci_readl(host, SDHCI_CAPABILITIES);
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if (host->version >= SDHCI_SPEC_300)
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if (host->version >= SDHCI_SPEC_300)
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host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
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caps[1] = (host->quirks & SDHCI_QUIRK_MISSING_CAPS) ?
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}
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host->caps1 :
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sdhci_readl(host, SDHCI_CAPABILITIES_1);
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if (host->quirks & SDHCI_QUIRK_FORCE_DMA)
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if (host->quirks & SDHCI_QUIRK_FORCE_DMA)
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host->flags |= SDHCI_USE_SDMA;
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host->flags |= SDHCI_USE_SDMA;
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else if (!(caps[0] & SDHCI_CAN_DO_SDMA))
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else if (!(host->caps & SDHCI_CAN_DO_SDMA))
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DBG("Controller doesn't have SDMA capability\n");
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DBG("Controller doesn't have SDMA capability\n");
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else
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else
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host->flags |= SDHCI_USE_SDMA;
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host->flags |= SDHCI_USE_SDMA;
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@ -2896,7 +2893,7 @@ int sdhci_setup_host(struct sdhci_host *host)
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}
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}
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if ((host->version >= SDHCI_SPEC_200) &&
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if ((host->version >= SDHCI_SPEC_200) &&
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(caps[0] & SDHCI_CAN_DO_ADMA2))
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(host->caps & SDHCI_CAN_DO_ADMA2))
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host->flags |= SDHCI_USE_ADMA;
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host->flags |= SDHCI_USE_ADMA;
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if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) &&
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if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) &&
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@ -2912,7 +2909,7 @@ int sdhci_setup_host(struct sdhci_host *host)
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* SDHCI_QUIRK2_BROKEN_64_BIT_DMA must be left to the drivers to
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* SDHCI_QUIRK2_BROKEN_64_BIT_DMA must be left to the drivers to
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* implement.
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* implement.
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*/
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*/
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if (caps[0] & SDHCI_CAN_64BIT)
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if (host->caps & SDHCI_CAN_64BIT)
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host->flags |= SDHCI_USE_64_BIT_DMA;
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host->flags |= SDHCI_USE_64_BIT_DMA;
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if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) {
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if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) {
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@ -2988,10 +2985,10 @@ int sdhci_setup_host(struct sdhci_host *host)
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}
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}
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if (host->version >= SDHCI_SPEC_300)
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if (host->version >= SDHCI_SPEC_300)
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host->max_clk = (caps[0] & SDHCI_CLOCK_V3_BASE_MASK)
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host->max_clk = (host->caps & SDHCI_CLOCK_V3_BASE_MASK)
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>> SDHCI_CLOCK_BASE_SHIFT;
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>> SDHCI_CLOCK_BASE_SHIFT;
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else
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else
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host->max_clk = (caps[0] & SDHCI_CLOCK_BASE_MASK)
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host->max_clk = (host->caps & SDHCI_CLOCK_BASE_MASK)
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>> SDHCI_CLOCK_BASE_SHIFT;
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>> SDHCI_CLOCK_BASE_SHIFT;
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host->max_clk *= 1000000;
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host->max_clk *= 1000000;
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@ -3010,7 +3007,7 @@ int sdhci_setup_host(struct sdhci_host *host)
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* In case of Host Controller v3.00, find out whether clock
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* In case of Host Controller v3.00, find out whether clock
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* multiplier is supported.
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* multiplier is supported.
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*/
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*/
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host->clk_mul = (caps[1] & SDHCI_CLOCK_MUL_MASK) >>
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host->clk_mul = (host->caps1 & SDHCI_CLOCK_MUL_MASK) >>
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SDHCI_CLOCK_MUL_SHIFT;
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SDHCI_CLOCK_MUL_SHIFT;
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/*
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/*
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@ -3042,7 +3039,7 @@ int sdhci_setup_host(struct sdhci_host *host)
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mmc->f_max = max_clk;
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mmc->f_max = max_clk;
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if (!(host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) {
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if (!(host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) {
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host->timeout_clk = (caps[0] & SDHCI_TIMEOUT_CLK_MASK) >>
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host->timeout_clk = (host->caps & SDHCI_TIMEOUT_CLK_MASK) >>
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SDHCI_TIMEOUT_CLK_SHIFT;
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SDHCI_TIMEOUT_CLK_SHIFT;
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if (host->timeout_clk == 0) {
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if (host->timeout_clk == 0) {
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if (host->ops->get_timeout_clock) {
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if (host->ops->get_timeout_clock) {
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@ -3056,7 +3053,7 @@ int sdhci_setup_host(struct sdhci_host *host)
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}
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}
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}
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}
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if (caps[0] & SDHCI_TIMEOUT_CLK_UNIT)
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if (host->caps & SDHCI_TIMEOUT_CLK_UNIT)
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host->timeout_clk *= 1000;
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host->timeout_clk *= 1000;
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if (override_timeout_clk)
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if (override_timeout_clk)
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@ -3097,7 +3094,7 @@ int sdhci_setup_host(struct sdhci_host *host)
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if (host->quirks2 & SDHCI_QUIRK2_HOST_NO_CMD23)
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if (host->quirks2 & SDHCI_QUIRK2_HOST_NO_CMD23)
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mmc->caps &= ~MMC_CAP_CMD23;
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mmc->caps &= ~MMC_CAP_CMD23;
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if (caps[0] & SDHCI_CAN_DO_HISPD)
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if (host->caps & SDHCI_CAN_DO_HISPD)
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mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED;
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mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED;
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if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) &&
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if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) &&
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@ -3115,9 +3112,9 @@ int sdhci_setup_host(struct sdhci_host *host)
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ret = regulator_enable(mmc->supply.vqmmc);
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ret = regulator_enable(mmc->supply.vqmmc);
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if (!regulator_is_supported_voltage(mmc->supply.vqmmc, 1700000,
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if (!regulator_is_supported_voltage(mmc->supply.vqmmc, 1700000,
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1950000))
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1950000))
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caps[1] &= ~(SDHCI_SUPPORT_SDR104 |
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host->caps1 &= ~(SDHCI_SUPPORT_SDR104 |
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SDHCI_SUPPORT_SDR50 |
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SDHCI_SUPPORT_SDR50 |
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SDHCI_SUPPORT_DDR50);
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SDHCI_SUPPORT_DDR50);
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if (ret) {
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if (ret) {
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pr_warn("%s: Failed to enable vqmmc regulator: %d\n",
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pr_warn("%s: Failed to enable vqmmc regulator: %d\n",
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mmc_hostname(mmc), ret);
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mmc_hostname(mmc), ret);
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@ -3125,28 +3122,30 @@ int sdhci_setup_host(struct sdhci_host *host)
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}
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}
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}
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}
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if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V)
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if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V) {
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caps[1] &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
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host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
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SDHCI_SUPPORT_DDR50);
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SDHCI_SUPPORT_DDR50);
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}
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/* Any UHS-I mode in caps implies SDR12 and SDR25 support. */
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/* Any UHS-I mode in caps implies SDR12 and SDR25 support. */
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if (caps[1] & (SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
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if (host->caps1 & (SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
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SDHCI_SUPPORT_DDR50))
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SDHCI_SUPPORT_DDR50))
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mmc->caps |= MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25;
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mmc->caps |= MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25;
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/* SDR104 supports also implies SDR50 support */
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/* SDR104 supports also implies SDR50 support */
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if (caps[1] & SDHCI_SUPPORT_SDR104) {
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if (host->caps1 & SDHCI_SUPPORT_SDR104) {
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mmc->caps |= MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_SDR50;
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mmc->caps |= MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_SDR50;
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/* SD3.0: SDR104 is supported so (for eMMC) the caps2
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/* SD3.0: SDR104 is supported so (for eMMC) the caps2
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* field can be promoted to support HS200.
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* field can be promoted to support HS200.
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*/
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*/
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if (!(host->quirks2 & SDHCI_QUIRK2_BROKEN_HS200))
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if (!(host->quirks2 & SDHCI_QUIRK2_BROKEN_HS200))
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mmc->caps2 |= MMC_CAP2_HS200;
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mmc->caps2 |= MMC_CAP2_HS200;
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} else if (caps[1] & SDHCI_SUPPORT_SDR50)
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} else if (host->caps1 & SDHCI_SUPPORT_SDR50) {
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mmc->caps |= MMC_CAP_UHS_SDR50;
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mmc->caps |= MMC_CAP_UHS_SDR50;
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}
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if (host->quirks2 & SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 &&
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if (host->quirks2 & SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 &&
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(caps[1] & SDHCI_SUPPORT_HS400))
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(host->caps1 & SDHCI_SUPPORT_HS400))
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mmc->caps2 |= MMC_CAP2_HS400;
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mmc->caps2 |= MMC_CAP2_HS400;
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if ((mmc->caps2 & MMC_CAP2_HSX00_1_2V) &&
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if ((mmc->caps2 & MMC_CAP2_HSX00_1_2V) &&
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@ -3155,25 +3154,25 @@ int sdhci_setup_host(struct sdhci_host *host)
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1300000)))
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1300000)))
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mmc->caps2 &= ~MMC_CAP2_HSX00_1_2V;
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mmc->caps2 &= ~MMC_CAP2_HSX00_1_2V;
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if ((caps[1] & SDHCI_SUPPORT_DDR50) &&
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if ((host->caps1 & SDHCI_SUPPORT_DDR50) &&
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!(host->quirks2 & SDHCI_QUIRK2_BROKEN_DDR50))
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!(host->quirks2 & SDHCI_QUIRK2_BROKEN_DDR50))
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mmc->caps |= MMC_CAP_UHS_DDR50;
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mmc->caps |= MMC_CAP_UHS_DDR50;
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/* Does the host need tuning for SDR50? */
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/* Does the host need tuning for SDR50? */
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if (caps[1] & SDHCI_USE_SDR50_TUNING)
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if (host->caps1 & SDHCI_USE_SDR50_TUNING)
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host->flags |= SDHCI_SDR50_NEEDS_TUNING;
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host->flags |= SDHCI_SDR50_NEEDS_TUNING;
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/* Driver Type(s) (A, C, D) supported by the host */
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/* Driver Type(s) (A, C, D) supported by the host */
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if (caps[1] & SDHCI_DRIVER_TYPE_A)
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if (host->caps1 & SDHCI_DRIVER_TYPE_A)
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mmc->caps |= MMC_CAP_DRIVER_TYPE_A;
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mmc->caps |= MMC_CAP_DRIVER_TYPE_A;
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if (caps[1] & SDHCI_DRIVER_TYPE_C)
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if (host->caps1 & SDHCI_DRIVER_TYPE_C)
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mmc->caps |= MMC_CAP_DRIVER_TYPE_C;
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mmc->caps |= MMC_CAP_DRIVER_TYPE_C;
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if (caps[1] & SDHCI_DRIVER_TYPE_D)
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if (host->caps1 & SDHCI_DRIVER_TYPE_D)
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mmc->caps |= MMC_CAP_DRIVER_TYPE_D;
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mmc->caps |= MMC_CAP_DRIVER_TYPE_D;
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/* Initial value for re-tuning timer count */
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/* Initial value for re-tuning timer count */
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host->tuning_count = (caps[1] & SDHCI_RETUNING_TIMER_COUNT_MASK) >>
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host->tuning_count = (host->caps1 & SDHCI_RETUNING_TIMER_COUNT_MASK) >>
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SDHCI_RETUNING_TIMER_COUNT_SHIFT;
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SDHCI_RETUNING_TIMER_COUNT_SHIFT;
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/*
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/*
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* In case Re-tuning Timer is not disabled, the actual value of
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* In case Re-tuning Timer is not disabled, the actual value of
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@ -3183,7 +3182,7 @@ int sdhci_setup_host(struct sdhci_host *host)
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host->tuning_count = 1 << (host->tuning_count - 1);
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host->tuning_count = 1 << (host->tuning_count - 1);
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/* Re-tuning mode supported by the Host Controller */
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/* Re-tuning mode supported by the Host Controller */
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host->tuning_mode = (caps[1] & SDHCI_RETUNING_MODE_MASK) >>
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host->tuning_mode = (host->caps1 & SDHCI_RETUNING_MODE_MASK) >>
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SDHCI_RETUNING_MODE_SHIFT;
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SDHCI_RETUNING_MODE_SHIFT;
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ocr_avail = 0;
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ocr_avail = 0;
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@ -3212,7 +3211,7 @@ int sdhci_setup_host(struct sdhci_host *host)
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}
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}
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}
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}
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if (caps[0] & SDHCI_CAN_VDD_330) {
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if (host->caps & SDHCI_CAN_VDD_330) {
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ocr_avail |= MMC_VDD_32_33 | MMC_VDD_33_34;
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ocr_avail |= MMC_VDD_32_33 | MMC_VDD_33_34;
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mmc->max_current_330 = ((max_current_caps &
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mmc->max_current_330 = ((max_current_caps &
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@ -3220,7 +3219,7 @@ int sdhci_setup_host(struct sdhci_host *host)
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SDHCI_MAX_CURRENT_330_SHIFT) *
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SDHCI_MAX_CURRENT_330_SHIFT) *
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SDHCI_MAX_CURRENT_MULTIPLIER;
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SDHCI_MAX_CURRENT_MULTIPLIER;
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}
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}
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if (caps[0] & SDHCI_CAN_VDD_300) {
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if (host->caps & SDHCI_CAN_VDD_300) {
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ocr_avail |= MMC_VDD_29_30 | MMC_VDD_30_31;
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ocr_avail |= MMC_VDD_29_30 | MMC_VDD_30_31;
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mmc->max_current_300 = ((max_current_caps &
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mmc->max_current_300 = ((max_current_caps &
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@ -3228,7 +3227,7 @@ int sdhci_setup_host(struct sdhci_host *host)
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SDHCI_MAX_CURRENT_300_SHIFT) *
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SDHCI_MAX_CURRENT_300_SHIFT) *
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SDHCI_MAX_CURRENT_MULTIPLIER;
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SDHCI_MAX_CURRENT_MULTIPLIER;
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}
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}
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if (caps[0] & SDHCI_CAN_VDD_180) {
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if (host->caps & SDHCI_CAN_VDD_180) {
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ocr_avail |= MMC_VDD_165_195;
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ocr_avail |= MMC_VDD_165_195;
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mmc->max_current_180 = ((max_current_caps &
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mmc->max_current_180 = ((max_current_caps &
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@ -3315,7 +3314,7 @@ int sdhci_setup_host(struct sdhci_host *host)
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if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) {
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if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) {
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mmc->max_blk_size = 2;
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mmc->max_blk_size = 2;
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} else {
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} else {
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mmc->max_blk_size = (caps[0] & SDHCI_MAX_BLOCK_MASK) >>
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mmc->max_blk_size = (host->caps & SDHCI_MAX_BLOCK_MASK) >>
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SDHCI_MAX_BLOCK_SHIFT;
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SDHCI_MAX_BLOCK_SHIFT;
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if (mmc->max_blk_size >= 3) {
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if (mmc->max_blk_size >= 3) {
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pr_warn("%s: Invalid maximum block size, assuming 512 bytes\n",
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pr_warn("%s: Invalid maximum block size, assuming 512 bytes\n",
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@ -490,8 +490,8 @@ struct sdhci_host {
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struct timer_list timer; /* Timer for timeouts */
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struct timer_list timer; /* Timer for timeouts */
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u32 caps; /* Alternative CAPABILITY_0 */
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u32 caps; /* CAPABILITY_0 */
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u32 caps1; /* Alternative CAPABILITY_1 */
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u32 caps1; /* CAPABILITY_1 */
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unsigned int ocr_avail_sdio; /* OCR bit masks */
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unsigned int ocr_avail_sdio; /* OCR bit masks */
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unsigned int ocr_avail_sd;
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unsigned int ocr_avail_sd;
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