drm/amdgpu: Export setup_vm_pt_regs() logic for gfxhub 2.0
The KFD code will call this function later. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -46,21 +46,25 @@ u64 gfxhub_v2_0_get_mc_fb_offset(struct amdgpu_device *adev)
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return (u64)RREG32_SOC15(GC, 0, mmGCMC_VM_FB_OFFSET) << 24;
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}
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static void gfxhub_v2_0_init_gart_pt_regs(struct amdgpu_device *adev)
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void gfxhub_v2_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
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uint64_t page_table_base)
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{
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uint64_t value = amdgpu_gmc_pd_addr(adev->gart.bo);
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/* two registers distance between mmGCVM_CONTEXT0_* to mmGCVM_CONTEXT1_* */
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int offset = mmGCVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32
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- mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32;
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WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
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offset * vmid, lower_32_bits(page_table_base));
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WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
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lower_32_bits(value));
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WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
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upper_32_bits(value));
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WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
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offset * vmid, upper_32_bits(page_table_base));
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}
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static void gfxhub_v2_0_init_gart_aperture_regs(struct amdgpu_device *adev)
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{
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gfxhub_v2_0_init_gart_pt_regs(adev);
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uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);
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gfxhub_v2_0_setup_vm_pt_regs(adev, 0, pt_base);
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WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,
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(u32)(adev->gmc.gart_start >> 12));
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@ -31,5 +31,7 @@ void gfxhub_v2_0_set_fault_enable_default(struct amdgpu_device *adev,
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bool value);
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void gfxhub_v2_0_init(struct amdgpu_device *adev);
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u64 gfxhub_v2_0_get_mc_fb_offset(struct amdgpu_device *adev);
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void gfxhub_v2_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
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uint64_t page_table_base);
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#endif
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