include/asm-x86/bitops.h: checkpatch cleanups - formatting only
Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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286275c90f
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@ -23,13 +23,13 @@
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#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1)
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#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1)
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/* Technically wrong, but this avoids compilation errors on some gcc
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/* Technically wrong, but this avoids compilation errors on some gcc
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versions. */
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versions. */
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#define ADDR "=m" (*(volatile long *) addr)
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#define ADDR "=m" (*(volatile long *)addr)
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#define BIT_ADDR "=m" (((volatile int *) addr)[nr >> 5])
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#define BIT_ADDR "=m" (((volatile int *)addr)[nr >> 5])
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#else
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#else
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#define ADDR "+m" (*(volatile long *) addr)
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#define ADDR "+m" (*(volatile long *) addr)
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#define BIT_ADDR "+m" (((volatile int *) addr)[nr >> 5])
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#define BIT_ADDR "+m" (((volatile int *)addr)[nr >> 5])
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#endif
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#endif
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#define BASE_ADDR "m" (*(volatile int *) addr)
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#define BASE_ADDR "m" (*(volatile int *)addr)
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/**
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/**
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* set_bit - Atomically set a bit in memory
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* set_bit - Atomically set a bit in memory
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@ -48,9 +48,7 @@
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*/
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*/
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static inline void set_bit(int nr, volatile void *addr)
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static inline void set_bit(int nr, volatile void *addr)
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{
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{
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asm volatile(LOCK_PREFIX "bts %1,%0"
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asm volatile(LOCK_PREFIX "bts %1,%0" : ADDR : "Ir" (nr) : "memory");
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: ADDR
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: "Ir" (nr) : "memory");
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}
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}
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/**
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/**
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@ -82,8 +80,7 @@ static inline void __set_bit(int nr, volatile void *addr)
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*/
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*/
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static inline void clear_bit(int nr, volatile void *addr)
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static inline void clear_bit(int nr, volatile void *addr)
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{
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{
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asm volatile(LOCK_PREFIX "btr %1,%2"
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asm volatile(LOCK_PREFIX "btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR);
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: BIT_ADDR : "Ir" (nr), BASE_ADDR);
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}
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}
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/*
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/*
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@ -151,8 +148,7 @@ static inline void __change_bit(int nr, volatile void *addr)
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*/
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*/
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static inline void change_bit(int nr, volatile void *addr)
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static inline void change_bit(int nr, volatile void *addr)
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{
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{
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asm volatile(LOCK_PREFIX "btc %1,%2"
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asm volatile(LOCK_PREFIX "btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR);
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: BIT_ADDR : "Ir" (nr), BASE_ADDR);
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}
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}
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/**
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/**
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@ -168,9 +164,7 @@ static inline int test_and_set_bit(int nr, volatile void *addr)
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int oldbit;
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int oldbit;
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asm volatile(LOCK_PREFIX "bts %2,%1\n\t"
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asm volatile(LOCK_PREFIX "bts %2,%1\n\t"
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"sbb %0,%0"
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"sbb %0,%0" : "=r" (oldbit), ADDR : "Ir" (nr) : "memory");
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: "=r" (oldbit), ADDR
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: "Ir" (nr) : "memory");
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return oldbit;
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return oldbit;
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}
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}
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@ -202,8 +196,7 @@ static inline int __test_and_set_bit(int nr, volatile void *addr)
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asm volatile("bts %2,%3\n\t"
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asm volatile("bts %2,%3\n\t"
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"sbb %0,%0"
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"sbb %0,%0"
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: "=r" (oldbit), BIT_ADDR
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: "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR);
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: "Ir" (nr), BASE_ADDR);
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return oldbit;
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return oldbit;
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}
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}
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@ -221,8 +214,7 @@ static inline int test_and_clear_bit(int nr, volatile void *addr)
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asm volatile(LOCK_PREFIX "btr %2,%1\n\t"
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asm volatile(LOCK_PREFIX "btr %2,%1\n\t"
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"sbb %0,%0"
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"sbb %0,%0"
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: "=r" (oldbit), ADDR
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: "=r" (oldbit), ADDR : "Ir" (nr) : "memory");
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: "Ir" (nr) : "memory");
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return oldbit;
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return oldbit;
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}
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}
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@ -242,8 +234,7 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr)
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asm volatile("btr %2,%3\n\t"
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asm volatile("btr %2,%3\n\t"
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"sbb %0,%0"
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"sbb %0,%0"
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: "=r" (oldbit), BIT_ADDR
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: "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR);
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: "Ir" (nr), BASE_ADDR);
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return oldbit;
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return oldbit;
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}
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}
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@ -254,8 +245,7 @@ static inline int __test_and_change_bit(int nr, volatile void *addr)
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asm volatile("btc %2,%3\n\t"
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asm volatile("btc %2,%3\n\t"
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"sbb %0,%0"
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"sbb %0,%0"
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: "=r" (oldbit), BIT_ADDR
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: "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR);
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: "Ir" (nr), BASE_ADDR);
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return oldbit;
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return oldbit;
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}
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}
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@ -274,8 +264,7 @@ static inline int test_and_change_bit(int nr, volatile void *addr)
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asm volatile(LOCK_PREFIX "btc %2,%1\n\t"
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asm volatile(LOCK_PREFIX "btc %2,%1\n\t"
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"sbb %0,%0"
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"sbb %0,%0"
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: "=r" (oldbit), ADDR
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: "=r" (oldbit), ADDR : "Ir" (nr) : "memory");
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: "Ir" (nr) : "memory");
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return oldbit;
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return oldbit;
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}
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}
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