drm/amdgpu: enable GTT PD/PT for raven v3
Should work on Vega10 as well, but with an obvious performance hit. Older APUs can be enabled as well, but will probably be more work. v2: fix error checking v3: use more general check Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -342,6 +342,9 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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list_move(&bo_base->vm_status, &vm->moved);
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spin_unlock(&vm->moved_lock);
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} else {
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r = amdgpu_ttm_alloc_gart(&bo->tbo);
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if (r)
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break;
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list_move(&bo_base->vm_status, &vm->relocated);
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}
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}
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@ -417,6 +420,10 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
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if (r)
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goto error;
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r = amdgpu_ttm_alloc_gart(&bo->tbo);
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if (r)
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return r;
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r = amdgpu_job_alloc_with_ib(adev, 64, &job);
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if (r)
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goto error;
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@ -482,7 +489,12 @@ static void amdgpu_vm_bo_param(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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bp->size = amdgpu_vm_bo_size(adev, level);
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bp->byte_align = AMDGPU_GPU_PAGE_SIZE;
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bp->domain = AMDGPU_GEM_DOMAIN_VRAM;
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bp->flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
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if (bp->size <= PAGE_SIZE && adev->asic_type >= CHIP_VEGA10 &&
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adev->flags & AMD_IS_APU)
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bp->domain |= AMDGPU_GEM_DOMAIN_GTT;
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bp->domain = amdgpu_bo_get_preferred_pin_domain(adev, bp->domain);
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bp->flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
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AMDGPU_GEM_CREATE_CPU_GTT_USWC;
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if (vm->use_cpu_for_update)
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bp->flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
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else
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