Device tree changes for omaps for v4.5 merge window:
- Update all omaps to use pinctrl macros. This makes comparing the pinmux settings against the documentation much earlier. Javier compared the checksums of the generated dtb files to make sure nothing changed for the dtb files. - Updates for dm816x - Add GPMC DMA channels for am437x - Updates for LogicPD Torpedo - Basic support for CompuLab cm-t335 - Remove tps65217.dtsi file, we're better off adding SoC generic board dtsi files for the common features - Add support for ELM on am33xx - Add support for Bosch shc c3 board - Add qspi aliases for am437x and dra7 - Wake-up support for dra7-evm uart1 - Basic support for CompuLab sbc-t43 - Basic support for CompuLab cl-som-am57x - Use MMC pwrseq for libertas WLAN on igep0020 and igep0030 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWahIeAAoJEBvUPslcq6Vzu70QAOSRoC87APvNtPPealvHiouu o/CUIFrC1go+O9XVRib0I2mor+1WnNWktLW19YMALKFDD997l/tBEoGb5yxAHJcu P+epVRyHhyLdR4BqkT9VsRW+ZOfXSHs3V7hB2z50mq+gXW53VyS1n6rhJopicHip VgLK0fopVZbk+e6rsZpvkVN5x4XIIvkZ4zCblIZZgBFtIcD4KL5G8i0NTPxV91m1 LPf43r9PNjPZAxz4XHUgg9I9eaTcDMviGBDsQaGG7SvQtOu2WuMZqmUtOLh8FK6c cdylkKCjuCHzs0qn4xz7T1vffTmSMmyTgIfNt6OHDPlKWfxjmouCapH0HMr0Y0AJ 9moUrlQUi5qfiolUb040mkM7CN7Ge8KKLr4+P/eIDsxtglnmBqrx/n5kbK1ef9Yr a+c01gtG42UbROU6ZnJdxkZ0k9+UVa4J+V0irUkDxa08JMUUAGFAZdvbL6NNRCf5 vMvrH5ub11PC6rxdtdb4GpgmATH2xLOaOKrj+xwFTEUsQiQPp2y9KBk+9ocoe4lO 9OG4nMSNH6qaQwXnexRb8bP0rTt9ONHNkaQ0FSM2qNTmL7g6mWRlTuL8itV0/XXb B3foLmRGe2BTlBDmoZvJt2QBC6VNRWKCm7u3VUv46eRjVJ2nP6WQLydmOhozF+3o aGKp2xlcDbcA8lpFpU4v =lCuD -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.5/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Merge "Device tree changes for omaps for v4.5 merge window" from Tony Lindgren: - Update all omaps to use pinctrl macros. This makes comparing the pinmux settings against the documentation much earlier. Javier compared the checksums of the generated dtb files to make sure nothing changed for the dtb files. - Updates for dm816x - Add GPMC DMA channels for am437x - Updates for LogicPD Torpedo - Basic support for CompuLab cm-t335 - Remove tps65217.dtsi file, we're better off adding SoC generic board dtsi files for the common features - Add support for ELM on am33xx - Add support for Bosch shc c3 board - Add qspi aliases for am437x and dra7 - Wake-up support for dra7-evm uart1 - Basic support for CompuLab sbc-t43 - Basic support for CompuLab cl-som-am57x - Use MMC pwrseq for libertas WLAN on igep0020 and igep0030 * tag 'omap-for-v4.5/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (97 commits) ARM: dts: omap3-igep0030: Use MMC pwrseq to init SDIO WiFi ARM: dts: omap3-igep0020: Use MMC pwrseq to init SDIO WiFi ARM: dts: am57xx: cl-som-am57x: skip resetting ETH PHYs ARM: dts: am57xx: sbc-am57x: add HDMI support ARM: dts: am57xx: compulab-sb-som: add HDMI connector ARM: dts: am57xx: sbc-am57x: add LCD support ARM: dts: am57xx: sbc-am57x: add GPIO expander support ARM: dts: am57xx: sbc-am57x: add EEPROM support ARM: dts: am57xx: sbc-am57x: add usb vbus pinmux ARM: dts: am57xx: cl-som-am57x: add MMC1 support ARM: dts: am57xx: sbc-am57x: add basic board support ARM: dts: am57xx: cl-som-am57x: add analog audio support ARM: dts: am57xx: cl-som-am57x: add touchscreen support ARM: dts: am57xx: cl-som-am57x: add USB support ARM: dts: am57xx: cl-som-am57x: add dual EMAC support ARM: dts: am57xx: cl-som-am57x: add spi-flash support ARM: dts: am57xx: cl-som-am57x: add eMMC support ARM: dts: am57xx: cl-som-am57x: add EEPROM support ARM: dts: am57xx: cl-som-am57x: add I2C3 support ARM: dts: am57xx: cl-som-am57x: dts: add RTC support ...
This commit is contained in:
Arnd Bergmann
commit
28295a8915
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@ -0,0 +1,5 @@
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CompuLab SB-SOM is a multi-module baseboard capable of carrying CM-T43, CM-T54,
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and CM-QS600 modules with minor modifications to the SB-SOM assembly.
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Required root node properties:
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- compatible = should be "compulab,sb-som"
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@ -138,9 +138,18 @@ Boards:
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- AM335X phyBOARD-WEGA: Single Board Computer dev kit
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compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx"
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- AM335X CM-T335 : System On Module, built around the Sitara AM3352/4
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compatible = "compulab,cm-t335", "ti,am33xx"
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- OMAP5 EVM : Evaluation Module
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compatible = "ti,omap5-evm", "ti,omap5"
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- AM437x CM-T43
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compatible = "compulab,am437x-cm-t43", "ti,am4372", "ti,am43"
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- AM437x SBC-T43
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compatible = "compulab,am437x-sbc-t43", "compulab,am437x-cm-t43", "ti,am4372", "ti,am43"
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- AM43x EPOS EVM
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compatible = "ti,am43x-epos-evm", "ti,am4372", "ti,am43"
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@ -150,6 +159,12 @@ Boards:
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- AM437x SK EVM: AM437x StarterKit Evaluation Module
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compatible = "ti,am437x-sk-evm", "ti,am4372", "ti,am43"
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- AM57XX CL-SOM-AM57x
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compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"
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- AM57XX SBC-AM57x
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compatible = "compulab,sbc-am57x", "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"
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- DRA742 EVM: Software Development Board for DRA742
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compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7"
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@ -0,0 +1,4 @@
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Startek Electronic Technology Co. KD050C 5.0" WVGA TFT LCD panel
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Required properties:
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- compatible: should be "startek,startek-kd050c"
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@ -26,7 +26,11 @@ Example:
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ti,pmic-shutdown-controller;
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regulators {
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#address-cells = <1>;
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#size-cells = <0>;
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dcdc1_reg: dcdc1 {
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reg = <0>;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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@ -34,6 +38,7 @@ Example:
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};
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dcdc2_reg: dcdc2 {
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reg = <1>;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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@ -41,6 +46,7 @@ Example:
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};
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dcdc3_reg: dcc3 {
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reg = <2>;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1500000>;
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regulator-boot-on;
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@ -48,6 +54,7 @@ Example:
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};
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ldo1_reg: ldo1 {
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reg = <3>;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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@ -55,6 +62,7 @@ Example:
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};
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ldo2_reg: ldo2 {
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reg = <4>;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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@ -62,6 +70,7 @@ Example:
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};
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ldo3_reg: ldo3 {
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reg = <5>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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@ -69,6 +78,7 @@ Example:
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};
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ldo4_reg: ldo4 {
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reg = <6>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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@ -218,6 +218,7 @@ sony Sony Corporation
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spansion Spansion Inc.
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sprd Spreadtrum Communications Inc.
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st STMicroelectronics
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startek Startek
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ste ST-Ericsson
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stericsson ST-Ericsson
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synology Synology, Inc.
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@ -459,13 +459,15 @@ dtb-$(CONFIG_SOC_AM33XX) += \
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am335x-bone.dtb \
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am335x-boneblack.dtb \
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am335x-bonegreen.dtb \
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am335x-sl50.dtb \
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am335x-chiliboard.dtb \
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am335x-cm-t335.dtb \
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am335x-evm.dtb \
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am335x-evmsk.dtb \
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am335x-lxm.dtb \
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am335x-nano.dtb \
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am335x-pepper.dtb \
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am335x-lxm.dtb \
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am335x-chiliboard.dtb \
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am335x-shc.dtb \
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am335x-sl50.dtb \
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am335x-wega-rdk.dtb
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dtb-$(CONFIG_ARCH_OMAP4) += \
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omap4-duovero-parlor.dtb \
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@ -478,17 +480,21 @@ dtb-$(CONFIG_ARCH_OMAP4) += \
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omap4-var-stk-om44.dtb
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dtb-$(CONFIG_SOC_AM43XX) += \
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am43x-epos-evm.dtb \
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am437x-sk-evm.dtb \
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am437x-cm-t43.dtb \
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am437x-gp-evm.dtb \
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am437x-idk-evm.dtb \
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am437x-gp-evm.dtb
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am437x-sbc-t43.dtb \
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am437x-sk-evm.dtb
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dtb-$(CONFIG_SOC_OMAP5) += \
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omap5-cm-t54.dtb \
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omap5-igep0050.dtb \
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omap5-sbc-t54.dtb \
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omap5-uevm.dtb
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dtb-$(CONFIG_SOC_DRA7XX) += \
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dra7-evm.dtb \
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am57xx-beagle-x15.dtb \
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am57xx-cl-som-am57x.dtb \
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am57xx-sbc-am57x.dtb \
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dra7-evm.dtb \
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dra72-evm.dtb
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dtb-$(CONFIG_ARCH_ORION5X) += \
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orion5x-lacie-d2-network.dtb \
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@ -56,175 +56,171 @@
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&am33xx_pinmux {
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mmc2_pins: pinmux_mmc2_pins {
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pinctrl-single,pins = <
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0x020 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad8.mmc1_dat0_mux0 */
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0x024 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad9.mmc1_dat1_mux0 */
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0x028 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad10.mmc1_dat2_mux0 */
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0x02c (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad11.mmc1_dat3_mux0 */
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0x080 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk_mux0 */
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0x084 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd_mux0 */
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0x1e4 (PIN_INPUT_PULLUP | MUX_MODE7) /* emu0.gpio3[7] */
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AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad8.mmc1_dat0_mux0 */
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AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad9.mmc1_dat1_mux0 */
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AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad10.mmc1_dat2_mux0 */
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AM33XX_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad11.mmc1_dat3_mux0 */
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AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk_mux0 */
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AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd_mux0 */
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AM33XX_IOPAD(0x9e4, PIN_INPUT_PULLUP | MUX_MODE7) /* emu0.gpio3[7] */
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>;
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};
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wl12xx_gpio: pinmux_wl12xx_gpio {
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pinctrl-single,pins = <
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0x1e8 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* emu1.gpio3[8] */
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AM33XX_IOPAD(0x9e8, PIN_OUTPUT_PULLUP | MUX_MODE7) /* emu1.gpio3[8] */
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>;
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};
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tps65910_pins: pinmux_tps65910_pins {
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pinctrl-single,pins = <
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0x078 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ben1.gpio1[28] */
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AM33XX_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ben1.gpio1[28] */
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>;
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};
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tca6416_pins: pinmux_tca6416_pins {
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pinctrl-single,pins = <
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0x1b4 (PIN_INPUT_PULLUP | MUX_MODE7) /* xdma_event_intr1.gpio0[20] tca6416 stuff */
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AM33XX_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE7) /* xdma_event_intr1.gpio0[20] tca6416 stuff */
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>;
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};
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i2c1_pins: pinmux_i2c1_pins {
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pinctrl-single,pins = <
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0x158 0x2a /* spi0_d1.i2c1_sda_mux3, INPUT | MODE2 */
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0x15c 0x2a /* spi0_cs0.i2c1_scl_mux3, INPUT | MODE2 */
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AM33XX_IOPAD(0x958, PIN_INPUT | MUX_MODE2) /* spi0_d1.i2c1_sda_mux3 */
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AM33XX_IOPAD(0x95c, PIN_INPUT | MUX_MODE2) /* spi0_cs0.i2c1_scl_mux3 */
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>;
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};
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dcan1_pins: pinmux_dcan1_pins {
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pinctrl-single,pins = <
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0x168 0x0a /* uart0_ctsn.dcan1_tx_mux0, OUTPUT | MODE2 */
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||||
0x16c 0x2a /* uart0_rtsn.dcan1_rx_mux0, INPUT | MODE2 */
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AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.dcan1_tx_mux0 */
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AM33XX_IOPAD(0x96c, PIN_INPUT | MUX_MODE2) /* uart0_rtsn.dcan1_rx_mux0 */
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||||
>;
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||||
};
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uart0_pins: pinmux_uart0_pins {
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pinctrl-single,pins = <
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0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins: pinmux_uart1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x180 0x28 /* uart1_rxd, INPUT | MODE0 */
|
||||
0x184 0x28 /* uart1_txd, INPUT | MODE0 */
|
||||
/*0x178 0x28*/ /* uart1_ctsn, INPUT | MODE0 */
|
||||
/*0x17c 0x08*/ /* uart1_rtsn, OUTPUT | MODE0 */
|
||||
0x178 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_ctsn, INPUT | MODE0 */
|
||||
0x17c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rtsn, OUTPUT | MODE0 */
|
||||
0x0e0 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.gpio2[22] DTR */
|
||||
0x0e4 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */
|
||||
0x0e8 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.gpio2[24] DCD */
|
||||
0x0ec (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.gpio2[25] RI */
|
||||
AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE0) /* uart1_rxd */
|
||||
AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE0) /* uart1_txd */
|
||||
AM33XX_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_ctsn, INPUT | MODE0 */
|
||||
AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rtsn, OUTPUT | MODE0 */
|
||||
AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.gpio2[22] DTR */
|
||||
AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */
|
||||
AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.gpio2[24] DCD */
|
||||
AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.gpio2[25] RI */
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x150 0x29 /* spi0_sclk.uart2_rxd_mux3, INPUT | MODE1 */
|
||||
0x154 0x09 /* spi0_d0.uart2_txd_mux3, OUTPUT | MODE1 */
|
||||
/*0x188 0x2a*/ /* i2c0_sda.uart2_ctsn_mux0, INPUT | MODE2 */
|
||||
/*0x18c 0x2a*/ /* i2c0_scl.uart2_rtsn_mux0, INPUT | MODE2 */
|
||||
0x188 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* i2c0_sda.uart2_ctsn_mux0 */
|
||||
0x18c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* i2c0_scl.uart2_rtsn_mux0 */
|
||||
0x030 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.gpio1[12] DTR */
|
||||
0x034 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.gpio1[13] DSR */
|
||||
0x038 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.gpio1[14] DCD */
|
||||
0x03c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.gpio1[15] RI */
|
||||
AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd_mux3 */
|
||||
AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd_mux3 */
|
||||
AM33XX_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7) /* i2c0_sda.uart2_ctsn_mux0 */
|
||||
AM33XX_IOPAD(0x98c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* i2c0_scl.uart2_rtsn_mux0 */
|
||||
AM33XX_IOPAD(0x830, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.gpio1[12] DTR */
|
||||
AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.gpio1[13] DSR */
|
||||
AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.gpio1[14] DCD */
|
||||
AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.gpio1[15] RI */
|
||||
|
||||
0x1a0 (PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
|
||||
AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
|
||||
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_tx_en.rmii1_txen */
|
||||
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
|
||||
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii1_refclk */
|
||||
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
|
||||
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_tx_en.rmii1_txen */
|
||||
AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
|
||||
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
|
||||
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii1_refclk */
|
||||
|
||||
|
||||
/* Slave 2 */
|
||||
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
|
||||
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
|
||||
0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
|
||||
0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
|
||||
0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
|
||||
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
|
||||
0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
|
||||
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
|
||||
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
|
||||
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
|
||||
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
|
||||
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
|
||||
AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
|
||||
AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
|
||||
AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
|
||||
AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
|
||||
AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
|
||||
AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
|
||||
AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
|
||||
AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
|
||||
AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
|
||||
AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
|
||||
AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
|
||||
AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 reset value */
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
|
||||
/* Slave 2 reset value*/
|
||||
0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
nandflash_pins_s0: nandflash_pins_s0 {
|
||||
pinctrl-single,pins = <
|
||||
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
|
||||
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
|
||||
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
|
||||
AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -67,112 +67,112 @@
|
|||
|
||||
user_leds_s0: user_leds_s0 {
|
||||
pinctrl-single,pins = <
|
||||
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
|
||||
0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
|
||||
0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
|
||||
0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
|
||||
AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
|
||||
AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
|
||||
AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
|
||||
AM33XX_IOPAD(0x860, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins: pinmux_i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x178 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
|
||||
0x17c (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
|
||||
AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
|
||||
AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: pinmux_uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
clkout2_pin: pinmux_clkout2_pin {
|
||||
pinctrl-single,pins = <
|
||||
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
|
||||
AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
|
||||
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
|
||||
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
|
||||
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
|
||||
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
|
||||
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
|
||||
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
|
||||
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
|
||||
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
|
||||
0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
|
||||
0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
|
||||
0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
|
||||
0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
|
||||
AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
|
||||
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
|
||||
AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
|
||||
AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
|
||||
AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
|
||||
AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
|
||||
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
|
||||
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
|
||||
AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
|
||||
AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
|
||||
AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 reset value */
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
|
||||
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
|
||||
>;
|
||||
};
|
||||
|
||||
emmc_pins: pinmux_emmc_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
|
||||
0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
|
||||
0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
|
||||
0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
|
||||
0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
|
||||
0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
|
||||
0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
|
||||
0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
|
||||
0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
|
||||
0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
|
||||
AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
|
||||
AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
|
||||
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
|
||||
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
|
||||
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
|
||||
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
|
||||
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
|
||||
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
|
||||
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
|
||||
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -285,10 +285,8 @@
|
|||
};
|
||||
};
|
||||
|
||||
|
||||
/include/ "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
/*
|
||||
* Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
|
||||
* mode") at poweroff. Most BeagleBone versions do not support RTC-only
|
||||
|
|
@ -309,12 +307,17 @@
|
|||
ti,pmic-shutdown-controller;
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-name = "vdds_dpr";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <925000>;
|
||||
|
|
@ -324,6 +327,7 @@
|
|||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <925000>;
|
||||
|
|
@ -333,21 +337,25 @@
|
|||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-name = "vio,vrtc,vdds";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-name = "vdd_3v3aux";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-name = "vdd_1v8";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-name = "vdd_3v3a";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -36,32 +36,32 @@
|
|||
&am33xx_pinmux {
|
||||
nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
|
||||
0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
|
||||
0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
|
||||
0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
|
||||
0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
|
||||
0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
|
||||
0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
|
||||
0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
|
||||
0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
|
||||
0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
|
||||
0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
|
||||
0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
|
||||
0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
|
||||
0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
|
||||
0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
|
||||
0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
|
||||
0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
|
||||
0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
|
||||
0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
|
||||
0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
|
||||
0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
|
||||
AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
|
||||
AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
|
||||
AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
|
||||
AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
|
||||
AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
|
||||
AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
|
||||
AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
|
||||
AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
|
||||
AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
|
||||
AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
|
||||
AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
|
||||
AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
|
||||
AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
|
||||
AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
|
||||
AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
|
||||
AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
|
||||
AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
|
||||
AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_vsync.lcd_vsync */
|
||||
AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_hsync.lcd_hsync */
|
||||
AM33XX_IOPAD(0x8e8, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_pclk.lcd_pclk */
|
||||
AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
|
||||
>;
|
||||
};
|
||||
nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
|
||||
AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -36,8 +36,8 @@
|
|||
&am33xx_pinmux {
|
||||
uart2_pins: uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x150 (PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd */
|
||||
0x154 (PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd */
|
||||
AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd */
|
||||
AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -37,26 +37,26 @@
|
|||
&am33xx_pinmux {
|
||||
usb1_drvvbus: usb1_drvvbus {
|
||||
pinctrl-single,pins = <
|
||||
0x234 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* usb1_drvvbus.usb1_drvvbus */
|
||||
AM33XX_IOPAD(0xa34, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* usb1_drvvbus.usb1_drvvbus */
|
||||
>;
|
||||
};
|
||||
|
||||
sd_pins: pinmux_sd_card {
|
||||
pinctrl-single,pins = <
|
||||
0xf0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
0xf4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
0xf8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
0xfc (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
AM33XX_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
AM33XX_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
AM33XX_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
AM33XX_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
AM33XX_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
AM33XX_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
>;
|
||||
};
|
||||
|
||||
led_gpio_pins: led_gpio_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1e4 (PIN_OUTPUT | MUX_MODE7) /* emu0.gpio3_7 */
|
||||
0x1e8 (PIN_OUTPUT | MUX_MODE7) /* emu1.gpio3_8 */
|
||||
AM33XX_IOPAD(0x9e4, PIN_OUTPUT | MUX_MODE7) /* emu0.gpio3_7 */
|
||||
AM33XX_IOPAD(0x9e8, PIN_OUTPUT | MUX_MODE7) /* emu1.gpio3_8 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -29,81 +29,81 @@
|
|||
|
||||
i2c0_pins: pinmux_i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: pinmux_uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs */
|
||||
0x110 (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
|
||||
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
|
||||
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
|
||||
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
|
||||
0x13c (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
|
||||
0x140 (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii_ref_clk */
|
||||
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs */
|
||||
AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
|
||||
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
|
||||
AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
|
||||
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
|
||||
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii_ref_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 reset value */
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* mdio_data.mdio_data */
|
||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
|
||||
/* mdio_clk.mdio_clk */
|
||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
nandflash_pins: nandflash_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x00 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
0x04 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
0x08 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
0x0c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
0x10 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
0x14 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
0x18 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
0x1c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
AM33XX_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
AM33XX_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
AM33XX_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
AM33XX_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
AM33XX_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
AM33XX_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
|
||||
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
0x7c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
0x90 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
0x94 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
0x98 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
0x9c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
|
||||
AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
AM33XX_IOPAD(0x890, PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
AM33XX_IOPAD(0x894, PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
AM33XX_IOPAD(0x898, PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
AM33XX_IOPAD(0x89c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -128,16 +128,21 @@
|
|||
|
||||
};
|
||||
|
||||
/include/ "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-name = "vdds_dpr";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <925000>;
|
||||
|
|
@ -147,6 +152,7 @@
|
|||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <925000>;
|
||||
|
|
@ -156,24 +162,28 @@
|
|||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-name = "vio,vrtc,vdds";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-name = "vdd_3v3aux";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-name = "vdd_1v8";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-name = "vdd_3v3d";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,347 @@
|
|||
/*
|
||||
* am335x-cm-t335.dts - Device Tree file for Compulab CM-T335
|
||||
*
|
||||
* Copyright (C) 2014 - 2015 CompuLab Ltd. - http://www.compulab.co.il/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "am33xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "CompuLab CM-T335";
|
||||
compatible = "compulab,cm-t335", "ti,am33xx";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x8000000>; /* 128 MB */
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio_led_pins>;
|
||||
led@0 {
|
||||
label = "cm_t335:green";
|
||||
gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; /* gpio2_0 */
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
/* regulator for mmc */
|
||||
vmmc_fixed: fixedregulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmc_fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&ecap0 0 50000 0>;
|
||||
brightness-levels = <0 51 53 56 62 75 101 152 255>;
|
||||
default-brightness-level = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
&am33xx_pinmux {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <>;
|
||||
|
||||
i2c0_pins: pinmux_i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
/* i2c0_sda.i2c0_sda */
|
||||
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
/* i2c0_scl.i2c0_scl */
|
||||
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
/* uart0_ctsn.i2c1_sda */
|
||||
AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE2)
|
||||
/* uart0_rtsn.i2c1_scl */
|
||||
AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE2)
|
||||
>;
|
||||
};
|
||||
|
||||
gpio_led_pins: pinmux_gpio_led_pins {
|
||||
pinctrl-single,pins = <
|
||||
/* gpmc_csn3.gpio2_0 */
|
||||
AM33XX_IOPAD(0x888, PIN_OUTPUT | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
nandflash_pins: pinmux_nandflash_pins {
|
||||
pinctrl-single,pins = <
|
||||
/* gpmc_ad0.gpmc_ad0 */
|
||||
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
/* gpmc_ad1.gpmc_ad1 */
|
||||
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
/* gpmc_ad2.gpmc_ad2 */
|
||||
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
/* gpmc_ad3.gpmc_ad3 */
|
||||
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
/* gpmc_ad4.gpmc_ad4 */
|
||||
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
/* gpmc_ad5.gpmc_ad5 */
|
||||
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
/* gpmc_ad6.gpmc_ad6 */
|
||||
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
/* gpmc_ad7.gpmc_ad7 */
|
||||
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
/* gpmc_wait0.gpmc_wait0 */
|
||||
AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
/* gpmc_wpn.gpio0_30 */
|
||||
AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7)
|
||||
/* gpmc_csn0.gpmc_csn0 */
|
||||
AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
|
||||
/* gpmc_advn_ale.gpmc_advn_ale */
|
||||
AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
|
||||
/* gpmc_oen_ren.gpmc_oen_ren */
|
||||
AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
|
||||
/* gpmc_wen.gpmc_wen */
|
||||
AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
|
||||
/* gpmc_ben0_cle.gpmc_ben0_cle */
|
||||
AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: pinmux_uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
/* uart0_rxd.uart0_rxd */
|
||||
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
/* uart0_txd.uart0_txd */
|
||||
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
ecap0_pins: pinmux_ecap0_pins {
|
||||
pinctrl-single,pins = <
|
||||
/* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
|
||||
AM33XX_IOPAD(0x964, 0x0)
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
/* mii1_tx_en.rgmii1_tctl */
|
||||
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
|
||||
/* mii1_rxdv.rgmii1_rctl */
|
||||
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)
|
||||
/* mii1_txd3.rgmii1_td3 */
|
||||
AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
|
||||
/* mii1_txd2.rgmii1_td2 */
|
||||
AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
|
||||
/* mii1_txd1.rgmii1_td1 */
|
||||
AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
|
||||
/* mii1_txd0.rgmii1_td0 */
|
||||
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
|
||||
/* mii1_txclk.rgmii1_tclk */
|
||||
AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
|
||||
/* mii1_rxclk.rgmii1_rclk */
|
||||
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)
|
||||
/* mii1_rxd3.rgmii1_rd3 */
|
||||
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)
|
||||
/* mii1_rxd2.rgmii1_rd2 */
|
||||
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)
|
||||
/* mii1_rxd1.rgmii1_rd1 */
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)
|
||||
/* mii1_rxd0.rgmii1_rd0 */
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 reset value */
|
||||
AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* mdio_data.mdio_data */
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
|
||||
/* mdio_clk.mdio_clk */
|
||||
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
/* mmc0_dat3.mmc0_dat3 */
|
||||
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
/* mmc0_dat2.mmc0_dat2 */
|
||||
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
/* mmc0_dat1.mmc0_dat1 */
|
||||
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
/* mmc0_dat0.mmc0_dat0 */
|
||||
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
/* mmc0_clk.mmc0_clk */
|
||||
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
/* mmc0_cmd.mmc0_cmd */
|
||||
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
/* CM-T335 board EEPROM */
|
||||
eeprom: 24c02@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
/* Real Time Clock */
|
||||
ext_rtc: em3027@56 {
|
||||
compatible = "emmicro,em3027";
|
||||
reg = <0x56>;
|
||||
};
|
||||
};
|
||||
|
||||
&epwmss0 {
|
||||
status = "okay";
|
||||
|
||||
ecap0: ecap@48300100 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ecap0_pins>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&nandflash_pins>;
|
||||
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
|
||||
nand@0,0 {
|
||||
reg = <0 0 0>; /* CS0, offset 0 */
|
||||
ti,nand-ecc-opt = "bch8";
|
||||
ti,elm-id = <&elm>;
|
||||
nand-bus-width = <8>;
|
||||
gpmc,device-width = <1>;
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <44>;
|
||||
gpmc,cs-wr-off-ns = <44>;
|
||||
gpmc,adv-on-ns = <6>;
|
||||
gpmc,adv-rd-off-ns = <34>;
|
||||
gpmc,adv-wr-off-ns = <44>;
|
||||
gpmc,we-on-ns = <0>;
|
||||
gpmc,we-off-ns = <40>;
|
||||
gpmc,oe-on-ns = <0>;
|
||||
gpmc,oe-off-ns = <54>;
|
||||
gpmc,access-ns = <64>;
|
||||
gpmc,rd-cycle-ns = <82>;
|
||||
gpmc,wr-cycle-ns = <82>;
|
||||
gpmc,wait-on-read = "true";
|
||||
gpmc,wait-on-write = "true";
|
||||
gpmc,bus-turnaround-ns = <0>;
|
||||
gpmc,cycle2cycle-delay-ns = <0>;
|
||||
gpmc,clk-activation-ns = <0>;
|
||||
gpmc,wait-monitoring-ns = <0>;
|
||||
gpmc,wr-access-ns = <40>;
|
||||
gpmc,wr-data-mux-bus-ns = <0>;
|
||||
/* MTD partition table */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "spl";
|
||||
reg = <0x00000000 0x00200000>;
|
||||
};
|
||||
partition@1 {
|
||||
label = "uboot";
|
||||
reg = <0x00200000 0x00100000>;
|
||||
};
|
||||
partition@2 {
|
||||
label = "uboot environment";
|
||||
reg = <0x00300000 0x00100000>;
|
||||
};
|
||||
partition@3 {
|
||||
label = "dtb";
|
||||
reg = <0x00400000 0x00100000>;
|
||||
};
|
||||
partition@4 {
|
||||
label = "splash";
|
||||
reg = <0x00500000 0x00400000>;
|
||||
};
|
||||
partition@5 {
|
||||
label = "linux";
|
||||
reg = <0x00900000 0x00600000>;
|
||||
};
|
||||
partition@6 {
|
||||
label = "rootfs";
|
||||
reg = <0x00F00000 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&elm {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mac {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cpsw_default>;
|
||||
pinctrl-1 = <&cpsw_sleep>;
|
||||
slaves = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&davinci_mdio_default>;
|
||||
pinctrl-1 = <&davinci_mdio_sleep>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <0>;
|
||||
phy-mode = "rgmii-txid";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&vmmc_fixed>;
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
};
|
||||
|
|
@ -168,215 +168,215 @@
|
|||
|
||||
matrix_keypad_s0: matrix_keypad_s0 {
|
||||
pinctrl-single,pins = <
|
||||
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
|
||||
0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
|
||||
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
|
||||
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
|
||||
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
|
||||
AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
|
||||
AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
|
||||
AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
|
||||
AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
|
||||
AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
|
||||
>;
|
||||
};
|
||||
|
||||
volume_keys_s0: volume_keys_s0 {
|
||||
pinctrl-single,pins = <
|
||||
0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
|
||||
0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
|
||||
AM33XX_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
|
||||
AM33XX_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins: pinmux_i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
|
||||
0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
|
||||
AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
|
||||
AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: pinmux_uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins: pinmux_uart1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x178 (PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
|
||||
0x17C (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
|
||||
0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
|
||||
0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
|
||||
AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
|
||||
AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
|
||||
AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
|
||||
AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
clkout2_pin: pinmux_clkout2_pin {
|
||||
pinctrl-single,pins = <
|
||||
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
|
||||
AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
|
||||
>;
|
||||
};
|
||||
|
||||
nandflash_pins_s0: nandflash_pins_s0 {
|
||||
pinctrl-single,pins = <
|
||||
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
|
||||
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
|
||||
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
|
||||
AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
|
||||
>;
|
||||
};
|
||||
|
||||
ecap0_pins: backlight_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
|
||||
AM33XX_IOPAD(0x964, MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
|
||||
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
|
||||
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
|
||||
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
|
||||
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
|
||||
0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
|
||||
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
|
||||
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
|
||||
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
|
||||
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
|
||||
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
|
||||
AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
|
||||
AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
|
||||
AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
|
||||
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
|
||||
AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
|
||||
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
|
||||
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
|
||||
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 reset value */
|
||||
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc3_pins: pinmux_mmc3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x44 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a1.mmc2_dat0, INPUT_PULLUP | MODE3 */
|
||||
0x48 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a2.mmc2_dat1, INPUT_PULLUP | MODE3 */
|
||||
0x4C (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a3.mmc2_dat2, INPUT_PULLUP | MODE3 */
|
||||
0x78 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ben1.mmc2_dat3, INPUT_PULLUP | MODE3 */
|
||||
0x88 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd, INPUT_PULLUP | MODE3 */
|
||||
0x8C (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk, INPUT_PULLUP | MODE3 */
|
||||
AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a1.mmc2_dat0, INPUT_PULLUP | MODE3 */
|
||||
AM33XX_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a2.mmc2_dat1, INPUT_PULLUP | MODE3 */
|
||||
AM33XX_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a3.mmc2_dat2, INPUT_PULLUP | MODE3 */
|
||||
AM33XX_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ben1.mmc2_dat3, INPUT_PULLUP | MODE3 */
|
||||
AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd, INPUT_PULLUP | MODE3 */
|
||||
AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk, INPUT_PULLUP | MODE3 */
|
||||
>;
|
||||
};
|
||||
|
||||
wlan_pins: pinmux_wlan_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.gpio1_16 */
|
||||
0x19C (PIN_INPUT | MUX_MODE7) /* mcasp0_ahclkr.gpio3_17 */
|
||||
0x1AC (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkx.gpio3_21 */
|
||||
AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.gpio1_16 */
|
||||
AM33XX_IOPAD(0x99c, PIN_INPUT | MUX_MODE7) /* mcasp0_ahclkr.gpio3_17 */
|
||||
AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkx.gpio3_21 */
|
||||
>;
|
||||
};
|
||||
|
||||
lcd_pins_s0: lcd_pins_s0 {
|
||||
pinctrl-single,pins = <
|
||||
0x20 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */
|
||||
0x24 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22 */
|
||||
0x28 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */
|
||||
0x2c (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20 */
|
||||
0x30 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19 */
|
||||
0x34 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18 */
|
||||
0x38 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17 */
|
||||
0x3c (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16 */
|
||||
0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
|
||||
0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
|
||||
0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
|
||||
0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
|
||||
0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
|
||||
0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
|
||||
0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
|
||||
0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
|
||||
0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
|
||||
0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
|
||||
0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
|
||||
0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
|
||||
0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
|
||||
0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
|
||||
0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
|
||||
0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
|
||||
0xe0 (PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */
|
||||
0xe4 (PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */
|
||||
0xe8 (PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */
|
||||
0xec (PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
|
||||
AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */
|
||||
AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22 */
|
||||
AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */
|
||||
AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20 */
|
||||
AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19 */
|
||||
AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18 */
|
||||
AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17 */
|
||||
AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16 */
|
||||
AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
|
||||
AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
|
||||
AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
|
||||
AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
|
||||
AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
|
||||
AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
|
||||
AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
|
||||
AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
|
||||
AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
|
||||
AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
|
||||
AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
|
||||
AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
|
||||
AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
|
||||
AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
|
||||
AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
|
||||
AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
|
||||
AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */
|
||||
AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */
|
||||
AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */
|
||||
AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp1_pins: mcasp1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
|
||||
0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
|
||||
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
|
||||
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
|
||||
AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
|
||||
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp1_pins_sleep: mcasp1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
dcan1_pins_default: dcan1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x168 (PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
|
||||
0x16c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
|
||||
AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
|
||||
AM33XX_IOPAD(0x96c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -204,234 +204,234 @@
|
|||
|
||||
lcd_pins_default: lcd_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x20 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */
|
||||
0x24 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22 */
|
||||
0x28 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */
|
||||
0x2c (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20 */
|
||||
0x30 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19 */
|
||||
0x34 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18 */
|
||||
0x38 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17 */
|
||||
0x3c (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16 */
|
||||
0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
|
||||
0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
|
||||
0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
|
||||
0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
|
||||
0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
|
||||
0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
|
||||
0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
|
||||
0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
|
||||
0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
|
||||
0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
|
||||
0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
|
||||
0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
|
||||
0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
|
||||
0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
|
||||
0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
|
||||
0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
|
||||
0xe0 (PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */
|
||||
0xe4 (PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */
|
||||
0xe8 (PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */
|
||||
0xec (PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
|
||||
AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */
|
||||
AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22 */
|
||||
AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */
|
||||
AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20 */
|
||||
AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19 */
|
||||
AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18 */
|
||||
AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17 */
|
||||
AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16 */
|
||||
AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
|
||||
AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
|
||||
AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
|
||||
AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
|
||||
AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
|
||||
AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
|
||||
AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
|
||||
AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
|
||||
AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
|
||||
AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
|
||||
AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
|
||||
AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
|
||||
AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
|
||||
AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
|
||||
AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
|
||||
AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
|
||||
AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */
|
||||
AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */
|
||||
AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */
|
||||
AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
|
||||
>;
|
||||
};
|
||||
|
||||
lcd_pins_sleep: lcd_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x20 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad8.lcd_data23 */
|
||||
0x24 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad9.lcd_data22 */
|
||||
0x28 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.lcd_data21 */
|
||||
0x2c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.lcd_data20 */
|
||||
0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.lcd_data19 */
|
||||
0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.lcd_data18 */
|
||||
0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.lcd_data17 */
|
||||
0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.lcd_data16 */
|
||||
0xa0 (PULL_DISABLE | MUX_MODE7) /* lcd_data0.lcd_data0 */
|
||||
0xa4 (PULL_DISABLE | MUX_MODE7) /* lcd_data1.lcd_data1 */
|
||||
0xa8 (PULL_DISABLE | MUX_MODE7) /* lcd_data2.lcd_data2 */
|
||||
0xac (PULL_DISABLE | MUX_MODE7) /* lcd_data3.lcd_data3 */
|
||||
0xb0 (PULL_DISABLE | MUX_MODE7) /* lcd_data4.lcd_data4 */
|
||||
0xb4 (PULL_DISABLE | MUX_MODE7) /* lcd_data5.lcd_data5 */
|
||||
0xb8 (PULL_DISABLE | MUX_MODE7) /* lcd_data6.lcd_data6 */
|
||||
0xbc (PULL_DISABLE | MUX_MODE7) /* lcd_data7.lcd_data7 */
|
||||
0xc0 (PULL_DISABLE | MUX_MODE7) /* lcd_data8.lcd_data8 */
|
||||
0xc4 (PULL_DISABLE | MUX_MODE7) /* lcd_data9.lcd_data9 */
|
||||
0xc8 (PULL_DISABLE | MUX_MODE7) /* lcd_data10.lcd_data10 */
|
||||
0xcc (PULL_DISABLE | MUX_MODE7) /* lcd_data11.lcd_data11 */
|
||||
0xd0 (PULL_DISABLE | MUX_MODE7) /* lcd_data12.lcd_data12 */
|
||||
0xd4 (PULL_DISABLE | MUX_MODE7) /* lcd_data13.lcd_data13 */
|
||||
0xd8 (PULL_DISABLE | MUX_MODE7) /* lcd_data14.lcd_data14 */
|
||||
0xdc (PULL_DISABLE | MUX_MODE7) /* lcd_data15.lcd_data15 */
|
||||
0xe0 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.lcd_vsync */
|
||||
0xe4 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.lcd_hsync */
|
||||
0xe8 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.lcd_pclk */
|
||||
0xec (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.lcd_ac_bias_en */
|
||||
AM33XX_IOPAD(0x820, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad8.lcd_data23 */
|
||||
AM33XX_IOPAD(0x824, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad9.lcd_data22 */
|
||||
AM33XX_IOPAD(0x828, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.lcd_data21 */
|
||||
AM33XX_IOPAD(0x82c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.lcd_data20 */
|
||||
AM33XX_IOPAD(0x830, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.lcd_data19 */
|
||||
AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.lcd_data18 */
|
||||
AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.lcd_data17 */
|
||||
AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.lcd_data16 */
|
||||
AM33XX_IOPAD(0x8a0, PULL_DISABLE | MUX_MODE7) /* lcd_data0.lcd_data0 */
|
||||
AM33XX_IOPAD(0x8a4, PULL_DISABLE | MUX_MODE7) /* lcd_data1.lcd_data1 */
|
||||
AM33XX_IOPAD(0x8a8, PULL_DISABLE | MUX_MODE7) /* lcd_data2.lcd_data2 */
|
||||
AM33XX_IOPAD(0x8ac, PULL_DISABLE | MUX_MODE7) /* lcd_data3.lcd_data3 */
|
||||
AM33XX_IOPAD(0x8b0, PULL_DISABLE | MUX_MODE7) /* lcd_data4.lcd_data4 */
|
||||
AM33XX_IOPAD(0x8b4, PULL_DISABLE | MUX_MODE7) /* lcd_data5.lcd_data5 */
|
||||
AM33XX_IOPAD(0x8b8, PULL_DISABLE | MUX_MODE7) /* lcd_data6.lcd_data6 */
|
||||
AM33XX_IOPAD(0x8bc, PULL_DISABLE | MUX_MODE7) /* lcd_data7.lcd_data7 */
|
||||
AM33XX_IOPAD(0x8c0, PULL_DISABLE | MUX_MODE7) /* lcd_data8.lcd_data8 */
|
||||
AM33XX_IOPAD(0x8c4, PULL_DISABLE | MUX_MODE7) /* lcd_data9.lcd_data9 */
|
||||
AM33XX_IOPAD(0x8c8, PULL_DISABLE | MUX_MODE7) /* lcd_data10.lcd_data10 */
|
||||
AM33XX_IOPAD(0x8cc, PULL_DISABLE | MUX_MODE7) /* lcd_data11.lcd_data11 */
|
||||
AM33XX_IOPAD(0x8d0, PULL_DISABLE | MUX_MODE7) /* lcd_data12.lcd_data12 */
|
||||
AM33XX_IOPAD(0x8d4, PULL_DISABLE | MUX_MODE7) /* lcd_data13.lcd_data13 */
|
||||
AM33XX_IOPAD(0x8d8, PULL_DISABLE | MUX_MODE7) /* lcd_data14.lcd_data14 */
|
||||
AM33XX_IOPAD(0x8dc, PULL_DISABLE | MUX_MODE7) /* lcd_data15.lcd_data15 */
|
||||
AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.lcd_vsync */
|
||||
AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.lcd_hsync */
|
||||
AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.lcd_pclk */
|
||||
AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.lcd_ac_bias_en */
|
||||
>;
|
||||
};
|
||||
|
||||
|
||||
user_leds_s0: user_leds_s0 {
|
||||
pinctrl-single,pins = <
|
||||
0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
|
||||
0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
|
||||
0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
|
||||
0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
|
||||
AM33XX_IOPAD(0x810, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
|
||||
AM33XX_IOPAD(0x814, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
|
||||
AM33XX_IOPAD(0x818, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
|
||||
AM33XX_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
|
||||
>;
|
||||
};
|
||||
|
||||
gpio_keys_s0: gpio_keys_s0 {
|
||||
pinctrl-single,pins = <
|
||||
0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
|
||||
0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
|
||||
0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
|
||||
0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
|
||||
AM33XX_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
|
||||
AM33XX_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
|
||||
AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
|
||||
AM33XX_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins: pinmux_i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: pinmux_uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
clkout2_pin: pinmux_clkout2_pin {
|
||||
pinctrl-single,pins = <
|
||||
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
|
||||
AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
|
||||
>;
|
||||
};
|
||||
|
||||
ecap2_pins: backlight_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */
|
||||
AM33XX_IOPAD(0x99c, MUX_MODE4) /* mcasp0_ahclkr.ecap2_in_pwm2_out */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
|
||||
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
|
||||
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
|
||||
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
|
||||
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
|
||||
0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
|
||||
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
|
||||
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
|
||||
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
|
||||
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
|
||||
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
|
||||
AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
|
||||
AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
|
||||
AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
|
||||
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
|
||||
AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
|
||||
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
|
||||
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
|
||||
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
|
||||
|
||||
/* Slave 2 */
|
||||
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
|
||||
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
|
||||
0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
|
||||
0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
|
||||
0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
|
||||
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
|
||||
0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
|
||||
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
|
||||
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
|
||||
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
|
||||
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
|
||||
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
|
||||
AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
|
||||
AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
|
||||
AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
|
||||
AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
|
||||
AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
|
||||
AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
|
||||
AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
|
||||
AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
|
||||
AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
|
||||
AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
|
||||
AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
|
||||
AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 reset value */
|
||||
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
|
||||
/* Slave 2 reset value*/
|
||||
0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp1_pins: mcasp1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
|
||||
0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
|
||||
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
|
||||
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
|
||||
AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
|
||||
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp1_pins_sleep: mcasp1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
|
||||
0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
|
||||
0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
|
||||
0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
|
||||
0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
|
||||
0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
|
||||
0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
|
||||
AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
|
||||
AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
|
||||
AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
|
||||
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
|
||||
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
|
||||
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
|
||||
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
wl12xx_gpio: pinmux_wl12xx_gpio {
|
||||
pinctrl-single,pins = <
|
||||
0x7c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
|
||||
AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -46,109 +46,109 @@
|
|||
&am33xx_pinmux {
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3 */
|
||||
0xf4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2 */
|
||||
0xf8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1 */
|
||||
0xfc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0 */
|
||||
0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk */
|
||||
0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd */
|
||||
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3 */
|
||||
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2 */
|
||||
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1 */
|
||||
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0 */
|
||||
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk */
|
||||
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins: pinmux_i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_int */
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_crs_dv */
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rxer */
|
||||
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_txen */
|
||||
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_td1 */
|
||||
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_td0 */
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rd1 */
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rd0 */
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk */
|
||||
AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_int */
|
||||
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_crs_dv */
|
||||
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rxer */
|
||||
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_txen */
|
||||
AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_td1 */
|
||||
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_td0 */
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rd1 */
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rd0 */
|
||||
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk */
|
||||
|
||||
/* Slave 2 */
|
||||
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_txen */
|
||||
0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td1 */
|
||||
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td0 */
|
||||
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd1 */
|
||||
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd0 */
|
||||
0x70 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_crs_dv */
|
||||
0x74 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rxer */
|
||||
0x78 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_int */
|
||||
0x108 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii2_refclk */
|
||||
AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_txen */
|
||||
AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td1 */
|
||||
AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td0 */
|
||||
AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd1 */
|
||||
AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd0 */
|
||||
AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_crs_dv */
|
||||
AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rxer */
|
||||
AM33XX_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_int */
|
||||
AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii2_refclk */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 reset value */
|
||||
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_int */
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_crs_dv */
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rxer */
|
||||
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_txen */
|
||||
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_td1 */
|
||||
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_td0 */
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rd1 */
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rd0 */
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_refclk */
|
||||
AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_int */
|
||||
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_crs_dv */
|
||||
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rxer */
|
||||
AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_txen */
|
||||
AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_td1 */
|
||||
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_td0 */
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rd1 */
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rd0 */
|
||||
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_refclk */
|
||||
|
||||
/* Slave 2 reset value*/
|
||||
0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_txen */
|
||||
0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_td1 */
|
||||
0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_td0 */
|
||||
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rd1 */
|
||||
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rd0 */
|
||||
0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_crs_dv */
|
||||
0x74 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rxer */
|
||||
0x78 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_int */
|
||||
0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_refclk */
|
||||
AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_txen */
|
||||
AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_td1 */
|
||||
AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_td0 */
|
||||
AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rd1 */
|
||||
AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rd0 */
|
||||
AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_crs_dv */
|
||||
AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rxer */
|
||||
AM33XX_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_int */
|
||||
AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_refclk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
emmc_pins: pinmux_emmc_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
|
||||
0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
|
||||
0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
|
||||
0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
|
||||
0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
|
||||
0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
|
||||
0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
|
||||
0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
|
||||
0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
|
||||
0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
|
||||
AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
|
||||
AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
|
||||
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
|
||||
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
|
||||
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
|
||||
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
|
||||
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
|
||||
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
|
||||
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
|
||||
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: pinmux_uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -41,121 +41,121 @@
|
|||
|
||||
misc_pins: misc_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x15c (PIN_OUTPUT | MUX_MODE7) /* spi0_cs0.gpio0_5 */
|
||||
AM33XX_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE7) /* spi0_cs0.gpio0_5 */
|
||||
>;
|
||||
};
|
||||
|
||||
gpmc_pins: gpmc_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
0x20 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad8.gpmc_ad8 */
|
||||
0x24 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad9.gpmc_ad9 */
|
||||
0x28 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad10.gpmc_ad10 */
|
||||
0x2c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad11.gpmc_ad11 */
|
||||
0x30 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad12.gpmc_ad12 */
|
||||
0x34 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad13.gpmc_ad13 */
|
||||
0x38 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad14.gpmc_ad14 */
|
||||
0x3c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad15.gpmc_ad15 */
|
||||
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad8.gpmc_ad8 */
|
||||
AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad9.gpmc_ad9 */
|
||||
AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad10.gpmc_ad10 */
|
||||
AM33XX_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad11.gpmc_ad11 */
|
||||
AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad12.gpmc_ad12 */
|
||||
AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad13.gpmc_ad13 */
|
||||
AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad14.gpmc_ad14 */
|
||||
AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad15.gpmc_ad15 */
|
||||
|
||||
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
0x80 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn1.gpmc_csn1 */
|
||||
0x84 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn2.gpmc_csn2 */
|
||||
0x88 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn3.gpmc_csn3 */
|
||||
AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
AM33XX_IOPAD(0x880, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn1.gpmc_csn1 */
|
||||
AM33XX_IOPAD(0x884, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn2.gpmc_csn2 */
|
||||
AM33XX_IOPAD(0x888, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn3.gpmc_csn3 */
|
||||
|
||||
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0_cle.gpmc_ben0_cle */
|
||||
AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0_cle.gpmc_ben0_cle */
|
||||
|
||||
0xa4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data1.gpmc_a1 */
|
||||
0xa8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data2.gpmc_a2 */
|
||||
0xac (PIN_OUTPUT | MUX_MODE1) /* lcd_data3.gpmc_a3 */
|
||||
0xb0 (PIN_OUTPUT | MUX_MODE1) /* lcd_data4.gpmc_a4 */
|
||||
0xb4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data5.gpmc_a5 */
|
||||
0xb8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data6.gpmc_a6 */
|
||||
0xbc (PIN_OUTPUT | MUX_MODE1) /* lcd_data7.gpmc_a7 */
|
||||
AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE1) /* lcd_data1.gpmc_a1 */
|
||||
AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE1) /* lcd_data2.gpmc_a2 */
|
||||
AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE1) /* lcd_data3.gpmc_a3 */
|
||||
AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE1) /* lcd_data4.gpmc_a4 */
|
||||
AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE1) /* lcd_data5.gpmc_a5 */
|
||||
AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE1) /* lcd_data6.gpmc_a6 */
|
||||
AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE1) /* lcd_data7.gpmc_a7 */
|
||||
|
||||
0xe0 (PIN_OUTPUT | MUX_MODE1) /* lcd_vsync.gpmc_a8 */
|
||||
0xe4 (PIN_OUTPUT | MUX_MODE1) /* lcd_hsync.gpmc_a9 */
|
||||
0xe8 (PIN_OUTPUT | MUX_MODE1) /* lcd_pclk.gpmc_a10 */
|
||||
AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE1) /* lcd_vsync.gpmc_a8 */
|
||||
AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE1) /* lcd_hsync.gpmc_a9 */
|
||||
AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE1) /* lcd_pclk.gpmc_a10 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins: i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
AM33XX_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
0x174 (PIN_OUTPUT | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
AM33XX_IOPAD(0x974, PIN_OUTPUT | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins: uart1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x178 (PIN_OUTPUT | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */
|
||||
0x17c (PIN_OUTPUT | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */
|
||||
0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
|
||||
0x184 (PIN_OUTPUT | MUX_MODE0) /* uart1_txd.uart1_txd */
|
||||
AM33XX_IOPAD(0x978, PIN_OUTPUT | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */
|
||||
AM33XX_IOPAD(0x97c, PIN_OUTPUT | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */
|
||||
AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
|
||||
AM33XX_IOPAD(0x984, PIN_OUTPUT | MUX_MODE0) /* uart1_txd.uart1_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins: uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xc0 (PIN_INPUT_PULLUP | MUX_MODE7) /* lcd_data8.gpio2[14] */
|
||||
0xc4 (PIN_OUTPUT | MUX_MODE7) /* lcd_data9.gpio2[15] */
|
||||
0x150 (PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd */
|
||||
0x154 (PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd */
|
||||
AM33XX_IOPAD(0x8c0, PIN_INPUT_PULLUP | MUX_MODE7) /* lcd_data8.gpio2[14] */
|
||||
AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE7) /* lcd_data9.gpio2[15] */
|
||||
AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd */
|
||||
AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xc8 (PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data10.uart3_ctsn */
|
||||
0xcc (PIN_OUTPUT | MUX_MODE6) /* lcd_data11.uart3_rtsn */
|
||||
0x160 (PIN_INPUT | MUX_MODE1) /* spi0_cs1.uart3_rxd */
|
||||
0x164 (PIN_OUTPUT | MUX_MODE1) /* ecap0_in_pwm0_out.uart3_txd */
|
||||
AM33XX_IOPAD(0x8c8, PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data10.uart3_ctsn */
|
||||
AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE6) /* lcd_data11.uart3_rtsn */
|
||||
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE1) /* spi0_cs1.uart3_rxd */
|
||||
AM33XX_IOPAD(0x964, PIN_OUTPUT | MUX_MODE1) /* ecap0_in_pwm0_out.uart3_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart4_pins: uart4_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xd0 (PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data12.uart4_ctsn */
|
||||
0xd4 (PIN_OUTPUT | MUX_MODE6) /* lcd_data13.uart4_rtsn */
|
||||
0x168 (PIN_INPUT | MUX_MODE1) /* uart0_ctsn.uart4_rxd */
|
||||
0x16c (PIN_OUTPUT | MUX_MODE1) /* uart0_rtsn.uart4_txd */
|
||||
AM33XX_IOPAD(0x8d0, PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data12.uart4_ctsn */
|
||||
AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE6) /* lcd_data13.uart4_rtsn */
|
||||
AM33XX_IOPAD(0x968, PIN_INPUT | MUX_MODE1) /* uart0_ctsn.uart4_rxd */
|
||||
AM33XX_IOPAD(0x96c, PIN_OUTPUT | MUX_MODE1) /* uart0_rtsn.uart4_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart5_pins: uart5_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xd8 (PIN_INPUT | MUX_MODE4) /* lcd_data14.uart5_rxd */
|
||||
0x144 (PIN_OUTPUT | MUX_MODE3) /* rmiii1_refclk.uart5_txd */
|
||||
AM33XX_IOPAD(0x8d8, PIN_INPUT | MUX_MODE4) /* lcd_data14.uart5_rxd */
|
||||
AM33XX_IOPAD(0x944, PIN_OUTPUT | MUX_MODE3) /* rmiii1_refclk.uart5_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
0xf4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
0xf8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
0xfc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
0x1e8 (PIN_INPUT_PULLUP | MUX_MODE7) /* emu1.gpio3[8] */
|
||||
0x1a0 (PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3[18] */
|
||||
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
AM33XX_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE7) /* emu1.gpio3[8] */
|
||||
AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3[18] */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -375,11 +375,15 @@
|
|||
wp-gpios = <&gpio3 18 0>;
|
||||
};
|
||||
|
||||
#include "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
/* +1.5V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <1450000>;
|
||||
regulator-max-microvolt = <1550000>;
|
||||
|
|
@ -388,6 +392,7 @@
|
|||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
/* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <915000>;
|
||||
|
|
@ -397,6 +402,7 @@
|
|||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <915000>;
|
||||
|
|
@ -406,6 +412,7 @@
|
|||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
/* +1.8V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <1750000>;
|
||||
regulator-max-microvolt = <1870000>;
|
||||
|
|
@ -414,6 +421,7 @@
|
|||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
/* +3.3V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <3175000>;
|
||||
regulator-max-microvolt = <3430000>;
|
||||
|
|
@ -422,6 +430,7 @@
|
|||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
/* +1.8V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <1750000>;
|
||||
regulator-max-microvolt = <1870000>;
|
||||
|
|
@ -430,6 +439,7 @@
|
|||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
/* +3.3V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <3175000>;
|
||||
regulator-max-microvolt = <3430000>;
|
||||
|
|
|
|||
|
|
@ -93,14 +93,14 @@
|
|||
&am33xx_pinmux {
|
||||
i2c0_pins: pinmux_i2c0 {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
i2c1_pins: pinmux_i2c1 {
|
||||
pinctrl-single,pins = <
|
||||
0x10C (PIN_INPUT_PULLUP | MUX_MODE3) /* mii1_crs,i2c1_sda */
|
||||
0x110 (PIN_INPUT_PULLUP | MUX_MODE3) /* mii1_rxerr,i2c1_scl */
|
||||
AM33XX_IOPAD(0x90C, PIN_INPUT_PULLUP | MUX_MODE3) /* mii1_crs,i2c1_sda */
|
||||
AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE3) /* mii1_rxerr,i2c1_scl */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -130,7 +130,7 @@
|
|||
&am33xx_pinmux {
|
||||
accel_pins: pinmux_accel {
|
||||
pinctrl-single,pins = <
|
||||
0x98 (PIN_INPUT | MUX_MODE7) /* gpmc_wen.gpio2_4 */
|
||||
AM33XX_IOPAD(0x898, PIN_INPUT | MUX_MODE7) /* gpmc_wen.gpio2_4 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -177,12 +177,12 @@
|
|||
&am33xx_pinmux {
|
||||
audio_pins: pinmux_audio {
|
||||
pinctrl-single,pins = <
|
||||
0x1AC (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
|
||||
0x194 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
|
||||
0x190 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
|
||||
0x198 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0.mcasp0_axr0 */
|
||||
0x1A8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr1.mcasp0_axr1 */
|
||||
0x40 (PIN_OUTPUT | MUX_MODE7) /* gpmc_a0.gpio1_16 */
|
||||
AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
|
||||
AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
|
||||
AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
|
||||
AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0.mcasp0_axr0 */
|
||||
AM33XX_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr1.mcasp0_axr1 */
|
||||
AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE7) /* gpmc_a0.gpio1_16 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -228,36 +228,36 @@
|
|||
&am33xx_pinmux {
|
||||
lcd_pins: pinmux_lcd {
|
||||
pinctrl-single,pins = <
|
||||
0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
|
||||
0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
|
||||
0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
|
||||
0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
|
||||
0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
|
||||
0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
|
||||
0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
|
||||
0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
|
||||
0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
|
||||
0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
|
||||
0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
|
||||
0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
|
||||
0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
|
||||
0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
|
||||
0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
|
||||
0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
|
||||
0x20 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data16 */
|
||||
0x24 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data17 */
|
||||
0x28 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data18 */
|
||||
0x2c (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data19 */
|
||||
0x30 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data20 */
|
||||
0x34 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data21 */
|
||||
0x38 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data22 */
|
||||
0x3c (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data23 */
|
||||
0xe0 (PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */
|
||||
0xe4 (PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */
|
||||
0xe8 (PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */
|
||||
0xec (PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
|
||||
AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
|
||||
AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
|
||||
AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
|
||||
AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
|
||||
AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
|
||||
AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
|
||||
AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
|
||||
AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
|
||||
AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
|
||||
AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
|
||||
AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
|
||||
AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
|
||||
AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
|
||||
AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
|
||||
AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
|
||||
AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
|
||||
AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data16 */
|
||||
AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data17 */
|
||||
AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data18 */
|
||||
AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data19 */
|
||||
AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data20 */
|
||||
AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data21 */
|
||||
AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data22 */
|
||||
AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data23 */
|
||||
AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */
|
||||
AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */
|
||||
AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */
|
||||
AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
|
||||
/* Display Enable */
|
||||
0x6c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a11.gpio1_27 */
|
||||
AM33XX_IOPAD(0x86c, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a11.gpio1_27 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -291,29 +291,29 @@
|
|||
&am33xx_pinmux {
|
||||
ethernet_pins: pinmux_ethernet {
|
||||
pinctrl-single,pins = <
|
||||
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
|
||||
0x118 (PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
|
||||
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
|
||||
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
|
||||
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
|
||||
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
|
||||
0x12c (PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
|
||||
0x130 (PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
|
||||
0x134 (PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd3.rgmii1_rxd3 */
|
||||
0x138 (PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd2.rgmii1_rxd2 */
|
||||
0x13c (PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd1 */
|
||||
0x140 (PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd0 */
|
||||
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
|
||||
AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
|
||||
AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
|
||||
AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
|
||||
AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
|
||||
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
|
||||
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
|
||||
AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
|
||||
AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd3.rgmii1_rxd3 */
|
||||
AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd2.rgmii1_rxd2 */
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd1 */
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd0 */
|
||||
/* ethernet interrupt */
|
||||
0x144 (PIN_INPUT_PULLUP | MUX_MODE7) /* rmii2_refclk.gpio0_29 */
|
||||
AM33XX_IOPAD(0x944, PIN_INPUT_PULLUP | MUX_MODE7) /* rmii2_refclk.gpio0_29 */
|
||||
/* ethernet PHY nReset */
|
||||
0x108 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* mii1_col.gpio3_0 */
|
||||
AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLUP | MUX_MODE7) /* mii1_col.gpio3_0 */
|
||||
>;
|
||||
};
|
||||
|
||||
mdio_pins: pinmux_mdio {
|
||||
pinctrl-single,pins = <
|
||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -363,45 +363,45 @@
|
|||
&am33xx_pinmux {
|
||||
sd_pins: pinmux_sd_card {
|
||||
pinctrl-single,pins = <
|
||||
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
0xf4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
0xf8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
0xfc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
>;
|
||||
};
|
||||
emmc_pins: pinmux_emmc {
|
||||
pinctrl-single,pins = <
|
||||
0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
|
||||
0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
|
||||
0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
|
||||
0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
|
||||
0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
|
||||
0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
|
||||
0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
|
||||
0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
|
||||
0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
|
||||
0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
|
||||
AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
|
||||
AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
|
||||
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
|
||||
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
|
||||
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
|
||||
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
|
||||
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
|
||||
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
|
||||
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
|
||||
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
|
||||
/* EMMC nReset */
|
||||
0x74 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
|
||||
AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
|
||||
>;
|
||||
};
|
||||
wireless_pins: pinmux_wireless {
|
||||
pinctrl-single,pins = <
|
||||
0x44 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a1.mmc2_dat0 */
|
||||
0x48 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a2.mmc2_dat1 */
|
||||
0x4c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a3.mmc2_dat2 */
|
||||
0x78 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ben1.mmc2_dat3 */
|
||||
0x88 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
|
||||
0x8c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc1_clk */
|
||||
AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a1.mmc2_dat0 */
|
||||
AM33XX_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a2.mmc2_dat1 */
|
||||
AM33XX_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a3.mmc2_dat2 */
|
||||
AM33XX_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ben1.mmc2_dat3 */
|
||||
AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
|
||||
AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc1_clk */
|
||||
/* WLAN nReset */
|
||||
0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
|
||||
AM33XX_IOPAD(0x860, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
|
||||
/* WLAN nPower down */
|
||||
0x70 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
|
||||
AM33XX_IOPAD(0x870, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
|
||||
/* 32kHz Clock */
|
||||
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
|
||||
AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -427,9 +427,9 @@
|
|||
vin-supply = <&vbat>;
|
||||
};
|
||||
|
||||
/include/ "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
|
||||
backlight {
|
||||
isel = <1>; /* ISET1 */
|
||||
fdim = <200>; /* TPS65217_BL_FDIM_200HZ */
|
||||
|
|
@ -437,12 +437,17 @@
|
|||
};
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
/* VDD_1V8 system supply */
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
/* VDD_CORE voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <925000>;
|
||||
|
|
@ -452,6 +457,7 @@
|
|||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
/* VDD_MPU voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <925000>;
|
||||
|
|
@ -461,18 +467,21 @@
|
|||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
/* VRTC 1.8V always-on supply */
|
||||
regulator-name = "vrtc,vdds";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
/* 3.3V rail */
|
||||
regulator-name = "vdd_3v3aux";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
/* VDD_3V3A 3.3V rail */
|
||||
regulator-name = "vdd_3v3a";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
|
|
@ -480,6 +489,7 @@
|
|||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
/* VDD_3V3B 3.3V rail */
|
||||
regulator-name = "vdd_3v3b";
|
||||
regulator-always-on;
|
||||
|
|
@ -497,10 +507,10 @@
|
|||
&am33xx_pinmux {
|
||||
spi0_pins: pinmux_spi0 {
|
||||
pinctrl-single,pins = <
|
||||
0x150 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
|
||||
0x15C (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
|
||||
0x154 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
|
||||
0x158 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
|
||||
AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
|
||||
AM33XX_IOPAD(0x95C, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
|
||||
AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
|
||||
AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -538,16 +548,16 @@
|
|||
&am33xx_pinmux {
|
||||
uart0_pins: pinmux_uart0 {
|
||||
pinctrl-single,pins = <
|
||||
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
uart1_pins: pinmux_uart1 {
|
||||
pinctrl-single,pins = <
|
||||
0x178 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
|
||||
0x17C (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
|
||||
0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
|
||||
0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
|
||||
AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
|
||||
AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
|
||||
AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
|
||||
AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -590,9 +600,9 @@
|
|||
usb_pins: pinmux_usb {
|
||||
pinctrl-single,pins = <
|
||||
/* USB0 Over-Current (active low) */
|
||||
0x64 (PIN_INPUT | MUX_MODE7) /* gpmc_a9.gpio1_25 */
|
||||
AM33XX_IOPAD(0x864, PIN_INPUT | MUX_MODE7) /* gpmc_a9.gpio1_25 */
|
||||
/* USB1 Over-Current (active low) */
|
||||
0x68 (PIN_INPUT | MUX_MODE7) /* gpmc_a10.gpio1_26 */
|
||||
AM33XX_IOPAD(0x868, PIN_INPUT | MUX_MODE7) /* gpmc_a10.gpio1_26 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -648,16 +658,16 @@
|
|||
&am33xx_pinmux {
|
||||
user_leds_pins: pinmux_user_leds {
|
||||
pinctrl-single,pins = <
|
||||
0x50 (PIN_OUTPUT | MUX_MODE7) /* gpmc_a4.gpio1_20 */
|
||||
0x54 (PIN_OUTPUT | MUX_MODE7) /* gpmc_a5.gpio1_21 */
|
||||
AM33XX_IOPAD(0x850, PIN_OUTPUT | MUX_MODE7) /* gpmc_a4.gpio1_20 */
|
||||
AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) /* gpmc_a5.gpio1_21 */
|
||||
>;
|
||||
};
|
||||
|
||||
user_buttons_pins: pinmux_user_buttons {
|
||||
pinctrl-single,pins = <
|
||||
0x58 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
|
||||
0x5C (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a7.gpio1_21 */
|
||||
0x164 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio0_7 */
|
||||
AM33XX_IOPAD(0x858, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
|
||||
AM33XX_IOPAD(0x85C, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a7.gpio1_21 */
|
||||
AM33XX_IOPAD(0x964, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio0_7 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -56,22 +56,22 @@
|
|||
&am33xx_pinmux {
|
||||
ethernet0_pins: pinmux_ethernet0 {
|
||||
pinctrl-single,pins = <
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
|
||||
0x114 (PIN_OUTPUT | MUX_MODE1) /* mii1_txen.rmii1_txen */
|
||||
0x124 (PIN_OUTPUT | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
|
||||
0x128 (PIN_OUTPUT | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */
|
||||
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
|
||||
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
|
||||
AM33XX_IOPAD(0x914, PIN_OUTPUT | MUX_MODE1) /* mii1_txen.rmii1_txen */
|
||||
AM33XX_IOPAD(0x924, PIN_OUTPUT | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
|
||||
AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
|
||||
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */
|
||||
>;
|
||||
};
|
||||
|
||||
mdio_pins: pinmux_mdio {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -103,8 +103,8 @@
|
|||
&am33xx_pinmux {
|
||||
i2c0_pins: pinmux_i2c0 {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -137,20 +137,20 @@
|
|||
&am33xx_pinmux {
|
||||
nandflash_pins: pinmux_nandflash {
|
||||
pinctrl-single,pins = <
|
||||
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
|
||||
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -324,10 +324,10 @@
|
|||
&am33xx_pinmux {
|
||||
spi0_pins: pinmux_spi0 {
|
||||
pinctrl-single,pins = <
|
||||
0x150 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_clk.spi0_clk */
|
||||
0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_d0.spi0_d0 */
|
||||
0x158 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
|
||||
0x15c (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
|
||||
AM33XX_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_clk.spi0_clk */
|
||||
AM33XX_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_d0.spi0_d0 */
|
||||
AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
|
||||
AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,577 @@
|
|||
/*
|
||||
* support for the bosch am335x based shc c3 board
|
||||
*
|
||||
* Copyright, C) 2015 Heiko Schocher <hs@denx.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "am33xx.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
model = "Bosch SHC";
|
||||
compatible = "ti,am335x-shc", "ti,am335x-bone", "ti,am33xx";
|
||||
|
||||
aliases {
|
||||
mmcblk0 = &mmc1;
|
||||
mmcblk1 = &mmc2;
|
||||
};
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
/*
|
||||
* To consider voltage drop between PMIC and SoC,
|
||||
* tolerance value is reduced to 2% from 4% and
|
||||
* voltage value is increased as a precaution.
|
||||
*/
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
594000 1225000
|
||||
294000 1125000
|
||||
>;
|
||||
voltage-tolerance = <2>; /* 2 percentage */
|
||||
cpu0-supply = <&dcdc2_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
back_button {
|
||||
label = "Back Button";
|
||||
gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <KEY_BACK>;
|
||||
debounce-interval = <1000>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
front_button {
|
||||
label = "Front Button";
|
||||
gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <KEY_FRONT>;
|
||||
debounce-interval = <1000>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&user_leds_s0>;
|
||||
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led@1 {
|
||||
label = "shc:power:red";
|
||||
gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@2 {
|
||||
label = "shc:power:bl";
|
||||
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
default-state = "on";
|
||||
};
|
||||
|
||||
led@3 {
|
||||
label = "shc:lan:red";
|
||||
gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@4 {
|
||||
label = "shc:lan:bl";
|
||||
gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@5 {
|
||||
label = "shc:cloud:red";
|
||||
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@6 {
|
||||
label = "shc:cloud:bl";
|
||||
gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
|
||||
vmmcsd_fixed: fixedregulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmcsd_fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
&aes {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cppi41dma {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&davinci_mdio_default>;
|
||||
pinctrl-1 = <&davinci_mdio_sleep>;
|
||||
status = "okay";
|
||||
|
||||
ethernetphy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
smsc,disable-energy-detect;
|
||||
};
|
||||
};
|
||||
|
||||
&epwmss1 {
|
||||
status = "okay";
|
||||
|
||||
ehrpwm1: ehrpwm@48302200 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ehrpwm1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
hmtc_rst {
|
||||
gpio-hog;
|
||||
gpios = <24 GPIO_ACTIVE_LOW>;
|
||||
output-high;
|
||||
line-name = "homematic_reset";
|
||||
};
|
||||
|
||||
hmtc_prog {
|
||||
gpio-hog;
|
||||
gpios = <27 GPIO_ACTIVE_LOW>;
|
||||
output-high;
|
||||
line-name = "homematic_program";
|
||||
};
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
zgb_rst {
|
||||
gpio-hog;
|
||||
gpios = <18 GPIO_ACTIVE_LOW>;
|
||||
output-low;
|
||||
line-name = "zigbee_reset";
|
||||
};
|
||||
|
||||
zgb_boot {
|
||||
gpio-hog;
|
||||
gpios = <19 GPIO_ACTIVE_HIGH>;
|
||||
output-high;
|
||||
line-name = "zigbee_boot";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tps: tps@24 {
|
||||
reg = <0x24>;
|
||||
};
|
||||
|
||||
at24@50 {
|
||||
compatible = "at24,24c32";
|
||||
pagesize = <32>;
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
pcf8563@51 {
|
||||
compatible = "nxp,pcf8563";
|
||||
reg = <0x51>;
|
||||
};
|
||||
};
|
||||
|
||||
&mac {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cpsw_default>;
|
||||
pinctrl-1 = <&cpsw_sleep>;
|
||||
status = "okay";
|
||||
slaves = <1>;
|
||||
cpsw_emac0: slave@4a100200 {
|
||||
phy_id = <&davinci_mdio>, <0>;
|
||||
phy-mode = "mii";
|
||||
phy-handle = <ðernetphy0>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
bus-width = <0x4>;
|
||||
cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
|
||||
cd-inverted;
|
||||
max-frequency = <26000000>;
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_pins>;
|
||||
bus-width = <8>;
|
||||
max-frequency = <26000000>;
|
||||
sd-uhs-sdr25;
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc3_pins>;
|
||||
bus-width = <4>;
|
||||
cap-power-off-card;
|
||||
max-frequency = <26000000>;
|
||||
sd-uhs-sdr25;
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
ti,no-init;
|
||||
};
|
||||
|
||||
&sham {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
ti,pmic-shutdown-controller;
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-name = "vdds_dpr";
|
||||
regulator-compatible = "dcdc1";
|
||||
regulator-min-microvolt = <1300000>;
|
||||
regulator-max-microvolt = <1450000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
/*
|
||||
* VDD_MPU voltage limits 0.95V - 1.26V with
|
||||
* +/-4% tolerance
|
||||
*/
|
||||
regulator-compatible = "dcdc2";
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <925000>;
|
||||
regulator-max-microvolt = <1375000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-ramp-delay = <70000>;
|
||||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
/*
|
||||
* VDD_CORE voltage limits 0.95V - 1.1V with
|
||||
* +/-4% tolerance
|
||||
*/
|
||||
regulator-name = "vdd_core";
|
||||
regulator-compatible = "dcdc3";
|
||||
regulator-min-microvolt = <925000>;
|
||||
regulator-max-microvolt = <1125000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-name = "vio,vrtc,vdds";
|
||||
regulator-compatible = "ldo1";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-name = "vdd_3v3aux";
|
||||
regulator-compatible = "ldo2";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-name = "vdd_1v8";
|
||||
regulator-compatible = "ldo3";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-name = "vdd_3v3a";
|
||||
regulator-compatible = "ldo4";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_ctrl_mod {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&am33xx_pinmux {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&clkout2_pin>;
|
||||
|
||||
clkout2_pin: pinmux_clkout2_pin {
|
||||
pinctrl-single,pins = <
|
||||
/* xdma_event_intr1.clkout2 */
|
||||
AM33XX_IOPAD(0x9b4, PIN_INPUT | MUX_MODE6)
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 reset value */
|
||||
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* mdio_data.mdio_data */
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
|
||||
/* mdio_clk.mdio_clk */
|
||||
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
ehrpwm1_pins: pinmux_ehrpwm1 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE6) /* gpmc_a3.gpio1_19 */
|
||||
>;
|
||||
};
|
||||
|
||||
emmc_pins: pinmux_emmc_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x880, PIN_INPUT | MUX_MODE2)
|
||||
AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2)
|
||||
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1)
|
||||
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1)
|
||||
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1)
|
||||
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1)
|
||||
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1)
|
||||
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1)
|
||||
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1)
|
||||
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1)
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins: pinmux_i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE5)
|
||||
>;
|
||||
};
|
||||
|
||||
mmc3_pins: pinmux_mmc3_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x830, PIN_INPUT | MUX_MODE3)
|
||||
AM33XX_IOPAD(0x834, PIN_INPUT | MUX_MODE3)
|
||||
AM33XX_IOPAD(0x838, PIN_INPUT | MUX_MODE3)
|
||||
AM33XX_IOPAD(0x83c, PIN_INPUT | MUX_MODE3)
|
||||
AM33XX_IOPAD(0x888, PIN_INPUT | MUX_MODE3)
|
||||
AM33XX_IOPAD(0x88c, PIN_INPUT | MUX_MODE3)
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: pinmux_uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x968, PIN_INPUT_PULLDOWN | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x96c, PIN_OUTPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x970, PIN_INPUT_PULLDOWN | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x974, PIN_OUTPUT | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins: pinmux_uart1 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x97C, PIN_OUTPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE0)
|
||||
AM33XX_IOPAD(0x984, PIN_OUTPUT | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1)
|
||||
AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1)
|
||||
>;
|
||||
};
|
||||
|
||||
uart4_pins: pinmux_uart4_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6)
|
||||
AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE6)
|
||||
>;
|
||||
};
|
||||
|
||||
user_leds_s0: user_leds_s0 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x844, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLUP | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x860, PIN_INPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x864, PIN_INPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x868, PIN_INPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x86c, PIN_INPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x878, PIN_OUTPUT_PULLUP | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x87c, PIN_INPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x894, PIN_INPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x958, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x964, PIN_OUTPUT_PULLUP | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x9a0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -375,16 +375,19 @@
|
|||
pinctrl-0 = <&uart4_pins>;
|
||||
};
|
||||
|
||||
#include "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
ti,pmic-shutdown-controller;
|
||||
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <7>; /* NNMI */
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
/* VDDS_DDR */
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
|
|
@ -392,6 +395,7 @@
|
|||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <925000>;
|
||||
|
|
@ -401,6 +405,7 @@
|
|||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <925000>;
|
||||
|
|
@ -410,6 +415,7 @@
|
|||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
/* VRTC / VIO / VDDS*/
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
|
|
@ -417,6 +423,7 @@
|
|||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
/* VDD_3V3AUX */
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
|
|
@ -424,6 +431,7 @@
|
|||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
/* VDD_1V8 */
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
|
@ -431,6 +439,7 @@
|
|||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
/* VDD_3V3A */
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
|
|
|||
|
|
@ -28,8 +28,8 @@
|
|||
&am33xx_pinmux {
|
||||
dcan1_pins: pinmux_dcan1 {
|
||||
pinctrl-single,pins = <
|
||||
0x168 (PIN_OUTPUT_PULLUP | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
|
||||
0x16c (PIN_INPUT_PULLUP | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
|
||||
AM33XX_IOPAD(0x968, PIN_OUTPUT_PULLUP | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
|
||||
AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -44,20 +44,20 @@
|
|||
&am33xx_pinmux {
|
||||
ethernet1_pins: pinmux_ethernet1 {
|
||||
pinctrl-single,pins = <
|
||||
0x40 (PIN_OUTPUT | MUX_MODE1) /* gpmc_a0.mii2_txen */
|
||||
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a1.mii2_rxdv */
|
||||
0x48 (PIN_OUTPUT | MUX_MODE1) /* gpmc_a2.mii2_txd3 */
|
||||
0x4c (PIN_OUTPUT | MUX_MODE1) /* gpmc_a3.mii2_txd2 */
|
||||
0x50 (PIN_OUTPUT | MUX_MODE1) /* gpmc_a4.mii2_txd1 */
|
||||
0x54 (PIN_OUTPUT | MUX_MODE1) /* gpmc_a5.mii2_txd0 */
|
||||
0x58 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a6.mii2_txclk */
|
||||
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a7.mii2_rxclk */
|
||||
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a8.mii2_rxd3 */
|
||||
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a9.mii2_rxd2 */
|
||||
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a10.mii2_rxd1 */
|
||||
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a11.mii2_rxd0 */
|
||||
0x74 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_wpn.mii2_rxerr */
|
||||
0x78 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_ben1.mii2_col */
|
||||
AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE1) /* gpmc_a0.mii2_txen */
|
||||
AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a1.mii2_rxdv */
|
||||
AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE1) /* gpmc_a2.mii2_txd3 */
|
||||
AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE1) /* gpmc_a3.mii2_txd2 */
|
||||
AM33XX_IOPAD(0x850, PIN_OUTPUT | MUX_MODE1) /* gpmc_a4.mii2_txd1 */
|
||||
AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE1) /* gpmc_a5.mii2_txd0 */
|
||||
AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a6.mii2_txclk */
|
||||
AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a7.mii2_rxclk */
|
||||
AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a8.mii2_rxd3 */
|
||||
AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a9.mii2_rxd2 */
|
||||
AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a10.mii2_rxd1 */
|
||||
AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a11.mii2_rxd0 */
|
||||
AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_wpn.mii2_rxerr */
|
||||
AM33XX_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_ben1.mii2_col */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -79,13 +79,13 @@
|
|||
&am33xx_pinmux {
|
||||
mmc1_pins: pinmux_mmc1 {
|
||||
pinctrl-single,pins = <
|
||||
0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
0x0FC (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
0x160 (PIN_INPUT_PULLUP | MUX_MODE7) /* spi0_cs1.mmc0_sdcd */
|
||||
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE7) /* spi0_cs1.mmc0_sdcd */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -103,17 +103,17 @@
|
|||
&am33xx_pinmux {
|
||||
uart0_pins: pinmux_uart0 {
|
||||
pinctrl-single,pins = <
|
||||
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins: pinmux_uart1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
|
||||
0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
|
||||
0x178 (PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
|
||||
0x17c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
|
||||
AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
|
||||
AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
|
||||
AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
|
||||
AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -819,6 +819,8 @@
|
|||
ti,no-idle-on-init;
|
||||
reg = <0x50000000 0x2000>;
|
||||
interrupts = <100>;
|
||||
dmas = <&edma 52>;
|
||||
dma-names = "rxtx";
|
||||
gpmc,num-cs = <7>;
|
||||
gpmc,num-waitpins = <2>;
|
||||
#address-cells = <2>;
|
||||
|
|
|
|||
|
|
@ -77,7 +77,7 @@
|
|||
&omap3_pmx_core {
|
||||
tps_pins: pinmux_tps_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq.sys_nirq */
|
||||
OMAP3_CORE1_IOPAD(0x21e0, PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq.sys_nirq */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -30,6 +30,7 @@
|
|||
serial5 = &uart5;
|
||||
ethernet0 = &cpsw_emac0;
|
||||
ethernet1 = &cpsw_emac1;
|
||||
spi0 = &qspi;
|
||||
};
|
||||
|
||||
cpus {
|
||||
|
|
@ -842,6 +843,8 @@
|
|||
gpmc: gpmc@50000000 {
|
||||
compatible = "ti,am3352-gpmc";
|
||||
ti,hwmods = "gpmc";
|
||||
dmas = <&edma 52>;
|
||||
dma-names = "rxtx";
|
||||
clocks = <&l3s_gclk>;
|
||||
clock-names = "fck";
|
||||
reg = <0x50000000 0x2000>;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,422 @@
|
|||
/*
|
||||
* Copyright (C) 2015 CompuLab, Ltd. - http://www.compulab.co.il/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/pinctrl/am43xx.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include "am4372.dtsi"
|
||||
|
||||
/ {
|
||||
model = "CompuLab CM-T43";
|
||||
compatible = "compulab,am437x-cm-t43", "ti,am4372", "ti,am43";
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
ledb {
|
||||
label = "cm-t43:green";
|
||||
gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
vmmc_3v3: fixedregulator-v3_3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmc_3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
&am43xx_pinmux {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cm_t43_led_pins>;
|
||||
|
||||
cm_t43_led_pins: cm_t43_led_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0xa78, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins: i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
emmc_pins: emmc_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad8.mmc1_dat0 */
|
||||
AM4372_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad9.mmc1_dat1 */
|
||||
AM4372_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad10.mmc1_dat2 */
|
||||
AM4372_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad11.mmc1_dat3 */
|
||||
AM4372_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad12.mmc1_dat4 */
|
||||
AM4372_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad13.mmc1_dat5 */
|
||||
AM4372_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad14.mmc1_dat6 */
|
||||
AM4372_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad15.mmc1_dat7 */
|
||||
AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
|
||||
AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
|
||||
>;
|
||||
};
|
||||
|
||||
spi0_pins: pinmux_spi0_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0) /* spi0_sclk.spi0_sclk */
|
||||
AM4372_IOPAD(0x954, PIN_INPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
|
||||
AM4372_IOPAD(0x958, PIN_OUTPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
|
||||
AM4372_IOPAD(0x95C, PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
nand_flash_x8: nand_flash_x8 {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0x800, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
|
||||
AM4372_IOPAD(0x804, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
|
||||
AM4372_IOPAD(0x808, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
|
||||
AM4372_IOPAD(0x80c, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
|
||||
AM4372_IOPAD(0x810, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
|
||||
AM4372_IOPAD(0x814, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
|
||||
AM4372_IOPAD(0x818, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
|
||||
AM4372_IOPAD(0x81c, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
|
||||
AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x898, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
|
||||
AM4372_IOPAD(0x894, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
|
||||
AM4372_IOPAD(0x890, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
|
||||
AM4372_IOPAD(0x89c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_txen */
|
||||
AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rxctl */
|
||||
AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd3 */
|
||||
AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd2 */
|
||||
AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd1 */
|
||||
AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd0 */
|
||||
AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
|
||||
AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
|
||||
AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd3 */
|
||||
AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd2 */
|
||||
AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd1 */
|
||||
AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd0 */
|
||||
AM4372_IOPAD(0xa74, MUX_MODE3)
|
||||
/* Slave 2 */
|
||||
AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.txen */
|
||||
AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rxctl */
|
||||
AM4372_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.txd3 */
|
||||
AM4372_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.txd2 */
|
||||
AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.txd1 */
|
||||
AM4372_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.txd0 */
|
||||
AM4372_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.tclk */
|
||||
AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rclk */
|
||||
AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rxd3 */
|
||||
AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rxd2 */
|
||||
AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rxd1 */
|
||||
AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rxd0 */
|
||||
AM4372_IOPAD(0xa38, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&nand_flash_x8>;
|
||||
ranges = <0 0 0x08000000 0x1000000>;
|
||||
nand@0,0 {
|
||||
reg = <0 0 0>;
|
||||
ti,nand-ecc-opt = "bch8";
|
||||
ti,elm-id = <&elm>;
|
||||
|
||||
nand-bus-width = <8>;
|
||||
gpmc,device-width = <1>;
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <44>;
|
||||
gpmc,cs-wr-off-ns = <44>;
|
||||
gpmc,adv-on-ns = <6>;
|
||||
gpmc,adv-rd-off-ns = <34>;
|
||||
gpmc,adv-wr-off-ns = <44>;
|
||||
gpmc,we-on-ns = <0>;
|
||||
gpmc,we-off-ns = <40>;
|
||||
gpmc,oe-on-ns = <0>;
|
||||
gpmc,oe-off-ns = <54>;
|
||||
gpmc,access-ns = <64>;
|
||||
gpmc,rd-cycle-ns = <82>;
|
||||
gpmc,wr-cycle-ns = <82>;
|
||||
gpmc,wait-on-read = "true";
|
||||
gpmc,wait-on-write = "true";
|
||||
gpmc,bus-turnaround-ns = <0>;
|
||||
gpmc,cycle2cycle-delay-ns = <0>;
|
||||
gpmc,clk-activation-ns = <0>;
|
||||
gpmc,wait-monitoring-ns = <0>;
|
||||
gpmc,wr-access-ns = <40>;
|
||||
gpmc,wr-data-mux-bus-ns = <0>;
|
||||
|
||||
gpmc,wait-pin = <0>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
/* MTD partition table */
|
||||
partition@0 {
|
||||
label = "kernel";
|
||||
reg = <0x0 0x00980000>;
|
||||
};
|
||||
partition@980000 {
|
||||
label = "dtb";
|
||||
reg = <0x00980000 0x00080000>;
|
||||
};
|
||||
partition@a00000 {
|
||||
label = "rootfs";
|
||||
reg = <0x00a00000 0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
tps65218: tps65218@24 {
|
||||
compatible = "ti,tps65218";
|
||||
reg = <0x24>;
|
||||
interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
|
||||
interrupt-parent = <&gic>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
dcdc1: regulator-dcdc1 {
|
||||
compatible = "ti,tps65218-dcdc1";
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <912000>;
|
||||
regulator-max-microvolt = <1144000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2: regulator-dcdc2 {
|
||||
compatible = "ti,tps65218-dcdc2";
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <912000>;
|
||||
regulator-max-microvolt = <1378000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc3: regulator-dcdc3 {
|
||||
compatible = "ti,tps65218-dcdc3";
|
||||
regulator-name = "vdcdc3";
|
||||
regulator-suspend-enable;
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc5: regulator-dcdc5 {
|
||||
compatible = "ti,tps65218-dcdc5";
|
||||
regulator-name = "v1_0bat";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc6: regulator-dcdc6 {
|
||||
compatible = "ti,tps65218-dcdc6";
|
||||
regulator-name = "v1_8bat";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo1: regulator-ldo1 {
|
||||
compatible = "ti,tps65218-ldo1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
eeprom_module: at24@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_pins>;
|
||||
vmmc-supply = <&vmmc_3v3>;
|
||||
bus-width = <8>;
|
||||
ti,non-removable;
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
dmas = <&edma 16
|
||||
&edma 17>;
|
||||
dma-names = "tx0", "rx0";
|
||||
|
||||
flash: w25q64cvzpig@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <20000000>;
|
||||
partition@0 {
|
||||
label = "uboot";
|
||||
reg = <0x0 0xc0000>;
|
||||
};
|
||||
|
||||
partition@c0000 {
|
||||
label = "uboot environment";
|
||||
reg = <0xc0000 0x40000>;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "reserved";
|
||||
reg = <0x100000 0x100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mac {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cpsw_default>;
|
||||
dual_emac = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&davinci_mdio_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <0>;
|
||||
phy-mode = "rgmii-txid";
|
||||
dual_emac_res_vlan = <1>;
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <1>;
|
||||
phy-mode = "rgmii-txid";
|
||||
dual_emac_res_vlan = <2>;
|
||||
};
|
||||
|
||||
&dwc3_1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2_phy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dwc3_2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2_phy2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "peripheral", "host", "otg";
|
||||
};
|
||||
|
||||
&elm {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tscadc {
|
||||
status = "okay";
|
||||
tsc {
|
||||
ti,wires = <4>;
|
||||
ti,x-plate-resistance = <200>;
|
||||
ti,coordiante-readouts = <5>;
|
||||
ti,wire-config = <0x00 0x11 0x22 0x33>;
|
||||
};
|
||||
|
||||
adc {
|
||||
ti,adc-channels = <4 5 6 7>;
|
||||
};
|
||||
};
|
||||
|
||||
&cpu {
|
||||
cpu0-supply = <&dcdc2>;
|
||||
operating-points = <1000000 1330000>,
|
||||
<800000 1260000>,
|
||||
<720000 1200000>,
|
||||
<600000 1100000>,
|
||||
<300000 950000>;
|
||||
};
|
||||
|
|
@ -154,138 +154,138 @@
|
|||
|
||||
i2c0_pins: i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x15c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
|
||||
0x158 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
|
||||
AM4372_IOPAD(0x95c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
|
||||
AM4372_IOPAD(0x958, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
>;
|
||||
};
|
||||
|
||||
ecap0_pins: backlight_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x164 MUX_MODE0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
|
||||
AM4372_IOPAD(0x964, MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
|
||||
>;
|
||||
};
|
||||
|
||||
pixcir_ts_pins: pixcir_ts_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x264 (PIN_INPUT_PULLUP | MUX_MODE7) /* spi2_d0.gpio3_22 */
|
||||
AM4372_IOPAD(0xa64, PIN_INPUT_PULLUP | MUX_MODE7) /* spi2_d0.gpio3_22 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_txen */
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rxctl */
|
||||
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd3 */
|
||||
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd2 */
|
||||
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd1 */
|
||||
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd0 */
|
||||
0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
|
||||
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
|
||||
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd3 */
|
||||
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd2 */
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd1 */
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd0 */
|
||||
AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_txen */
|
||||
AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rxctl */
|
||||
AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd3 */
|
||||
AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd2 */
|
||||
AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd1 */
|
||||
AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd0 */
|
||||
AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
|
||||
AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
|
||||
AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd3 */
|
||||
AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd2 */
|
||||
AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd1 */
|
||||
AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd0 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 reset value */
|
||||
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
nand_flash_x8: nand_flash_x8 {
|
||||
pinctrl-single,pins = <
|
||||
0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
0x4 (PIN_INPUT | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
0x8 (PIN_INPUT | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
0xc (PIN_INPUT | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
0x10 (PIN_INPUT | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
0x14 (PIN_INPUT | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
0x18 (PIN_INPUT | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
0x1c (PIN_INPUT | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
0x74 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */
|
||||
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
|
||||
AM4372_IOPAD(0x800, PIN_INPUT | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
AM4372_IOPAD(0x804, PIN_INPUT | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
AM4372_IOPAD(0x808, PIN_INPUT | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
AM4372_IOPAD(0x80c, PIN_INPUT | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
AM4372_IOPAD(0x810, PIN_INPUT | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
AM4372_IOPAD(0x814, PIN_INPUT | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
AM4372_IOPAD(0x818, PIN_INPUT | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
AM4372_IOPAD(0x81c, PIN_INPUT | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */
|
||||
AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_pins: dss_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x020 (PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
|
||||
0x024 (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x028 (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x02c (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x030 (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x034 (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x038 (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x03c (PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
|
||||
0x0a0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
|
||||
0x0a4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0a8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0ac (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0b0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0b4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0b8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0bc (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0c0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0c4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0c8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0cc (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0d0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0d4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0d8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0dc (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
|
||||
0x0e0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
|
||||
0x0e4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
|
||||
0x0e8 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
|
||||
0x0ec (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
|
||||
AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
|
||||
AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
|
||||
AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
|
||||
AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8b8, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
|
||||
AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
|
||||
AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
|
||||
AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
|
||||
AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
|
||||
|
||||
>;
|
||||
};
|
||||
|
|
@ -293,208 +293,208 @@
|
|||
display_mux_pins: display_mux_pins {
|
||||
pinctrl-single,pins = <
|
||||
/* GPIO 5_8 to select LCD / HDMI */
|
||||
0x238 (PIN_OUTPUT_PULLUP | MUX_MODE7)
|
||||
AM4372_IOPAD(0xa38, PIN_OUTPUT_PULLUP | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
dcan0_default: dcan0_default_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x178 (PIN_OUTPUT | MUX_MODE2) /* uart1_ctsn.d_can0_tx */
|
||||
0x17c (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_rtsn.d_can0_rx */
|
||||
AM4372_IOPAD(0x978, PIN_OUTPUT | MUX_MODE2) /* uart1_ctsn.d_can0_tx */
|
||||
AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_rtsn.d_can0_rx */
|
||||
>;
|
||||
};
|
||||
|
||||
dcan0_sleep: dcan0_sleep_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x178 (PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_ctsn.gpio0_12 */
|
||||
0x17c (PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_rtsn.gpio0_13 */
|
||||
AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_ctsn.gpio0_12 */
|
||||
AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_rtsn.gpio0_13 */
|
||||
>;
|
||||
};
|
||||
|
||||
dcan1_default: dcan1_default_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x180 (PIN_OUTPUT | MUX_MODE2) /* uart1_rxd.d_can1_tx */
|
||||
0x184 (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.d_can1_rx */
|
||||
AM4372_IOPAD(0x980, PIN_OUTPUT | MUX_MODE2) /* uart1_rxd.d_can1_tx */
|
||||
AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.d_can1_rx */
|
||||
>;
|
||||
};
|
||||
|
||||
dcan1_sleep: dcan1_sleep_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x180 (PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_rxd.gpio0_14 */
|
||||
0x184 (PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_txd.gpio0_15 */
|
||||
AM4372_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_rxd.gpio0_14 */
|
||||
AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_txd.gpio0_15 */
|
||||
>;
|
||||
};
|
||||
|
||||
vpfe0_pins_default: vpfe0_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x1B0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
|
||||
0x1B4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
|
||||
0x1C0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
|
||||
0x1C4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
|
||||
0x1C8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
|
||||
0x208 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
|
||||
0x20C (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
|
||||
0x210 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
|
||||
0x214 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
|
||||
0x218 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
|
||||
0x21C (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
|
||||
0x220 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
|
||||
0x224 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
|
||||
AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
|
||||
AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
|
||||
AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
|
||||
AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
|
||||
AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
|
||||
AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
|
||||
AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
|
||||
AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
|
||||
AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
|
||||
AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
|
||||
AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
|
||||
AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
|
||||
AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
|
||||
>;
|
||||
};
|
||||
|
||||
vpfe0_pins_sleep: vpfe0_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x1B0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_hd mode 0*/
|
||||
0x1B4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_vd mode 0*/
|
||||
0x1C0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_pclk mode 0*/
|
||||
0x1C4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data8 mode 0*/
|
||||
0x1C8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data9 mode 0*/
|
||||
0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data0 mode 0*/
|
||||
0x20C (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data1 mode 0*/
|
||||
0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data2 mode 0*/
|
||||
0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data3 mode 0*/
|
||||
0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data4 mode 0*/
|
||||
0x21C (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data5 mode 0*/
|
||||
0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data6 mode 0*/
|
||||
0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data7 mode 0*/
|
||||
AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_hd mode 0*/
|
||||
AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_vd mode 0*/
|
||||
AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_pclk mode 0*/
|
||||
AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data8 mode 0*/
|
||||
AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data9 mode 0*/
|
||||
AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data0 mode 0*/
|
||||
AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data1 mode 0*/
|
||||
AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data2 mode 0*/
|
||||
AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data3 mode 0*/
|
||||
AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data4 mode 0*/
|
||||
AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data5 mode 0*/
|
||||
AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data6 mode 0*/
|
||||
AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data7 mode 0*/
|
||||
>;
|
||||
};
|
||||
|
||||
vpfe1_pins_default: vpfe1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x1CC (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data9 mode 0*/
|
||||
0x1D0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data8 mode 0*/
|
||||
0x1D4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_hd mode 0*/
|
||||
0x1D8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_vd mode 0*/
|
||||
0x1DC (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_pclk mode 0*/
|
||||
0x1E8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data0 mode 0*/
|
||||
0x1EC (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data1 mode 0*/
|
||||
0x1F0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data2 mode 0*/
|
||||
0x1F4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data3 mode 0*/
|
||||
0x1F8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data4 mode 0*/
|
||||
0x1FC (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data5 mode 0*/
|
||||
0x200 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data6 mode 0*/
|
||||
0x204 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data7 mode 0*/
|
||||
AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data9 mode 0*/
|
||||
AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data8 mode 0*/
|
||||
AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_hd mode 0*/
|
||||
AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_vd mode 0*/
|
||||
AM4372_IOPAD(0x9dC, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_pclk mode 0*/
|
||||
AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data0 mode 0*/
|
||||
AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data1 mode 0*/
|
||||
AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data2 mode 0*/
|
||||
AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data3 mode 0*/
|
||||
AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data4 mode 0*/
|
||||
AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data5 mode 0*/
|
||||
AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data6 mode 0*/
|
||||
AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data7 mode 0*/
|
||||
>;
|
||||
};
|
||||
|
||||
vpfe1_pins_sleep: vpfe1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x1CC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data9 mode 0*/
|
||||
0x1D0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data8 mode 0*/
|
||||
0x1D4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_hd mode 0*/
|
||||
0x1D8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_vd mode 0*/
|
||||
0x1DC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_pclk mode 0*/
|
||||
0x1E8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data0 mode 0*/
|
||||
0x1EC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data1 mode 0*/
|
||||
0x1F0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data2 mode 0*/
|
||||
0x1F4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data3 mode 0*/
|
||||
0x1F8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data4 mode 0*/
|
||||
0x1FC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data5 mode 0*/
|
||||
0x200 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data6 mode 0*/
|
||||
0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data7 mode 0*/
|
||||
AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data9 mode 0*/
|
||||
AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data8 mode 0*/
|
||||
AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_hd mode 0*/
|
||||
AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_vd mode 0*/
|
||||
AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_pclk mode 0*/
|
||||
AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data0 mode 0*/
|
||||
AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data1 mode 0*/
|
||||
AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data2 mode 0*/
|
||||
AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data3 mode 0*/
|
||||
AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data4 mode 0*/
|
||||
AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data5 mode 0*/
|
||||
AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data6 mode 0*/
|
||||
AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data7 mode 0*/
|
||||
>;
|
||||
};
|
||||
|
||||
mmc3_pins_default: pinmux_mmc3_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x8c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk */
|
||||
0x88 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
|
||||
0x44 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a1.mmc2_dat0 */
|
||||
0x48 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a2.mmc2_dat1 */
|
||||
0x4c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a3.mmc2_dat2 */
|
||||
0x78 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be1n.mmc2_dat3 */
|
||||
AM4372_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk */
|
||||
AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
|
||||
AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a1.mmc2_dat0 */
|
||||
AM4372_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a2.mmc2_dat1 */
|
||||
AM4372_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a3.mmc2_dat2 */
|
||||
AM4372_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be1n.mmc2_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x8c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_clk.mmc2_clk */
|
||||
0x88 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.mmc2_cmd */
|
||||
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a1.mmc2_dat0 */
|
||||
0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a2.mmc2_dat1 */
|
||||
0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a3.mmc2_dat2 */
|
||||
0x78 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_be1n.mmc2_dat3 */
|
||||
AM4372_IOPAD(0x88c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_clk.mmc2_clk */
|
||||
AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.mmc2_cmd */
|
||||
AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a1.mmc2_dat0 */
|
||||
AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a2.mmc2_dat1 */
|
||||
AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a3.mmc2_dat2 */
|
||||
AM4372_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_be1n.mmc2_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
wlan_pins_default: pinmux_wlan_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.gpio1_20 WL_EN */
|
||||
0x5c (PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* gpmc_a7.gpio1_23 WL_IRQ*/
|
||||
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.gpio1_16 BT_EN*/
|
||||
AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.gpio1_20 WL_EN */
|
||||
AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* gpmc_a7.gpio1_23 WL_IRQ*/
|
||||
AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.gpio1_16 BT_EN*/
|
||||
>;
|
||||
};
|
||||
|
||||
wlan_pins_sleep: pinmux_wlan_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.gpio1_20 WL_EN */
|
||||
0x5c (PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* gpmc_a7.gpio1_23 WL_IRQ*/
|
||||
0x40 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a0.gpio1_16 BT_EN*/
|
||||
AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.gpio1_20 WL_EN */
|
||||
AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* gpmc_a7.gpio1_23 WL_IRQ*/
|
||||
AM4372_IOPAD(0x840, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a0.gpio1_16 BT_EN*/
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x228 (PIN_INPUT | MUX_MODE0) /* uart3_rxd.uart3_rxd */
|
||||
0x22c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */
|
||||
0x230 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_ctsn.uart3_ctsn */
|
||||
0x234 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */
|
||||
AM4372_IOPAD(0xa28, PIN_INPUT | MUX_MODE0) /* uart3_rxd.uart3_rxd */
|
||||
AM4372_IOPAD(0xa2c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */
|
||||
AM4372_IOPAD(0xa30, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_ctsn.uart3_ctsn */
|
||||
AM4372_IOPAD(0xa34, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp1_pins: mcasp1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
|
||||
AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
|
||||
AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
|
||||
AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
|
||||
AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp1_sleep_pins: mcasp1_sleep_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
gpio0_pins: gpio0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x26c (PIN_OUTPUT | MUX_MODE9) /* spi2_cs0.gpio0_23 SEL_eMMCorNANDn */
|
||||
AM4372_IOPAD(0xa6c, PIN_OUTPUT | MUX_MODE9) /* spi2_cs0.gpio0_23 SEL_eMMCorNANDn */
|
||||
>;
|
||||
};
|
||||
|
||||
emmc_pins_default: emmc_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
|
||||
0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
|
||||
0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
|
||||
0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
|
||||
0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
|
||||
0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
|
||||
0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
|
||||
0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
|
||||
0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
|
||||
0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
|
||||
AM4372_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
|
||||
AM4372_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
|
||||
AM4372_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
|
||||
AM4372_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
|
||||
AM4372_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
|
||||
AM4372_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
|
||||
AM4372_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
|
||||
AM4372_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
|
||||
AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
|
||||
AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
|
||||
>;
|
||||
};
|
||||
|
||||
emmc_pins_sleep: emmc_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x00 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.gpio1_0 */
|
||||
0x04 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.gpio1_1 */
|
||||
0x08 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad2.gpio1_2 */
|
||||
0x0c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad3.gpio1_3 */
|
||||
0x10 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
|
||||
0x14 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
|
||||
0x18 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
|
||||
0x1c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
|
||||
0x80 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */
|
||||
0x84 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */
|
||||
AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.gpio1_0 */
|
||||
AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.gpio1_1 */
|
||||
AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad2.gpio1_2 */
|
||||
AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad3.gpio1_3 */
|
||||
AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
|
||||
AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
|
||||
AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
|
||||
AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
|
||||
AM4372_IOPAD(0x880, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */
|
||||
AM4372_IOPAD(0x884, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -122,137 +122,137 @@
|
|||
&am43xx_pinmux {
|
||||
gpio_keys_pins_default: gpio_keys_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x1b8 (PIN_INPUT | MUX_MODE7) /* cam0_field.gpio4_2 */
|
||||
AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7) /* cam0_field.gpio4_2 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins_default: i2c0_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins_sleep: i2c0_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x18c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins_default: i2c2_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x1e8 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
|
||||
0x1ec (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */
|
||||
AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
|
||||
AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins_sleep: i2c2_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x1e8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x1ec (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins_default: pinmux_mmc1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
0x1f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
0x1f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
0x1f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
0x1fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x1f0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x1f4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x1f8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x1fc (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x160 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x960, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
ecap0_pins_default: backlight_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x164 (PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
|
||||
AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
|
||||
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
|
||||
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
|
||||
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
|
||||
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
|
||||
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
|
||||
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
|
||||
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
|
||||
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
|
||||
AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
|
||||
AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
|
||||
AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
|
||||
AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
|
||||
AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
|
||||
AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
|
||||
AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
|
||||
AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
|
||||
AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
|
||||
AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
|
||||
AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
|
||||
AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
qspi_pins_default: qspi_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x7c (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */
|
||||
0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
|
||||
0x90 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
|
||||
0x94 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
|
||||
0x98 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */
|
||||
0x9c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
|
||||
AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */
|
||||
AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
|
||||
AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
|
||||
AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
|
||||
AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */
|
||||
AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
|
||||
>;
|
||||
};
|
||||
|
||||
qspi_pins_sleep: qspi_pins_sleep{
|
||||
pinctrl-single,pins = <
|
||||
0x7c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x88 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x98 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x87c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,180 @@
|
|||
/*
|
||||
* Copyright (C) 2015 CompuLab, Ltd. - http://www.compulab.co.il/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include "am437x-cm-t43.dts"
|
||||
#include "compulab-sb-som.dtsi"
|
||||
|
||||
/ {
|
||||
model = "CompuLab CM-T43 on SB-SOM-T43";
|
||||
compatible = "compulab,am437x-sbc-t43", "compulab,am437x-cm-t43", "ti,am4372", "ti,am43";
|
||||
|
||||
aliases {
|
||||
display0 = &lcd0;
|
||||
};
|
||||
};
|
||||
|
||||
&am43xx_pinmux {
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
AM4372_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
AM4372_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
AM4372_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
AM4372_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
AM4372_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
AM4372_IOPAD(0x964, PIN_INPUT | MUX_MODE7) /* ecap0_in_pwm0_out.gpio0_7 */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_pinctrl_default: dss_pinctrl_default {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0x9b0, PIN_OUTPUT_PULLUP | MUX_MODE2) /* cam0 hd -> DSS DATA 23 */
|
||||
AM4372_IOPAD(0x9b4, PIN_OUTPUT_PULLUP | MUX_MODE2)
|
||||
AM4372_IOPAD(0x9b8, PIN_OUTPUT_PULLUP | MUX_MODE2)
|
||||
AM4372_IOPAD(0x9bc, PIN_OUTPUT_PULLUP | MUX_MODE2)
|
||||
AM4372_IOPAD(0x9c0, PIN_OUTPUT_PULLUP | MUX_MODE2)
|
||||
AM4372_IOPAD(0x9c4, PIN_OUTPUT_PULLUP | MUX_MODE2)
|
||||
AM4372_IOPAD(0x9c8, PIN_OUTPUT_PULLUP | MUX_MODE2)
|
||||
AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLUP | MUX_MODE2) /* cam1 data 9 -> DSS DATA 16 */
|
||||
|
||||
AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
|
||||
AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8b8, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
|
||||
AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
|
||||
AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
|
||||
AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
|
||||
AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
|
||||
AM4372_IOPAD(0xa20, PIN_OUTPUT_PULLUP | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins_default: uart0_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0)
|
||||
AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0)
|
||||
AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
AM4372_IOPAD(0x974, PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0xa6c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE1) /* spi2_cs0.i2c1_sda */
|
||||
AM4372_IOPAD(0xa60, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE1) /* spi2_sclk.i2c1_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
|
||||
AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
usb2_phy1_default: usb2_phy1_default {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0xac0, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
usb2_phy2_default: usb2_phy2_default {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0xac4, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
|
||||
pca9555: pca9555@20 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
eeprom_base: at24@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
vmmc-supply = <&vsb_3v3>;
|
||||
cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
|
||||
wp-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "ok";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dss_pinctrl_default>;
|
||||
|
||||
port {
|
||||
dpi_lcd_out: endpoint@0 {
|
||||
remote-endpoint = <&lcd_in>;
|
||||
data-lines = <24>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins_default>;
|
||||
};
|
||||
|
||||
&dwc3_1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb2_phy1_default>;
|
||||
};
|
||||
|
||||
&dwc3_2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb2_phy2_default>;
|
||||
};
|
||||
|
||||
&lcd0 {
|
||||
enable-gpios = <&pca9555 14 GPIO_ACTIVE_HIGH
|
||||
&gpio4 28 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&dpi_lcd_out>;
|
||||
data-lines = <24>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -157,259 +157,259 @@
|
|||
&am43xx_pinmux {
|
||||
matrix_keypad_pins: matrix_keypad_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x24c (PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */
|
||||
0x250 (PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */
|
||||
0x254 (PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */
|
||||
0x258 (PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */
|
||||
AM4372_IOPAD(0xa4c, PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */
|
||||
AM4372_IOPAD(0xa50, PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */
|
||||
AM4372_IOPAD(0xa54, PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */
|
||||
AM4372_IOPAD(0xa58, PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */
|
||||
>;
|
||||
};
|
||||
|
||||
leds_pins: leds_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x228 (PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */
|
||||
0x22c (PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */
|
||||
0x230 (PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */
|
||||
0x234 (PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */
|
||||
AM4372_IOPAD(0xa28, PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */
|
||||
AM4372_IOPAD(0xa2c, PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */
|
||||
AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */
|
||||
AM4372_IOPAD(0xa34, PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins: i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
|
||||
0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
|
||||
AM4372_IOPAD(0x95c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
|
||||
AM4372_IOPAD(0x958, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
>;
|
||||
};
|
||||
|
||||
ecap0_pins: backlight_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
|
||||
AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
|
||||
>;
|
||||
};
|
||||
|
||||
edt_ft5306_ts_pins: edt_ft5306_ts_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x74 (PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
|
||||
0x78 (PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
|
||||
AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
|
||||
AM4372_IOPAD(0x878, PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
|
||||
>;
|
||||
};
|
||||
|
||||
vpfe0_pins_default: vpfe0_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
|
||||
0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
|
||||
0x1b8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/
|
||||
0x1bc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/
|
||||
0x1c0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
|
||||
0x1c4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
|
||||
0x1c8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
|
||||
0x208 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
|
||||
0x20c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
|
||||
0x210 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
|
||||
0x214 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
|
||||
0x218 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
|
||||
0x21c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
|
||||
0x220 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
|
||||
0x224 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
|
||||
AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
|
||||
AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
|
||||
AM4372_IOPAD(0x9b8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/
|
||||
AM4372_IOPAD(0x9bc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/
|
||||
AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
|
||||
AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
|
||||
AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
|
||||
AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
|
||||
AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
|
||||
AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
|
||||
AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
|
||||
AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
|
||||
AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
|
||||
AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
|
||||
AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
|
||||
>;
|
||||
};
|
||||
|
||||
vpfe0_pins_sleep: vpfe0_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x1b0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1b4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1b8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1bc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1c0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1c4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1c8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x20c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x21c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9b8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9bc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x12c (PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
|
||||
0x114 (PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
|
||||
0x128 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
|
||||
0x124 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
|
||||
0x120 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
|
||||
0x11c (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
|
||||
0x130 (PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
|
||||
0x118 (PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
|
||||
0x140 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
|
||||
0x13c (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
|
||||
0x138 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
|
||||
0x134 (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
|
||||
AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
|
||||
AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
|
||||
AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
|
||||
AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
|
||||
AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
|
||||
AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
|
||||
AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
|
||||
AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
|
||||
AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
|
||||
AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
|
||||
AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
|
||||
AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
|
||||
|
||||
/* Slave 2 */
|
||||
0x58 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
|
||||
0x40 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
|
||||
0x54 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
|
||||
0x50 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
|
||||
0x4c (PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
|
||||
0x48 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
|
||||
0x5c (PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
|
||||
0x44 (PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
|
||||
0x6c (PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
|
||||
0x68 (PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
|
||||
0x64 (PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
|
||||
0x60 (PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
|
||||
AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
|
||||
AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
|
||||
AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
|
||||
AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
|
||||
AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
|
||||
AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
|
||||
AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
|
||||
AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
|
||||
AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
|
||||
AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
|
||||
AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
|
||||
AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 reset value */
|
||||
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
|
||||
/* Slave 2 reset value */
|
||||
0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
AM4372_IOPAD(0x948, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
dss_pins: dss_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x020 (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
|
||||
0x024 (PIN_OUTPUT | MUX_MODE1)
|
||||
0x028 (PIN_OUTPUT | MUX_MODE1)
|
||||
0x02c (PIN_OUTPUT | MUX_MODE1)
|
||||
0x030 (PIN_OUTPUT | MUX_MODE1)
|
||||
0x034 (PIN_OUTPUT | MUX_MODE1)
|
||||
0x038 (PIN_OUTPUT | MUX_MODE1)
|
||||
0x03c (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
|
||||
0x0a0 (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */
|
||||
0x0a4 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0a8 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0ac (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0b0 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0b4 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0b8 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0bc (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0c0 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0c4 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0c8 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0cc (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0d0 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0d4 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0d8 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0dc (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */
|
||||
0x0e0 (PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
|
||||
0x0e4 (PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
|
||||
0x0e8 (PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */
|
||||
0x0ec (PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */
|
||||
AM4372_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
|
||||
AM4372_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)
|
||||
AM4372_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)
|
||||
AM4372_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)
|
||||
AM4372_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)
|
||||
AM4372_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)
|
||||
AM4372_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)
|
||||
AM4372_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
|
||||
AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */
|
||||
AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */
|
||||
AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
|
||||
AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
|
||||
AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */
|
||||
AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */
|
||||
|
||||
>;
|
||||
};
|
||||
|
||||
qspi_pins: qspi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x7c (PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */
|
||||
0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
|
||||
0x90 (PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
|
||||
0x94 (PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
|
||||
0x98 (PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */
|
||||
0x9c (PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
|
||||
AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */
|
||||
AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
|
||||
AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
|
||||
AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
|
||||
AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */
|
||||
AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp1_pins: mcasp1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
|
||||
0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
|
||||
AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
|
||||
AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
|
||||
AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
|
||||
AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp1_pins_sleep: mcasp1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
lcd_pins: lcd_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
|
||||
AM4372_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
|
||||
>;
|
||||
};
|
||||
|
||||
usb1_pins: usb1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
|
||||
AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
|
||||
>;
|
||||
};
|
||||
|
||||
usb2_pins: usb2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
|
||||
AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -144,228 +144,228 @@
|
|||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs */
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
|
||||
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxdv.rmii1_rxdv */
|
||||
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
|
||||
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */
|
||||
AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs */
|
||||
AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
|
||||
AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
|
||||
AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxdv.rmii1_rxdv */
|
||||
AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
|
||||
AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
|
||||
AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
|
||||
AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
|
||||
AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 reset value */
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins: pinmux_i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
nand_flash_x8: nand_flash_x8 {
|
||||
pinctrl-single,pins = <
|
||||
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.SELQSPIorNAND/GPIO */
|
||||
0x0 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
0x4 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
0x8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
0xc (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
0x10 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
0x14 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
0x18 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
0x1c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
0x74 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */
|
||||
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
|
||||
AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.SELQSPIorNAND/GPIO */
|
||||
AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */
|
||||
AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
|
||||
>;
|
||||
};
|
||||
|
||||
ecap0_pins: backlight_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x164 MUX_MODE0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
|
||||
AM4372_IOPAD(0x964, MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1c0 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_sda.i2c2_sda */
|
||||
0x1c4 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_scl.i2c2_scl */
|
||||
AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_sda.i2c2_sda */
|
||||
AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_scl.i2c2_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
spi0_pins: pinmux_spi0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x150 (PIN_INPUT | MUX_MODE0) /* spi0_clk.spi0_clk */
|
||||
0x154 (PIN_OUTPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
|
||||
0x158 (PIN_INPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
|
||||
0x15c (PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
|
||||
AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0) /* spi0_clk.spi0_clk */
|
||||
AM4372_IOPAD(0x954, PIN_OUTPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
|
||||
AM4372_IOPAD(0x958, PIN_INPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
|
||||
AM4372_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
spi1_pins: pinmux_spi1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x190 (PIN_INPUT | MUX_MODE3) /* mcasp0_aclkx.spi1_clk */
|
||||
0x194 (PIN_OUTPUT | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
|
||||
0x198 (PIN_INPUT | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
|
||||
0x19c (PIN_OUTPUT | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
|
||||
AM4372_IOPAD(0x990, PIN_INPUT | MUX_MODE3) /* mcasp0_aclkx.spi1_clk */
|
||||
AM4372_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
|
||||
AM4372_IOPAD(0x998, PIN_INPUT | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
|
||||
AM4372_IOPAD(0x99c, PIN_OUTPUT | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
>;
|
||||
};
|
||||
|
||||
qspi1_default: qspi1_default {
|
||||
pinctrl-single,pins = <
|
||||
0x7c (PIN_INPUT_PULLUP | MUX_MODE3)
|
||||
0x88 (PIN_INPUT_PULLUP | MUX_MODE2)
|
||||
0x90 (PIN_INPUT_PULLUP | MUX_MODE3)
|
||||
0x94 (PIN_INPUT_PULLUP | MUX_MODE3)
|
||||
0x98 (PIN_INPUT_PULLUP | MUX_MODE3)
|
||||
0x9c (PIN_INPUT_PULLUP | MUX_MODE3)
|
||||
AM4372_IOPAD(0x87c, PIN_INPUT_PULLUP | MUX_MODE3)
|
||||
AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE2)
|
||||
AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)
|
||||
AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)
|
||||
AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)
|
||||
AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)
|
||||
>;
|
||||
};
|
||||
|
||||
pixcir_ts_pins: pixcir_ts_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x44 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a1.gpio1_17 */
|
||||
AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a1.gpio1_17 */
|
||||
>;
|
||||
};
|
||||
|
||||
hdq_pins: pinmux_hdq_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x234 (PIN_INPUT_PULLUP | MUX_MODE1) /* cam1_wen.hdq_gpio */
|
||||
AM4372_IOPAD(0xa34, PIN_INPUT_PULLUP | MUX_MODE1) /* cam1_wen.hdq_gpio */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_pins: dss_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x020 (PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
|
||||
0x024 (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x028 (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x02C (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x030 (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x034 (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x038 (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x03C (PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
|
||||
0x0A0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
|
||||
0x0A4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0A8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0AC (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0B0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0B4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0B8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0BC (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0C0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0C4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0C8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0CC (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0D0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0D4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0D8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0DC (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
|
||||
0x0E0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
|
||||
0x0E4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
|
||||
0x0E8 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
|
||||
0x0EC (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
|
||||
AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
|
||||
AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
|
||||
AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
|
||||
AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8B8, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
|
||||
AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
|
||||
AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
|
||||
AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
|
||||
AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
|
||||
>;
|
||||
};
|
||||
|
||||
display_mux_pins: display_mux_pins {
|
||||
pinctrl-single,pins = <
|
||||
/* GPMC CLK -> GPIO 2_1 to select LCD / HDMI */
|
||||
0x08C (PIN_OUTPUT_PULLUP | MUX_MODE7)
|
||||
AM4372_IOPAD(0x88C, PIN_OUTPUT_PULLUP | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
vpfe1_pins_default: vpfe1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x1cc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data9 mode 0 */
|
||||
0x1d0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data8 mode 0 */
|
||||
0x1d4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_hd mode 0 */
|
||||
0x1d8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_vd mode 0 */
|
||||
0x1dc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_pclk mode 0 */
|
||||
0x1e8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data0 mode 0 */
|
||||
0x1ec (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data1 mode 0 */
|
||||
0x1f0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data2 mode 0 */
|
||||
0x1f4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data3 mode 0 */
|
||||
0x1f8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data4 mode 0 */
|
||||
0x1fc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data5 mode 0 */
|
||||
0x200 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data6 mode 0 */
|
||||
0x204 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data7 mode 0 */
|
||||
AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data9 mode 0 */
|
||||
AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data8 mode 0 */
|
||||
AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_hd mode 0 */
|
||||
AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_vd mode 0 */
|
||||
AM4372_IOPAD(0x9dc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_pclk mode 0 */
|
||||
AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data0 mode 0 */
|
||||
AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data1 mode 0 */
|
||||
AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data2 mode 0 */
|
||||
AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data3 mode 0 */
|
||||
AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data4 mode 0 */
|
||||
AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data5 mode 0 */
|
||||
AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data6 mode 0 */
|
||||
AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data7 mode 0 */
|
||||
>;
|
||||
};
|
||||
|
||||
vpfe1_pins_sleep: vpfe1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x1cc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1d0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1d4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1d8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1dc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1e8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1ec (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1f0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1f4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1f8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1fc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x200 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp1_pins: mcasp1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1a0 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_ACLKR/MCASP1_ACLKX */
|
||||
0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_FSR/MCASP1_FSX */
|
||||
0x1a8 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)/* MCASP0_AXR1/MCASP1_AXR0 */
|
||||
0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_AHCLKX/MCASP1_AXR1 */
|
||||
AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_ACLKR/MCASP1_ACLKX */
|
||||
AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_FSR/MCASP1_FSX */
|
||||
AM4372_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE3)/* MCASP0_AXR1/MCASP1_AXR0 */
|
||||
AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_AHCLKX/MCASP1_AXR1 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp1_sleep_pins: mcasp1_sleep_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1a0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -181,97 +181,97 @@
|
|||
&dra7_pmx_core {
|
||||
leds_pins_default: leds_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x3a8 (PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */
|
||||
0x3ac (PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */
|
||||
0x3c0 (PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */
|
||||
0x3c4 (PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */
|
||||
DRA7XX_CORE_IOPAD(0x37a8, PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */
|
||||
DRA7XX_CORE_IOPAD(0x37ac, PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */
|
||||
DRA7XX_CORE_IOPAD(0x37c0, PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */
|
||||
DRA7XX_CORE_IOPAD(0x37c4, PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins_default: i2c1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x400 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
|
||||
0x404 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
|
||||
DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
|
||||
DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
|
||||
>;
|
||||
};
|
||||
|
||||
hdmi_pins: pinmux_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x408 (PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
|
||||
0x40c (PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
|
||||
DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
|
||||
DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins_default: i2c3_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x2a4 (PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
|
||||
0x2a8 (PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
|
||||
DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
|
||||
DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins_default: uart3_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x3f8 (PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
|
||||
0x3fc (PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
|
||||
DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
|
||||
DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins_default: mmc1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x36c (PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
|
||||
0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
|
||||
0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
|
||||
0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
|
||||
0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
|
||||
0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
|
||||
0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
|
||||
DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
|
||||
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
|
||||
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
|
||||
DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins_default: mmc2_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
|
||||
0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
|
||||
0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
|
||||
0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
|
||||
0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
|
||||
0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
|
||||
0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
|
||||
0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
|
||||
0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
|
||||
0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
|
||||
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
|
||||
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
|
||||
DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
|
||||
DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
|
||||
DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
|
||||
DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
|
||||
DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_pins_default: cpsw_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x250 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
|
||||
0x254 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
|
||||
0x258 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
|
||||
0x25c (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
|
||||
0x260 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
|
||||
0x264 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
|
||||
0x268 (PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
|
||||
0x26c (PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
|
||||
0x270 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
|
||||
0x274 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
|
||||
0x278 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
|
||||
0x27c (PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
|
||||
DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
|
||||
DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
|
||||
DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
|
||||
DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
|
||||
DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
|
||||
DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
|
||||
DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
|
||||
DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
|
||||
DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
|
||||
DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
|
||||
DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
|
||||
DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
|
||||
|
||||
/* Slave 2 */
|
||||
0x198 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
|
||||
0x19c (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
|
||||
0x1a0 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
|
||||
0x1a4 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
|
||||
0x1a8 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
|
||||
0x1ac (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
|
||||
0x1b0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
|
||||
0x1b4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
|
||||
0x1b8 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
|
||||
0x1bc (PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
|
||||
0x1c0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
|
||||
0x1c4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
|
||||
DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
|
||||
DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
|
||||
DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
|
||||
DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
|
||||
DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
|
||||
DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
|
||||
DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
|
||||
DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
|
||||
DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
|
||||
DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
|
||||
DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
|
||||
DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
|
||||
>;
|
||||
|
||||
};
|
||||
|
|
@ -279,115 +279,115 @@
|
|||
cpsw_pins_sleep: cpsw_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x250 (PIN_INPUT | MUX_MODE15)
|
||||
0x254 (PIN_INPUT | MUX_MODE15)
|
||||
0x258 (PIN_INPUT | MUX_MODE15)
|
||||
0x25c (PIN_INPUT | MUX_MODE15)
|
||||
0x260 (PIN_INPUT | MUX_MODE15)
|
||||
0x264 (PIN_INPUT | MUX_MODE15)
|
||||
0x268 (PIN_INPUT | MUX_MODE15)
|
||||
0x26c (PIN_INPUT | MUX_MODE15)
|
||||
0x270 (PIN_INPUT | MUX_MODE15)
|
||||
0x274 (PIN_INPUT | MUX_MODE15)
|
||||
0x278 (PIN_INPUT | MUX_MODE15)
|
||||
0x27c (PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)
|
||||
|
||||
/* Slave 2 */
|
||||
0x198 (PIN_INPUT | MUX_MODE15)
|
||||
0x19c (PIN_INPUT | MUX_MODE15)
|
||||
0x1a0 (PIN_INPUT | MUX_MODE15)
|
||||
0x1a4 (PIN_INPUT | MUX_MODE15)
|
||||
0x1a8 (PIN_INPUT | MUX_MODE15)
|
||||
0x1ac (PIN_INPUT | MUX_MODE15)
|
||||
0x1b0 (PIN_INPUT | MUX_MODE15)
|
||||
0x1b4 (PIN_INPUT | MUX_MODE15)
|
||||
0x1b8 (PIN_INPUT | MUX_MODE15)
|
||||
0x1bc (PIN_INPUT | MUX_MODE15)
|
||||
0x1c0 (PIN_INPUT | MUX_MODE15)
|
||||
0x1c4 (PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_pins_default: davinci_mdio_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */
|
||||
0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */
|
||||
DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */
|
||||
DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x23c (PIN_INPUT | MUX_MODE15)
|
||||
0x240 (PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x363c, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT | MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
|
||||
tps659038_pins_default: tps659038_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x418 (PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
|
||||
DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
|
||||
>;
|
||||
};
|
||||
|
||||
tmp102_pins_default: tmp102_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x3C8 (PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */
|
||||
DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcp79410_pins_default: mcp79410_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
|
||||
DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
|
||||
>;
|
||||
};
|
||||
|
||||
usb1_pins: pinmux_usb1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
|
||||
DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
|
||||
>;
|
||||
};
|
||||
|
||||
extcon_usb1_pins: extcon_usb1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x3ec (PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_rtsn.gpio7_25 */
|
||||
DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_rtsn.gpio7_25 */
|
||||
>;
|
||||
};
|
||||
|
||||
tpd12s015_pins: pinmux_tpd12s015_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x3b0 (PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */
|
||||
0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
|
||||
0x370 (PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */
|
||||
DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */
|
||||
DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
|
||||
DRA7XX_CORE_IOPAD(0x3770, PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */
|
||||
>;
|
||||
};
|
||||
|
||||
clkout2_pins_default: clkout2_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x294 (PIN_OUTPUT_PULLDOWN | MUX_MODE9) /* xref_clk0.clkout2 */
|
||||
DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | MUX_MODE9) /* xref_clk0.clkout2 */
|
||||
>;
|
||||
};
|
||||
|
||||
clkout2_pins_sleep: clkout2_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x294 (PIN_INPUT | MUX_MODE15) /* xref_clk0.clkout2 */
|
||||
DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE15) /* xref_clk0.clkout2 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp3_pins_default: mcasp3_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x324 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
|
||||
0x328 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
|
||||
0x32c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
|
||||
0x330 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
|
||||
DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
|
||||
DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
|
||||
DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
|
||||
DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp3_pins_sleep: mcasp3_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x324 (PIN_INPUT | MUX_MODE15)
|
||||
0x328 (PIN_INPUT | MUX_MODE15)
|
||||
0x32c (PIN_INPUT | MUX_MODE15)
|
||||
0x330 (PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,617 @@
|
|||
/*
|
||||
* Support for CompuLab CL-SOM-AM57x System-on-Module
|
||||
*
|
||||
* Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
|
||||
* Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published by
|
||||
* the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include "dra74x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "CompuLab CL-SOM-AM57x";
|
||||
compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x20000000>; /* 512 MB - minimal configuration */
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&leds_pins_default>;
|
||||
|
||||
led@0 {
|
||||
label = "cl-som-am57x:green";
|
||||
gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
vdd_3v3: fixedregulator-vdd_3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
ads7846reg: fixedregulator-ads7846-reg {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "ads7846-reg";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
sound0: sound@0 {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "CL-SOM-AM57x-Sound-Card";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,bitclock-master = <&dailink0_master>;
|
||||
simple-audio-card,frame-master = <&dailink0_master>;
|
||||
simple-audio-card,widgets =
|
||||
"Headphone", "Headphone Jack",
|
||||
"Microphone", "Microphone Jack",
|
||||
"Line", "Line Jack";
|
||||
simple-audio-card,routing =
|
||||
"Headphone Jack", "RHPOUT",
|
||||
"Headphone Jack", "LHPOUT",
|
||||
"LLINEIN", "Line Jack",
|
||||
"MICIN", "Mic Bias",
|
||||
"Mic Bias", "Microphone Jack";
|
||||
|
||||
dailink0_master: simple-audio-card,cpu {
|
||||
sound-dai = <&mcasp3>;
|
||||
};
|
||||
|
||||
simple-audio-card,codec {
|
||||
sound-dai = <&wm8731>;
|
||||
system-clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dra7_pmx_core {
|
||||
leds_pins_default: leds_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x347c, PIN_OUTPUT | MUX_MODE14) /* gpmc_a15.gpio2_5 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins_default: i2c1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
|
||||
DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins_default: i2c3_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
|
||||
DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c4_pins_default: i2c4_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x36ac, PIN_INPUT| MUX_MODE10) /* mcasp1_acl.i2c4_sda */
|
||||
DRA7XX_CORE_IOPAD(0x36b0, PIN_INPUT| MUX_MODE10) /* mcasp1_fsr.i2c4_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
tps659038_pins_default: tps659038_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins_default: mmc2_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
|
||||
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
|
||||
DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
|
||||
DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
|
||||
DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
|
||||
DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
|
||||
DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
qspi1_pins: pinmux_qspi1_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */
|
||||
DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d0 */
|
||||
DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d1 */
|
||||
DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */
|
||||
DRA7XX_CORE_IOPAD(0x34b8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */
|
||||
DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_pins_default: cpsw_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave at addr 0x0 */
|
||||
DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tclk */
|
||||
DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tctl */
|
||||
DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td3 */
|
||||
DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td2 */
|
||||
DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td1 */
|
||||
DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td0 */
|
||||
DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rclk */
|
||||
DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rctl */
|
||||
DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd3 */
|
||||
DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd2 */
|
||||
DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd1 */
|
||||
DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd0 */
|
||||
|
||||
/* Slave at addr 0x1 */
|
||||
DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_tclk */
|
||||
DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */
|
||||
DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */
|
||||
DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */
|
||||
DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */
|
||||
DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */
|
||||
DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
|
||||
DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
|
||||
DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
|
||||
DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
|
||||
DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
|
||||
DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_pins_sleep: cpsw_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)
|
||||
|
||||
/* Slave 2 */
|
||||
DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_pins_default: davinci_mdio_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLUP | MUX_MODE3)/* vin2a_d10.mdio_mclk */
|
||||
DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d11.mdio_d */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT | MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
|
||||
ads7846_pins: pinmux_ads7846_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3464, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpmc_a9.gpio1_31 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp3_pins_default: mcasp3_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
|
||||
DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
|
||||
DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
|
||||
DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp3_pins_sleep: mcasp3_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c4_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tps659038: tps659038@58 {
|
||||
compatible = "ti,tps659038";
|
||||
reg = <0x58>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&tps659038_pins_default>;
|
||||
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
|
||||
ti,system-power-controller;
|
||||
|
||||
tps659038_pmic {
|
||||
compatible = "ti,tps659038-pmic";
|
||||
|
||||
regulators {
|
||||
smps12_reg: smps12 {
|
||||
/* VDD_MPU */
|
||||
regulator-name = "smps12";
|
||||
regulator-min-microvolt = < 850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps3_reg: smps3 {
|
||||
/* VDD_DDR */
|
||||
regulator-name = "smps3";
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps45_reg: smps45 {
|
||||
/* VDD_DSPEVE */
|
||||
regulator-name = "smps45";
|
||||
regulator-min-microvolt = < 850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps6_reg: smps6 {
|
||||
/* VDD_GPU */
|
||||
regulator-name = "smps6";
|
||||
regulator-min-microvolt = < 850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps7_reg: smps7 {
|
||||
/* VDD_CORE */
|
||||
regulator-name = "smps7";
|
||||
regulator-min-microvolt = < 850000>;
|
||||
regulator-max-microvolt = <1160000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps8_reg: smps8 {
|
||||
/* VDD_IVA */
|
||||
regulator-name = "smps8";
|
||||
regulator-min-microvolt = < 850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps9_reg: smps9 {
|
||||
/* PMIC_3V3 */
|
||||
regulator-name = "smps9";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
|
||||
ldo1_reg: ldo1 {
|
||||
/* VDD_SD / VDDSHV8 */
|
||||
regulator-name = "ldo1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: ldo2 {
|
||||
/* VDD_1V8 */
|
||||
regulator-name = "ldo2";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo3_reg: ldo3 {
|
||||
/* VDDA_1V8_PHYA - supplies VDDA_SATA, VDDA_USB1/2/3 */
|
||||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo4_reg: ldo4 {
|
||||
/* VDDA_1V8_PHYB - supplies VDDA_HDMI, VDDA_PCIE/0/1 */
|
||||
regulator-name = "ldo4";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo9_reg: ldo9 {
|
||||
/* VDD_RTC */
|
||||
regulator-name = "ldo9";
|
||||
regulator-min-microvolt = <1050000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldoln_reg: ldoln {
|
||||
/* VDDA_1V8_PLL */
|
||||
regulator-name = "ldoln";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldousb_reg: ldousb {
|
||||
/* VDDA_3V_USB: VDDA_USBHS33 */
|
||||
regulator-name = "ldousb";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* regen1 not used */
|
||||
};
|
||||
};
|
||||
|
||||
tps659038_pwr_button: tps659038_pwr_button {
|
||||
compatible = "ti,palmas-pwrbutton";
|
||||
interrupt-parent = <&tps659038>;
|
||||
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
||||
wakeup-source;
|
||||
ti,palmas-long-press-seconds = <12>;
|
||||
};
|
||||
|
||||
tps659038_gpio: tps659038_gpio {
|
||||
compatible = "ti,palmas-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
rtc0: rtc@56 {
|
||||
compatible = "emmicro,em3027";
|
||||
reg = <0x56>;
|
||||
};
|
||||
|
||||
eeprom_module: atmel@50 {
|
||||
compatible = "atmel,24c08";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
wm8731: wm8731@1a {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "wlf,wm8731";
|
||||
reg = <0x1a>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu0-supply = <&smps12_reg>;
|
||||
voltage-tolerance = <1>;
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mailbox5 {
|
||||
status = "okay";
|
||||
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mailbox6 {
|
||||
status = "okay";
|
||||
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins_default>;
|
||||
|
||||
vmmc-supply = <&vdd_3v3>;
|
||||
bus-width = <8>;
|
||||
ti,non-removable;
|
||||
cap-mmc-dual-data-rate;
|
||||
};
|
||||
|
||||
&qspi {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&qspi1_pins>;
|
||||
|
||||
spi-max-frequency = <20000000>;
|
||||
|
||||
spi_flash: spi_flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,m25p80", "jedec,spi-nor";
|
||||
reg = <0>; /* CS0 */
|
||||
spi-max-frequency = <20000000>;
|
||||
|
||||
partition@0 {
|
||||
label = "uboot";
|
||||
reg = <0x0 0xc0000>;
|
||||
};
|
||||
|
||||
partition@c0000 {
|
||||
label = "uboot environment";
|
||||
reg = <0xc0000 0x40000>;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "reserved";
|
||||
reg = <0x100000 0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
/* touch controller */
|
||||
ads7846@0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ads7846_pins>;
|
||||
|
||||
compatible = "ti,ads7846";
|
||||
vcc-supply = <&ads7846reg>;
|
||||
|
||||
reg = <1>; /* CS1 */
|
||||
spi-max-frequency = <1500000>;
|
||||
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <31 0>;
|
||||
pendown-gpio = <&gpio1 31 0>;
|
||||
|
||||
|
||||
ti,x-min = /bits/ 16 <0x0>;
|
||||
ti,x-max = /bits/ 16 <0x0fff>;
|
||||
ti,y-min = /bits/ 16 <0x0>;
|
||||
ti,y-max = /bits/ 16 <0x0fff>;
|
||||
|
||||
ti,x-plate-ohms = /bits/ 16 <180>;
|
||||
ti,pressure-max = /bits/ 16 <255>;
|
||||
|
||||
ti,debounce-max = /bits/ 16 <30>;
|
||||
ti,debounce-tol = /bits/ 16 <10>;
|
||||
ti,debounce-rep = /bits/ 16 <1>;
|
||||
|
||||
linux,wakeup;
|
||||
};
|
||||
};
|
||||
|
||||
&mac {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cpsw_pins_default>;
|
||||
pinctrl-1 = <&cpsw_pins_sleep>;
|
||||
dual_emac;
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <0>;
|
||||
phy-mode = "rgmii";
|
||||
dual_emac_res_vlan = <0>;
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <1>;
|
||||
phy-mode = "rgmii";
|
||||
dual_emac_res_vlan = <1>;
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&davinci_mdio_pins_default>;
|
||||
pinctrl-1 = <&davinci_mdio_pins_sleep>;
|
||||
};
|
||||
|
||||
&usb2_phy1 {
|
||||
phy-supply = <&ldousb_reg>;
|
||||
};
|
||||
|
||||
&usb2_phy2 {
|
||||
phy-supply = <&ldousb_reg>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
&mcasp3 {
|
||||
#sound-dai-cells = <0>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&mcasp3_pins_default>;
|
||||
pinctrl-1 = <&mcasp3_pins_sleep>;
|
||||
status = "okay";
|
||||
|
||||
op-mode = <0>; /* MCASP_IIS_MODE */
|
||||
tdm-slots = <2>;
|
||||
/* 4 serializers */
|
||||
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
||||
1 2 0 0
|
||||
>;
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
status = "okay";
|
||||
ti,no-reset-on-init;
|
||||
};
|
||||
|
||||
&gpio2 {
|
||||
status = "okay";
|
||||
ti,no-reset-on-init;
|
||||
};
|
||||
|
|
@ -0,0 +1,179 @@
|
|||
/*
|
||||
* Support for CompuLab SBC-AM57x single board computer
|
||||
*
|
||||
* Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
|
||||
* Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published by
|
||||
* the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include "am57xx-cl-som-am57x.dts"
|
||||
#include "compulab-sb-som.dtsi"
|
||||
|
||||
/ {
|
||||
model = "CompuLab CL-SOM-AM57x on SB-SOM-AM57x";
|
||||
compatible = "compulab,sbc-am57x", "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
|
||||
|
||||
aliases {
|
||||
display0 = &lcd0;
|
||||
display1 = &hdmi;
|
||||
};
|
||||
};
|
||||
|
||||
&dra7_pmx_core {
|
||||
uart3_pins_default: uart3_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
|
||||
DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins_default: mmc1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
|
||||
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
|
||||
DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
|
||||
DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1_sdcd.gpio6_27 */
|
||||
DRA7XX_CORE_IOPAD(0x377c, PIN_INPUT | MUX_MODE14) /* mmc1_sdwp.gpio6_28 */
|
||||
>;
|
||||
};
|
||||
|
||||
usb1_pins: pinmux_usb1_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c5_pins_default: i2c5_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT| MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
|
||||
DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT| MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
lcd_pins_default: lcd_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3564, PIN_OUTPUT | MUX_MODE14) /* vin2a_vsync0.gpio4_0 */
|
||||
>;
|
||||
};
|
||||
|
||||
hdmi_pins: pinmux_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
|
||||
DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
hdmi_conn_pins: pinmux_hdmi_conn_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT | MUX_MODE14) /* spi1_cs2.gpio7_12 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&dra7_pmx_core 0x3f8>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins_default>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins_default>;
|
||||
|
||||
vmmc-supply = <&ldo1_reg>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio6 28 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb1_pins>;
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c5_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
eeprom_base: atmel@50 {
|
||||
compatible = "atmel,24c08";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
pca9555: pca9555@20 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "ok";
|
||||
|
||||
vdda_video-supply = <&ldoln_reg>;
|
||||
|
||||
port {
|
||||
dpi_lcd_out: endpoint@0 {
|
||||
remote-endpoint = <&lcd_in>;
|
||||
data-lines = <24>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&lcd0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_pins_default>;
|
||||
|
||||
enable-gpios = <&pca9555 14 GPIO_ACTIVE_HIGH
|
||||
&gpio4 0 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&dpi_lcd_out>;
|
||||
data-lines = <24>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
status = "ok";
|
||||
vdda-supply = <&ldo4_reg>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdmi_pins>;
|
||||
|
||||
port {
|
||||
hdmi_out: endpoint {
|
||||
remote-endpoint = <&hdmi_connector_in>;
|
||||
lanes = <1 0 3 2 5 4 7 6>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi_conn {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdmi_conn_pins>;
|
||||
|
||||
hpd-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
port {
|
||||
hdmi_connector_in: endpoint {
|
||||
remote-endpoint = <&hdmi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
/*
|
||||
* Copyright (C) 2015 CompuLab, Ltd. - http://www.compulab.co.il/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/ {
|
||||
model = "CompuLab SB-SOM";
|
||||
compatible = "compulab,sb-som";
|
||||
|
||||
vsb_3v3: fixedregulator-v3_3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vsb_3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
lcd0: display {
|
||||
compatible = "startek,startek-kd050c", "panel-dpi";
|
||||
label = "lcd";
|
||||
|
||||
panel-timing {
|
||||
clock-frequency = <33000000>;
|
||||
hactive = <800>;
|
||||
vactive = <480>;
|
||||
hfront-porch = <40>;
|
||||
hback-porch = <40>;
|
||||
hsync-len = <43>;
|
||||
vback-porch = <29>;
|
||||
vfront-porch = <13>;
|
||||
vsync-len = <3>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <0>;
|
||||
de-active = <1>;
|
||||
pixelclk-active = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
hdmi_conn: connector@0 {
|
||||
compatible = "hdmi-connector";
|
||||
label = "hdmi";
|
||||
|
||||
type = "a";
|
||||
};
|
||||
};
|
||||
|
|
@ -64,7 +64,6 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
ti,hwmods = "l3_main";
|
||||
|
||||
prcm: prcm@48180000 {
|
||||
compatible = "ti,dm816-prcm";
|
||||
|
|
@ -180,6 +179,8 @@
|
|||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
interrupts = <100>;
|
||||
dmas = <&edma 52>;
|
||||
dma-names = "rxtx";
|
||||
gpmc,num-cs = <6>;
|
||||
gpmc,num-waitpins = <2>;
|
||||
};
|
||||
|
|
@ -226,6 +227,13 @@
|
|||
};
|
||||
};
|
||||
|
||||
spinbox: spinbox@480ca000 {
|
||||
compatible = "ti,omap4-hwspinlock";
|
||||
reg = <0x480ca000 0x2000>;
|
||||
ti,hwmods = "spinbox";
|
||||
#hwlock-cells = <1>;
|
||||
};
|
||||
|
||||
mdio: mdio@4a100800 {
|
||||
compatible = "ti,davinci_mdio";
|
||||
#address-cells = <1>;
|
||||
|
|
@ -319,6 +327,7 @@
|
|||
reg = <0x48044000 0x2000>;
|
||||
interrupts = <92>;
|
||||
ti,hwmods = "timer4";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer5: timer@48046000 {
|
||||
|
|
@ -326,6 +335,7 @@
|
|||
reg = <0x48046000 0x2000>;
|
||||
interrupts = <93>;
|
||||
ti,hwmods = "timer5";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer6: timer@48048000 {
|
||||
|
|
@ -333,6 +343,7 @@
|
|||
reg = <0x48048000 0x2000>;
|
||||
interrupts = <94>;
|
||||
ti,hwmods = "timer6";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer7: timer@4804a000 {
|
||||
|
|
@ -340,6 +351,7 @@
|
|||
reg = <0x4804a000 0x2000>;
|
||||
interrupts = <95>;
|
||||
ti,hwmods = "timer7";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
uart1: uart@48020000 {
|
||||
|
|
|
|||
|
|
@ -154,100 +154,100 @@
|
|||
|
||||
vtt_pin: pinmux_vtt_pin {
|
||||
pinctrl-single,pins = <
|
||||
0x3b4 (PIN_OUTPUT | MUX_MODE14) /* spi1_cs1.gpio7_11 */
|
||||
DRA7XX_CORE_IOPAD(0x37b4, PIN_OUTPUT | MUX_MODE14) /* spi1_cs1.gpio7_11 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda */
|
||||
0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl */
|
||||
DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT | MUX_MODE0) /* i2c1_sda */
|
||||
DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT | MUX_MODE0) /* i2c1_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */
|
||||
0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl */
|
||||
DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
|
||||
DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x288 (PIN_INPUT | MUX_MODE9) /* gpio6_14.i2c3_sda */
|
||||
0x28c (PIN_INPUT | MUX_MODE9) /* gpio6_15.i2c3_scl */
|
||||
DRA7XX_CORE_IOPAD(0x3688, PIN_INPUT | MUX_MODE9) /* gpio6_14.i2c3_sda */
|
||||
DRA7XX_CORE_IOPAD(0x368c, PIN_INPUT | MUX_MODE9) /* gpio6_15.i2c3_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
mcspi1_pins: pinmux_mcspi1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x3a4 (PIN_INPUT | MUX_MODE0) /* spi1_sclk */
|
||||
0x3a8 (PIN_INPUT | MUX_MODE0) /* spi1_d1 */
|
||||
0x3ac (PIN_INPUT | MUX_MODE0) /* spi1_d0 */
|
||||
0x3b0 (PIN_INPUT_SLEW | MUX_MODE0) /* spi1_cs0 */
|
||||
0x3b8 (PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs2.hdmi1_hpd */
|
||||
0x3bc (PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs3.hdmi1_cec */
|
||||
DRA7XX_CORE_IOPAD(0x37a4, PIN_INPUT | MUX_MODE0) /* spi1_sclk */
|
||||
DRA7XX_CORE_IOPAD(0x37a8, PIN_INPUT | MUX_MODE0) /* spi1_d1 */
|
||||
DRA7XX_CORE_IOPAD(0x37ac, PIN_INPUT | MUX_MODE0) /* spi1_d0 */
|
||||
DRA7XX_CORE_IOPAD(0x37b0, PIN_INPUT_SLEW | MUX_MODE0) /* spi1_cs0 */
|
||||
DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs2.hdmi1_hpd */
|
||||
DRA7XX_CORE_IOPAD(0x37bc, PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs3.hdmi1_cec */
|
||||
>;
|
||||
};
|
||||
|
||||
mcspi2_pins: pinmux_mcspi2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x3c0 (PIN_INPUT | MUX_MODE0) /* spi2_sclk */
|
||||
0x3c4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
|
||||
0x3c8 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
|
||||
0x3cc (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */
|
||||
DRA7XX_CORE_IOPAD(0x37c0, PIN_INPUT | MUX_MODE0) /* spi2_sclk */
|
||||
DRA7XX_CORE_IOPAD(0x37c4, PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
|
||||
DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
|
||||
DRA7XX_CORE_IOPAD(0x37cc, PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins: pinmux_uart1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x3e0 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_rxd */
|
||||
0x3e4 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_txd */
|
||||
0x3e8 (PIN_INPUT | MUX_MODE3) /* uart1_ctsn */
|
||||
0x3ec (PIN_INPUT | MUX_MODE3) /* uart1_rtsn */
|
||||
DRA7XX_CORE_IOPAD(0x37e0, PIN_INPUT_SLEW | MUX_MODE0) /* uart1_rxd */
|
||||
DRA7XX_CORE_IOPAD(0x37e4, PIN_INPUT_SLEW | MUX_MODE0) /* uart1_txd */
|
||||
DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT | MUX_MODE3) /* uart1_ctsn */
|
||||
DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT | MUX_MODE3) /* uart1_rtsn */
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x3f0 (PIN_INPUT | MUX_MODE0) /* uart2_rxd */
|
||||
0x3f4 (PIN_INPUT | MUX_MODE0) /* uart2_txd */
|
||||
0x3f8 (PIN_INPUT | MUX_MODE0) /* uart2_ctsn */
|
||||
0x3fc (PIN_INPUT | MUX_MODE0) /* uart2_rtsn */
|
||||
DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT | MUX_MODE0) /* uart2_rxd */
|
||||
DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT | MUX_MODE0) /* uart2_txd */
|
||||
DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT | MUX_MODE0) /* uart2_ctsn */
|
||||
DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT | MUX_MODE0) /* uart2_rtsn */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x248 (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */
|
||||
0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
|
||||
DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */
|
||||
DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
qspi1_pins: pinmux_qspi1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x4c (PIN_INPUT | MUX_MODE1) /* gpmc_a3.qspi1_cs2 */
|
||||
0x50 (PIN_INPUT | MUX_MODE1) /* gpmc_a4.qspi1_cs3 */
|
||||
0x74 (PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */
|
||||
0x78 (PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */
|
||||
0x7c (PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */
|
||||
0x80 (PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */
|
||||
0x84 (PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */
|
||||
0x88 (PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */
|
||||
0xb8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */
|
||||
0xbc (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */
|
||||
DRA7XX_CORE_IOPAD(0x344c, PIN_INPUT | MUX_MODE1) /* gpmc_a3.qspi1_cs2 */
|
||||
DRA7XX_CORE_IOPAD(0x3450, PIN_INPUT | MUX_MODE1) /* gpmc_a4.qspi1_cs3 */
|
||||
DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */
|
||||
DRA7XX_CORE_IOPAD(0x3478, PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */
|
||||
DRA7XX_CORE_IOPAD(0x347c, PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */
|
||||
DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */
|
||||
DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */
|
||||
DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */
|
||||
DRA7XX_CORE_IOPAD(0x34b8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */
|
||||
DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */
|
||||
>;
|
||||
};
|
||||
|
||||
usb1_pins: pinmux_usb1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
|
||||
DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
|
||||
>;
|
||||
};
|
||||
|
||||
usb2_pins: pinmux_usb2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x284 (PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
|
||||
DRA7XX_CORE_IOPAD(0x3684, PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
@ -257,60 +257,60 @@
|
|||
* SW5.9 (GPMC_WPN) = LOW
|
||||
* SW5.1 (NAND_BOOTn) = HIGH */
|
||||
pinctrl-single,pins = <
|
||||
0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
|
||||
0x4 (PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */
|
||||
0x8 (PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */
|
||||
0xc (PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */
|
||||
0x10 (PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */
|
||||
0x14 (PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */
|
||||
0x18 (PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */
|
||||
0x1c (PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */
|
||||
0x20 (PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */
|
||||
0x24 (PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */
|
||||
0x28 (PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */
|
||||
0x2c (PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */
|
||||
0x30 (PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */
|
||||
0x34 (PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */
|
||||
0x38 (PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */
|
||||
0x3c (PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */
|
||||
0xd8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0 */
|
||||
0xcc (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */
|
||||
0xb4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn0 */
|
||||
0xc4 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
|
||||
0xc8 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
|
||||
0xd0 (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle */
|
||||
DRA7XX_CORE_IOPAD(0x3400, PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
|
||||
DRA7XX_CORE_IOPAD(0x3404, PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */
|
||||
DRA7XX_CORE_IOPAD(0x3408, PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */
|
||||
DRA7XX_CORE_IOPAD(0x340c, PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */
|
||||
DRA7XX_CORE_IOPAD(0x3410, PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */
|
||||
DRA7XX_CORE_IOPAD(0x3414, PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */
|
||||
DRA7XX_CORE_IOPAD(0x3418, PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */
|
||||
DRA7XX_CORE_IOPAD(0x341c, PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */
|
||||
DRA7XX_CORE_IOPAD(0x3420, PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */
|
||||
DRA7XX_CORE_IOPAD(0x3424, PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */
|
||||
DRA7XX_CORE_IOPAD(0x3428, PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */
|
||||
DRA7XX_CORE_IOPAD(0x342c, PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */
|
||||
DRA7XX_CORE_IOPAD(0x3430, PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */
|
||||
DRA7XX_CORE_IOPAD(0x3434, PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */
|
||||
DRA7XX_CORE_IOPAD(0x3438, PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */
|
||||
DRA7XX_CORE_IOPAD(0x343c, PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */
|
||||
DRA7XX_CORE_IOPAD(0x34d8, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0 */
|
||||
DRA7XX_CORE_IOPAD(0x34cc, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */
|
||||
DRA7XX_CORE_IOPAD(0x34b4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn0 */
|
||||
DRA7XX_CORE_IOPAD(0x34c4, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
|
||||
DRA7XX_CORE_IOPAD(0x34c8, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
|
||||
DRA7XX_CORE_IOPAD(0x34d0, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x250 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txc.rgmii0_txc */
|
||||
0x254 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txctl.rgmii0_txctl */
|
||||
0x258 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_td3.rgmii0_txd3 */
|
||||
0x25c (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd2.rgmii0_txd2 */
|
||||
0x260 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd1.rgmii0_txd1 */
|
||||
0x264 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd0.rgmii0_txd0 */
|
||||
0x268 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxc.rgmii0_rxc */
|
||||
0x26c (PIN_INPUT | MUX_MODE0) /* rgmii0_rxctl.rgmii0_rxctl */
|
||||
0x270 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd3.rgmii0_rxd3 */
|
||||
0x274 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd2.rgmii0_rxd2 */
|
||||
0x278 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd1.rgmii0_rxd1 */
|
||||
0x27c (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd0.rgmii0_rxd0 */
|
||||
DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii0_txc.rgmii0_txc */
|
||||
DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii0_txctl.rgmii0_txctl */
|
||||
DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td3.rgmii0_txd3 */
|
||||
DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd2.rgmii0_txd2 */
|
||||
DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd1.rgmii0_txd1 */
|
||||
DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd0.rgmii0_txd0 */
|
||||
DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE0) /* rgmii0_rxc.rgmii0_rxc */
|
||||
DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE0) /* rgmii0_rxctl.rgmii0_rxctl */
|
||||
DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE0) /* rgmii0_rxd3.rgmii0_rxd3 */
|
||||
DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE0) /* rgmii0_rxd2.rgmii0_rxd2 */
|
||||
DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE0) /* rgmii0_rxd1.rgmii0_rxd1 */
|
||||
DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE0) /* rgmii0_rxd0.rgmii0_rxd0 */
|
||||
|
||||
/* Slave 2 */
|
||||
0x198 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_txc */
|
||||
0x19c (PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */
|
||||
0x1a0 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */
|
||||
0x1a4 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */
|
||||
0x1a8 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */
|
||||
0x1ac (PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */
|
||||
0x1b0 (PIN_INPUT | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
|
||||
0x1b4 (PIN_INPUT | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
|
||||
0x1b8 (PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
|
||||
0x1bc (PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
|
||||
0x1c0 (PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
|
||||
0x1c4 (PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
|
||||
DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_txc */
|
||||
DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */
|
||||
DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */
|
||||
DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */
|
||||
DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */
|
||||
DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */
|
||||
DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
|
||||
DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
|
||||
DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
|
||||
DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
|
||||
DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
|
||||
DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
|
||||
>;
|
||||
|
||||
};
|
||||
|
|
@ -318,85 +318,85 @@
|
|||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x250 (MUX_MODE15)
|
||||
0x254 (MUX_MODE15)
|
||||
0x258 (MUX_MODE15)
|
||||
0x25c (MUX_MODE15)
|
||||
0x260 (MUX_MODE15)
|
||||
0x264 (MUX_MODE15)
|
||||
0x268 (MUX_MODE15)
|
||||
0x26c (MUX_MODE15)
|
||||
0x270 (MUX_MODE15)
|
||||
0x274 (MUX_MODE15)
|
||||
0x278 (MUX_MODE15)
|
||||
0x27c (MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3650, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3654, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3658, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x365c, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3660, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3664, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3668, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x366c, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3670, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3674, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3678, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x367c, MUX_MODE15)
|
||||
|
||||
/* Slave 2 */
|
||||
0x198 (MUX_MODE15)
|
||||
0x19c (MUX_MODE15)
|
||||
0x1a0 (MUX_MODE15)
|
||||
0x1a4 (MUX_MODE15)
|
||||
0x1a8 (MUX_MODE15)
|
||||
0x1ac (MUX_MODE15)
|
||||
0x1b0 (MUX_MODE15)
|
||||
0x1b4 (MUX_MODE15)
|
||||
0x1b8 (MUX_MODE15)
|
||||
0x1bc (MUX_MODE15)
|
||||
0x1c0 (MUX_MODE15)
|
||||
0x1c4 (MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3598, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x359c, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a0, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a4, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a8, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35ac, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b0, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b4, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b8, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35bc, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35c0, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35c4, MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_d.mdio_d */
|
||||
0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_d.mdio_d */
|
||||
DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x23c (MUX_MODE15)
|
||||
0x240 (MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x363c, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3640, MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
|
||||
dcan1_pins_default: dcan1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
|
||||
0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
|
||||
DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
|
||||
DRA7XX_CORE_IOPAD(0x3818, PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
|
||||
>;
|
||||
};
|
||||
|
||||
dcan1_pins_sleep: dcan1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
|
||||
0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
|
||||
DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
|
||||
DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */
|
||||
>;
|
||||
};
|
||||
|
||||
atl_pins: pinmux_atl_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x298 (PIN_OUTPUT | MUX_MODE5) /* xref_clk1.atl_clk1 */
|
||||
0x29c (PIN_OUTPUT | MUX_MODE5) /* xref_clk2.atl_clk2 */
|
||||
DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT | MUX_MODE5) /* xref_clk1.atl_clk1 */
|
||||
DRA7XX_CORE_IOPAD(0x369c, PIN_OUTPUT | MUX_MODE5) /* xref_clk2.atl_clk2 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp3_pins: pinmux_mcasp3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x324 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx */
|
||||
0x328 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx */
|
||||
0x32c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0 */
|
||||
0x330 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1 */
|
||||
DRA7XX_CORE_IOPAD(0x3724, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx */
|
||||
DRA7XX_CORE_IOPAD(0x3728, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx */
|
||||
DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0 */
|
||||
DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp3_sleep_pins: pinmux_mcasp3_sleep_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x324 (MUX_MODE15)
|
||||
0x328 (MUX_MODE15)
|
||||
0x32c (MUX_MODE15)
|
||||
0x330 (MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3724, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3728, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x372c, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3730, MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -41,6 +41,7 @@
|
|||
ethernet1 = &cpsw_emac1;
|
||||
d_can0 = &dcan1;
|
||||
d_can1 = &dcan2;
|
||||
spi0 = &qspi;
|
||||
};
|
||||
|
||||
timer {
|
||||
|
|
|
|||
|
|
@ -142,158 +142,158 @@
|
|||
&dra7_pmx_core {
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
|
||||
0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
|
||||
DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
|
||||
DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c5_pins: pinmux_i2c5_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x2b4 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
|
||||
0x2b8 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
|
||||
DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
|
||||
DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c5_pins: pinmux_i2c5_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x2b4 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
|
||||
0x2b8 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
|
||||
DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
|
||||
DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
nand_default: nand_default {
|
||||
pinctrl-single,pins = <
|
||||
0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
|
||||
0x4 (PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */
|
||||
0x8 (PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */
|
||||
0xc (PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */
|
||||
0x10 (PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */
|
||||
0x14 (PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */
|
||||
0x18 (PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */
|
||||
0x1c (PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */
|
||||
0x20 (PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */
|
||||
0x24 (PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */
|
||||
0x28 (PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */
|
||||
0x2c (PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */
|
||||
0x30 (PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */
|
||||
0x34 (PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */
|
||||
0x38 (PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */
|
||||
0x3c (PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */
|
||||
0xb4 (PIN_OUTPUT | MUX_MODE0) /* gpmc_cs0 */
|
||||
0xc4 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
|
||||
0xcc (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */
|
||||
0xc8 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
|
||||
0xd0 (PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0 */
|
||||
0xd8 (PIN_INPUT | MUX_MODE0) /* gpmc_wait0 */
|
||||
DRA7XX_CORE_IOPAD(0x3400, PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
|
||||
DRA7XX_CORE_IOPAD(0x3404, PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */
|
||||
DRA7XX_CORE_IOPAD(0x3408, PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */
|
||||
DRA7XX_CORE_IOPAD(0x340c, PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */
|
||||
DRA7XX_CORE_IOPAD(0x3410, PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */
|
||||
DRA7XX_CORE_IOPAD(0x3414, PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */
|
||||
DRA7XX_CORE_IOPAD(0x3418, PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */
|
||||
DRA7XX_CORE_IOPAD(0x341c, PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */
|
||||
DRA7XX_CORE_IOPAD(0x3420, PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */
|
||||
DRA7XX_CORE_IOPAD(0x3424, PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */
|
||||
DRA7XX_CORE_IOPAD(0x3428, PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */
|
||||
DRA7XX_CORE_IOPAD(0x342c, PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */
|
||||
DRA7XX_CORE_IOPAD(0x3430, PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */
|
||||
DRA7XX_CORE_IOPAD(0x3434, PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */
|
||||
DRA7XX_CORE_IOPAD(0x3438, PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */
|
||||
DRA7XX_CORE_IOPAD(0x343c, PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */
|
||||
DRA7XX_CORE_IOPAD(0x34b4, PIN_OUTPUT | MUX_MODE0) /* gpmc_cs0 */
|
||||
DRA7XX_CORE_IOPAD(0x34c4, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
|
||||
DRA7XX_CORE_IOPAD(0x34cc, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */
|
||||
DRA7XX_CORE_IOPAD(0x34c8, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
|
||||
DRA7XX_CORE_IOPAD(0x34d0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0 */
|
||||
DRA7XX_CORE_IOPAD(0x34d8, PIN_INPUT | MUX_MODE0) /* gpmc_wait0 */
|
||||
>;
|
||||
};
|
||||
|
||||
usb1_pins: pinmux_usb1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
|
||||
DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
|
||||
>;
|
||||
};
|
||||
|
||||
usb2_pins: pinmux_usb2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x284 (PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
|
||||
DRA7XX_CORE_IOPAD(0x3684, PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
|
||||
>;
|
||||
};
|
||||
|
||||
tps65917_pins_default: tps65917_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
|
||||
DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins_default: mmc1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x36c (PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
|
||||
0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
|
||||
0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
|
||||
0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
|
||||
0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
|
||||
0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
|
||||
0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
|
||||
DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
|
||||
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
|
||||
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
|
||||
DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins_default: mmc2_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
|
||||
0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
|
||||
0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
|
||||
0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
|
||||
0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
|
||||
0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
|
||||
0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
|
||||
0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
|
||||
0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
|
||||
0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
|
||||
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
|
||||
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
|
||||
DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
|
||||
DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
|
||||
DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
|
||||
DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
|
||||
DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
dcan1_pins_default: dcan1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
|
||||
0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
|
||||
DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
|
||||
DRA7XX_CORE_IOPAD(0x3818, PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
|
||||
>;
|
||||
};
|
||||
|
||||
dcan1_pins_sleep: dcan1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
|
||||
0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
|
||||
DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
|
||||
DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */
|
||||
>;
|
||||
};
|
||||
|
||||
qspi1_pins: pinmux_qspi1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x74 (PIN_OUTPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */
|
||||
0x78 (PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */
|
||||
0x7c (PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */
|
||||
0x80 (PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */
|
||||
0x84 (PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */
|
||||
0x88 (PIN_OUTPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */
|
||||
0xb8 (PIN_OUTPUT | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */
|
||||
DRA7XX_CORE_IOPAD(0x3474, PIN_OUTPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */
|
||||
DRA7XX_CORE_IOPAD(0x3478, PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */
|
||||
DRA7XX_CORE_IOPAD(0x347c, PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */
|
||||
DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */
|
||||
DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */
|
||||
DRA7XX_CORE_IOPAD(0x3488, PIN_OUTPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */
|
||||
DRA7XX_CORE_IOPAD(0x34b8, PIN_OUTPUT | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
hdmi_pins: pinmux_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x408 (PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
|
||||
0x40c (PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
|
||||
DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
|
||||
DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
tpd12s015_pins: pinmux_tpd12s015_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
|
||||
DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
|
||||
>;
|
||||
};
|
||||
|
||||
atl_pins: pinmux_atl_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x298 (PIN_OUTPUT | MUX_MODE5) /* xref_clk1.atl_clk1 */
|
||||
0x29c (PIN_OUTPUT | MUX_MODE5) /* xref_clk2.atl_clk2 */
|
||||
DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT | MUX_MODE5) /* xref_clk1.atl_clk1 */
|
||||
DRA7XX_CORE_IOPAD(0x369c, PIN_OUTPUT | MUX_MODE5) /* xref_clk2.atl_clk2 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp3_pins: pinmux_mcasp3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x324 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx */
|
||||
0x328 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx */
|
||||
0x32c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0 */
|
||||
0x330 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1 */
|
||||
DRA7XX_CORE_IOPAD(0x3724, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx */
|
||||
DRA7XX_CORE_IOPAD(0x3728, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx */
|
||||
DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0 */
|
||||
DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp3_sleep_pins: pinmux_mcasp3_sleep_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x324 (PIN_INPUT_PULLDOWN | MUX_MODE15)
|
||||
0x328 (PIN_INPUT_PULLDOWN | MUX_MODE15)
|
||||
0x32c (PIN_INPUT_PULLDOWN | MUX_MODE15)
|
||||
0x330 (PIN_INPUT_PULLDOWN | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT_PULLDOWN | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -478,6 +478,8 @@
|
|||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&dra7_pmx_core 0x3e0>;
|
||||
};
|
||||
|
||||
&elm {
|
||||
|
|
@ -627,18 +629,18 @@
|
|||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 2 */
|
||||
0x198 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_txc */
|
||||
0x19c (PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */
|
||||
0x1a0 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */
|
||||
0x1a4 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */
|
||||
0x1a8 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */
|
||||
0x1ac (PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */
|
||||
0x1b0 (PIN_INPUT | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
|
||||
0x1b4 (PIN_INPUT | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
|
||||
0x1b8 (PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
|
||||
0x1bc (PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
|
||||
0x1c0 (PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
|
||||
0x1c4 (PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
|
||||
DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_txc */
|
||||
DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */
|
||||
DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */
|
||||
DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */
|
||||
DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */
|
||||
DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */
|
||||
DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
|
||||
DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
|
||||
DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
|
||||
DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
|
||||
DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
|
||||
DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
|
||||
>;
|
||||
|
||||
};
|
||||
|
|
@ -646,33 +648,33 @@
|
|||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 2 */
|
||||
0x198 (MUX_MODE15)
|
||||
0x19c (MUX_MODE15)
|
||||
0x1a0 (MUX_MODE15)
|
||||
0x1a4 (MUX_MODE15)
|
||||
0x1a8 (MUX_MODE15)
|
||||
0x1ac (MUX_MODE15)
|
||||
0x1b0 (MUX_MODE15)
|
||||
0x1b4 (MUX_MODE15)
|
||||
0x1b8 (MUX_MODE15)
|
||||
0x1bc (MUX_MODE15)
|
||||
0x1c0 (MUX_MODE15)
|
||||
0x1c4 (MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3598, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x359c, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a0, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a4, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a8, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35ac, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b0, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b4, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b8, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35bc, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35c0, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35c4, MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_d.mdio_d */
|
||||
0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_d.mdio_d */
|
||||
DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x23c (MUX_MODE15)
|
||||
0x240 (MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x363c, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3640, MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -48,6 +48,12 @@
|
|||
};
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "ti,omap-twl4030";
|
||||
ti,model = "omap3logic";
|
||||
ti,mcbsp = <&mcbsp2>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -67,6 +73,30 @@
|
|||
};
|
||||
};
|
||||
|
||||
&vaux1 {
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
};
|
||||
|
||||
&vaux4 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
&vaux1 {
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
};
|
||||
|
||||
&vaux4 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
&mcbsp2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&charger {
|
||||
ti,bb-uvolt = <3200000>;
|
||||
ti,bb-uamp = <150>;
|
||||
|
|
|
|||
|
|
@ -96,9 +96,30 @@
|
|||
reg = <0x48>;
|
||||
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
|
||||
interrupt-parent = <&intc>;
|
||||
twl_audio: audio {
|
||||
compatible = "ti,twl4030-audio";
|
||||
codec {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
/*
|
||||
* Only found on the wireless SOM. For the SOM without wireless, the pins for
|
||||
* MMC3 can be routed with jumpers to the second MMC slot on the devkit and
|
||||
|
|
@ -136,6 +157,29 @@
|
|||
OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* mcbsp1_fsr.gpio_157 */
|
||||
>;
|
||||
};
|
||||
mcbsp2_pins: pinmux_mcbsp2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */
|
||||
OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */
|
||||
OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */
|
||||
OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */
|
||||
>;
|
||||
};
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
|
||||
OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
|
||||
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
|
||||
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
|
||||
OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
};
|
||||
|
||||
&omap3_pmx_core2 {
|
||||
|
|
|
|||
|
|
@ -176,18 +176,18 @@
|
|||
&omap3_pmx_wkup {
|
||||
gpio1_pins: pinmux_gpio1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot2.gpio_4 */
|
||||
OMAP3_WKUP_IOPAD(0x2a0e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot2.gpio_4 */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_dpi_pins2: pinmux_dss_dpi_pins1 {
|
||||
pinctrl-single,pins = <
|
||||
0x0a (PIN_OUTPUT | MUX_MODE3) /* sys_boot0.dss_data18 */
|
||||
0x0c (PIN_OUTPUT | MUX_MODE3) /* sys_boot1.dss_data19 */
|
||||
0x10 (PIN_OUTPUT | MUX_MODE3) /* sys_boot3.dss_data20 */
|
||||
0x12 (PIN_OUTPUT | MUX_MODE3) /* sys_boot4.dss_data21 */
|
||||
0x14 (PIN_OUTPUT | MUX_MODE3) /* sys_boot5.dss_data22 */
|
||||
0x16 (PIN_OUTPUT | MUX_MODE3) /* sys_boot6.dss_data23 */
|
||||
OMAP3_WKUP_IOPAD(0x2a0a, PIN_OUTPUT | MUX_MODE3) /* sys_boot0.dss_data18 */
|
||||
OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE3) /* sys_boot1.dss_data19 */
|
||||
OMAP3_WKUP_IOPAD(0x2a10, PIN_OUTPUT | MUX_MODE3) /* sys_boot3.dss_data20 */
|
||||
OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE3) /* sys_boot4.dss_data21 */
|
||||
OMAP3_WKUP_IOPAD(0x2a14, PIN_OUTPUT | MUX_MODE3) /* sys_boot5.dss_data22 */
|
||||
OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | MUX_MODE3) /* sys_boot6.dss_data23 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -200,8 +200,8 @@
|
|||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */
|
||||
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -171,7 +171,7 @@
|
|||
&omap3_pmx_wkup {
|
||||
gpio1_pins: pinmux_gpio1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x14 (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
|
||||
OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -195,47 +195,47 @@
|
|||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
>;
|
||||
};
|
||||
|
||||
tfp410_pins: pinmux_tfp410_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
|
||||
OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_dpi_pins: pinmux_dss_dpi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
|
||||
0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
|
||||
0x0a8 (PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
|
||||
0x0aa (PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
|
||||
0x0ac (PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
|
||||
0x0ae (PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
|
||||
0x0b0 (PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
|
||||
0x0b2 (PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
|
||||
0x0b4 (PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
|
||||
0x0b6 (PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
|
||||
0x0b8 (PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
|
||||
0x0ba (PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
|
||||
0x0bc (PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
|
||||
0x0be (PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
|
||||
0x0c0 (PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
|
||||
0x0c2 (PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
|
||||
0x0c4 (PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
|
||||
0x0c6 (PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
|
||||
0x0c8 (PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
|
||||
0x0ca (PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
|
||||
0x0cc (PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
|
||||
0x0ce (PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
|
||||
0x0d0 (PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
|
||||
0x0d2 (PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
|
||||
0x0d4 (PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
|
||||
0x0d6 (PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
|
||||
0x0d8 (PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
|
||||
0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
|
||||
OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
|
||||
OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
|
||||
OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
|
||||
OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
|
||||
OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
|
||||
OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
|
||||
OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
|
||||
OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
|
||||
OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
|
||||
OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
|
||||
OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
|
||||
OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
|
||||
OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
|
||||
OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
|
||||
OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
|
||||
OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
|
||||
OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
|
||||
OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
|
||||
OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
|
||||
OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
|
||||
OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
|
||||
OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
|
||||
OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
|
||||
OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
|
||||
OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
|
||||
OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
|
||||
OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
|
||||
OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -66,48 +66,48 @@
|
|||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
|
||||
0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
|
||||
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
|
||||
0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
|
||||
0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
|
||||
0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
|
||||
0x120 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
|
||||
0x122 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
|
||||
0x124 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
|
||||
0x126 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
|
||||
OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
|
||||
OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
|
||||
OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
|
||||
OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
|
||||
OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
|
||||
OMAP3_CORE1_IOPAD(0x2156, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
/* NOTE: Clocked externally, needs INPUT also for sdmmc2_clk.sdmmc2_clk */
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
|
||||
0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
|
||||
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
|
||||
0x12e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
|
||||
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
|
||||
0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
|
||||
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
|
||||
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x215e, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x16e (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
OMAP3_CORE1_IOPAD(0x219e, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
>;
|
||||
};
|
||||
|
||||
wl12xx_gpio: pinmux_wl12xx_gpio {
|
||||
pinctrl-single,pins = <
|
||||
0x150 (PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */
|
||||
0x14e (PIN_INPUT | MUX_MODE4) /* uart1_rts.gpio_149 */
|
||||
OMAP3_CORE1_IOPAD(0x2180, PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */
|
||||
OMAP3_CORE1_IOPAD(0x217e, PIN_INPUT | MUX_MODE4) /* uart1_rts.gpio_149 */
|
||||
>;
|
||||
};
|
||||
|
||||
smsc911x_pins: pinmux_smsc911x_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
|
||||
OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -115,12 +115,12 @@
|
|||
&omap3_pmx_wkup {
|
||||
dss_dpi_pins2: pinmux_dss_dpi_pins1 {
|
||||
pinctrl-single,pins = <
|
||||
0x0a (PIN_OUTPUT | MUX_MODE3) /* sys_boot0.dss_data18 */
|
||||
0x0c (PIN_OUTPUT | MUX_MODE3) /* sys_boot1.dss_data19 */
|
||||
0x10 (PIN_OUTPUT | MUX_MODE3) /* sys_boot3.dss_data20 */
|
||||
0x12 (PIN_OUTPUT | MUX_MODE3) /* sys_boot4.dss_data21 */
|
||||
0x14 (PIN_OUTPUT | MUX_MODE3) /* sys_boot5.dss_data22 */
|
||||
0x16 (PIN_OUTPUT | MUX_MODE3) /* sys_boot6.dss_data23 */
|
||||
OMAP3_WKUP_IOPAD(0x2a0a, PIN_OUTPUT | MUX_MODE3) /* sys_boot0.dss_data18 */
|
||||
OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE3) /* sys_boot1.dss_data19 */
|
||||
OMAP3_WKUP_IOPAD(0x2a10, PIN_OUTPUT | MUX_MODE3) /* sys_boot3.dss_data20 */
|
||||
OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE3) /* sys_boot4.dss_data21 */
|
||||
OMAP3_WKUP_IOPAD(0x2a14, PIN_OUTPUT | MUX_MODE3) /* sys_boot5.dss_data22 */
|
||||
OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | MUX_MODE3) /* sys_boot6.dss_data23 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -15,25 +15,17 @@
|
|||
model = "IGEPv2 Rev. C (TI OMAP AM/DM37x)";
|
||||
compatible = "isee,omap3-igep0020", "ti,omap36xx", "ti,omap3";
|
||||
|
||||
/* Regulator to trigger the WIFI_PDN signal of the Wifi module */
|
||||
lbee1usjyc_pdn: lbee1usjyc_pdn {
|
||||
vmmcsdio_fixed: fixedregulator-mmcsdio {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "regulator-lbee1usjyc-pdn";
|
||||
regulator-name = "vmmcsdio_fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; /* gpio_138 - WIFI_PDN */
|
||||
startup-delay-us = <10000>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
/* Regulator to trigger the RESET_N_W signal of the Wifi module */
|
||||
lbee1usjyc_reset_n_w: lbee1usjyc_reset_n_w {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "regulator-lbee1usjyc-reset-n-w";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* gpio_139 - RESET_N_W */
|
||||
enable-active-high;
|
||||
mmc2_pwrseq: mmc2_pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>, /* gpio_139 - RESET_N_W */
|
||||
<&gpio5 10 GPIO_ACTIVE_LOW>; /* gpio_138 - WIFI_PDN */
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -51,8 +43,8 @@
|
|||
&mmc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins &lbee1usjyc_pins>;
|
||||
vmmc-supply = <&lbee1usjyc_pdn>;
|
||||
vmmc_aux-supply = <&lbee1usjyc_reset_n_w>;
|
||||
vmmc-supply = <&vmmcsdio_fixed>;
|
||||
mmc-pwrseq = <&mmc2_pwrseq>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -15,25 +15,17 @@
|
|||
model = "IGEP COM MODULE Rev. E (TI OMAP AM/DM37x)";
|
||||
compatible = "isee,omap3-igep0030", "ti,omap36xx", "ti,omap3";
|
||||
|
||||
/* Regulator to trigger the WIFI_PDN signal of the Wifi module */
|
||||
lbee1usjyc_pdn: lbee1usjyc_pdn {
|
||||
vmmcsdio_fixed: fixedregulator-mmcsdio {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "regulator-lbee1usjyc-pdn";
|
||||
regulator-name = "vmmcsdio_fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; /* gpio_138 - WIFI_PDN */
|
||||
startup-delay-us = <10000>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
/* Regulator to trigger the RESET_N_W signal of the Wifi module */
|
||||
lbee1usjyc_reset_n_w: lbee1usjyc_reset_n_w {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "regulator-lbee1usjyc-reset-n-w";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* gpio_139 - RESET_N_W */
|
||||
enable-active-high;
|
||||
mmc2_pwrseq: mmc2_pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>, /* gpio_139 - RESET_N_W */
|
||||
<&gpio5 10 GPIO_ACTIVE_LOW>; /* gpio_138 - WIFI_PDN */
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -62,8 +54,8 @@
|
|||
&mmc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins &lbee1usjyc_pins>;
|
||||
vmmc-supply = <&lbee1usjyc_pdn>;
|
||||
vmmc_aux-supply = <&lbee1usjyc_reset_n_w>;
|
||||
vmmc-supply = <&vmmcsdio_fixed>;
|
||||
mmc-pwrseq = <&mmc2_pwrseq>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -224,32 +224,32 @@
|
|||
&omap3_pmx_core {
|
||||
gpio_key_pins: pinmux_gpio_key_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xea (PIN_INPUT | MUX_MODE4) /* cam_d2.gpio_101 */
|
||||
0xec (PIN_INPUT | MUX_MODE4) /* cam_d3.gpio_102 */
|
||||
0xee (PIN_INPUT | MUX_MODE4) /* cam_d4.gpio_103 */
|
||||
0xf0 (PIN_INPUT | MUX_MODE4) /* cam_d5.gpio_104 */
|
||||
0xf2 (PIN_INPUT | MUX_MODE4) /* cam_d6.gpio_105 */
|
||||
0xf4 (PIN_INPUT | MUX_MODE4) /* cam_d7.gpio_106 */
|
||||
0xf6 (PIN_INPUT | MUX_MODE4) /* cam_d8.gpio_107 */
|
||||
0xf8 (PIN_INPUT | MUX_MODE4) /* cam_d9.gpio_108 */
|
||||
0xfa (PIN_INPUT | MUX_MODE4) /* cam_d10.gpio_109 */
|
||||
OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT | MUX_MODE4) /* cam_d2.gpio_101 */
|
||||
OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE4) /* cam_d3.gpio_102 */
|
||||
OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE4) /* cam_d4.gpio_103 */
|
||||
OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE4) /* cam_d5.gpio_104 */
|
||||
OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE4) /* cam_d6.gpio_105 */
|
||||
OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE4) /* cam_d7.gpio_106 */
|
||||
OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE4) /* cam_d8.gpio_107 */
|
||||
OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE4) /* cam_d9.gpio_108 */
|
||||
OMAP3_CORE1_IOPAD(0x212a, PIN_INPUT | MUX_MODE4) /* cam_d10.gpio_109 */
|
||||
>;
|
||||
};
|
||||
|
||||
musb_pins: pinmux_musb_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x172 (PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
|
||||
0x17a (PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
|
||||
0x17c (PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
|
||||
0x17e (PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
|
||||
0x180 (PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
|
||||
0x182 (PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
|
||||
0x184 (PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
|
||||
0x186 (PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
|
||||
0x188 (PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
|
||||
0x176 (PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
|
||||
0x178 (PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
|
||||
0x174 (PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
|
||||
OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
|
||||
OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
|
||||
OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
|
||||
OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
|
||||
OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
|
||||
OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
|
||||
OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
|
||||
OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
|
||||
OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
|
||||
OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
|
||||
OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
|
||||
OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -149,15 +149,15 @@
|
|||
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx */
|
||||
0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
|
||||
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */
|
||||
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx */
|
||||
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx */
|
||||
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx */
|
||||
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
@ -198,22 +198,22 @@
|
|||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl */
|
||||
0x18c (PIN_INPUT | MUX_MODE0) /* i2c1_sda */
|
||||
OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl */
|
||||
OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x18e (PIN_INPUT | MUX_MODE0) /* i2c2_scl */
|
||||
0x190 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */
|
||||
OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
|
||||
OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x192 (PIN_INPUT | MUX_MODE0) /* i2c3_scl */
|
||||
0x194 (PIN_INPUT | MUX_MODE0) /* i2c3_sda */
|
||||
OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */
|
||||
OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
@ -225,85 +225,85 @@
|
|||
|
||||
mcspi4_pins: pinmux_mcspi4_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x15c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
|
||||
0x162 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
|
||||
0x160 (PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
|
||||
0x166 (PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
|
||||
OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
|
||||
OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
|
||||
OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
|
||||
OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
|
||||
0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
|
||||
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0 */
|
||||
0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
|
||||
0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
|
||||
0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
|
||||
OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
|
||||
OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
|
||||
0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
|
||||
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
|
||||
0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
|
||||
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
|
||||
0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
|
||||
0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
|
||||
0x136 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
|
||||
0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
|
||||
0x13a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
|
||||
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
|
||||
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
|
||||
OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
|
||||
OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
|
||||
OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
|
||||
OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
acx565akm_pins: pinmux_acx565akm_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0d4 (PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */
|
||||
OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_sdi_pins: pinmux_dss_sdi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0c0 (PIN_OUTPUT | MUX_MODE1) /* dss_data10.sdi_dat1n */
|
||||
0x0c2 (PIN_OUTPUT | MUX_MODE1) /* dss_data11.sdi_dat1p */
|
||||
0x0c4 (PIN_OUTPUT | MUX_MODE1) /* dss_data12.sdi_dat2n */
|
||||
0x0c6 (PIN_OUTPUT | MUX_MODE1) /* dss_data13.sdi_dat2p */
|
||||
OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1) /* dss_data10.sdi_dat1n */
|
||||
OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1) /* dss_data11.sdi_dat1p */
|
||||
OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1) /* dss_data12.sdi_dat2n */
|
||||
OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1) /* dss_data13.sdi_dat2p */
|
||||
|
||||
0x0d8 (PIN_OUTPUT | MUX_MODE1) /* dss_data22.sdi_clkp */
|
||||
0x0da (PIN_OUTPUT | MUX_MODE1) /* dss_data23.sdi_clkn */
|
||||
OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1) /* dss_data22.sdi_clkp */
|
||||
OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1) /* dss_data23.sdi_clkn */
|
||||
>;
|
||||
};
|
||||
|
||||
wl1251_pins: pinmux_wl1251 {
|
||||
pinctrl-single,pins = <
|
||||
0x0ce (PIN_OUTPUT | MUX_MODE4) /* gpio 87 => wl1251 enable */
|
||||
0x05a (PIN_INPUT | MUX_MODE4) /* gpio 42 => wl1251 irq */
|
||||
OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4) /* gpio 87 => wl1251 enable */
|
||||
OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4) /* gpio 42 => wl1251 irq */
|
||||
>;
|
||||
};
|
||||
|
||||
ssi_pins: pinmux_ssi {
|
||||
pinctrl-single,pins = <
|
||||
0x150 (PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
|
||||
0x14e (PIN_OUTPUT | MUX_MODE1) /* ssi1_flag_tx */
|
||||
0x152 (PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* ssi1_wake_tx (cawake) */
|
||||
0x14c (PIN_OUTPUT | MUX_MODE1) /* ssi1_dat_tx */
|
||||
0x154 (PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */
|
||||
0x156 (PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */
|
||||
0x158 (PIN_OUTPUT | MUX_MODE1) /* ssi1_rdy_rx */
|
||||
0x15a (PIN_OUTPUT | MUX_MODE1) /* ssi1_wake */
|
||||
OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
|
||||
OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1) /* ssi1_flag_tx */
|
||||
OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* ssi1_wake_tx (cawake) */
|
||||
OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1) /* ssi1_dat_tx */
|
||||
OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */
|
||||
OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */
|
||||
OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1) /* ssi1_rdy_rx */
|
||||
OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1) /* ssi1_wake */
|
||||
>;
|
||||
};
|
||||
|
||||
modem_pins: pinmux_modem {
|
||||
pinctrl-single,pins = <
|
||||
0x0ac (PIN_OUTPUT | MUX_MODE4) /* gpio 70 => cmt_apeslpx */
|
||||
0x0b0 (PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* gpio 72 => ape_rst_rq */
|
||||
0x0b2 (PIN_OUTPUT | MUX_MODE4) /* gpio 73 => cmt_rst_rq */
|
||||
0x0b4 (PIN_OUTPUT | MUX_MODE4) /* gpio 74 => cmt_en */
|
||||
0x0b6 (PIN_OUTPUT | MUX_MODE4) /* gpio 75 => cmt_rst */
|
||||
0x15e (PIN_OUTPUT | MUX_MODE4) /* gpio 157 => cmt_bsi */
|
||||
OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4) /* gpio 70 => cmt_apeslpx */
|
||||
OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* gpio 72 => ape_rst_rq */
|
||||
OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4) /* gpio 73 => cmt_rst_rq */
|
||||
OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4) /* gpio 74 => cmt_en */
|
||||
OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4) /* gpio 75 => cmt_rst */
|
||||
OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* gpio 157 => cmt_bsi */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -36,12 +36,12 @@
|
|||
&omap3_pmx_core {
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
|
||||
0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
|
||||
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
|
||||
0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
|
||||
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
|
||||
0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
|
||||
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
|
||||
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -54,27 +54,27 @@
|
|||
/* REVISIT: twl gpio0 is mmc0_cd */
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
|
||||
0x116 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
|
||||
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
|
||||
0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
|
||||
0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
|
||||
0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
|
||||
OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
|
||||
OMAP3_CORE1_IOPAD(0x2146, PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
|
||||
0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
|
||||
0x12c (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
|
||||
0x12e (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
|
||||
0x130 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
|
||||
0x132 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
|
||||
0x134 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat4.sdmmc2_dat4 */
|
||||
0x136 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat5.sdmmc2_dat5 */
|
||||
0x138 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat6.sdmmc2_dat6 */
|
||||
0x13a (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat7.sdmmc2_dat7 */
|
||||
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
|
||||
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
|
||||
OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat4.sdmmc2_dat4 */
|
||||
OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat5.sdmmc2_dat5 */
|
||||
OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat6.sdmmc2_dat6 */
|
||||
OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat7.sdmmc2_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
@ -87,35 +87,35 @@
|
|||
|
||||
uart1_pins: pinmux_uart1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x150 (PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
|
||||
0x14e (PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
|
||||
0x152 (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
|
||||
0x14c (PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
|
||||
OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
|
||||
OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
|
||||
OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
|
||||
OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x144 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
|
||||
0x146 (PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
|
||||
0x14a (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
|
||||
0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
|
||||
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
|
||||
OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
|
||||
OMAP3_CORE1_IOPAD(0x217a, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
|
||||
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x16a (PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
|
||||
0x16c (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
|
||||
0x16e (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
|
||||
OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
|
||||
OMAP3_CORE1_IOPAD(0x219e, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
>;
|
||||
};
|
||||
|
||||
/* wl12xx GPIO output for WLAN_EN */
|
||||
wl12xx_gpio: pinmux_wl12xx_gpio {
|
||||
pinctrl-single,pins = <
|
||||
0xea (PIN_OUTPUT| MUX_MODE4) /* cam_d2.gpio_101 */
|
||||
OMAP3_CORE1_IOPAD(0x211a, PIN_OUTPUT| MUX_MODE4) /* cam_d2.gpio_101 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -135,7 +135,7 @@
|
|||
&omap3_pmx_wkup {
|
||||
wlan_host_wkup: pinmux_wlan_host_wkup_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1a (PIN_INPUT_PULLUP | MUX_MODE4) /* sys_clkout1.gpio_10 WLAN_HOST_WKUP */
|
||||
OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT_PULLUP | MUX_MODE4) /* sys_clkout1.gpio_10 WLAN_HOST_WKUP */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -717,6 +717,8 @@
|
|||
ti,hwmods = "gpmc";
|
||||
reg = <0x6e000000 0x02d0>;
|
||||
interrupts = <20>;
|
||||
dmas = <&sdma 4>;
|
||||
dma-names = "rxtx";
|
||||
gpmc,num-cs = <8>;
|
||||
gpmc,num-waitpins = <4>;
|
||||
#address-cells = <2>;
|
||||
|
|
|
|||
|
|
@ -13,8 +13,8 @@
|
|||
/* Pandaboard Rev A4+ have external pullups on SCL & SDA */
|
||||
&dss_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
|
||||
0x5c (PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */
|
||||
0x5e (PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */
|
||||
OMAP4_IOPAD(0x09a, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
|
||||
OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */
|
||||
OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */
|
||||
>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -199,129 +199,129 @@
|
|||
|
||||
twl6040_pins: pinmux_twl6040_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */
|
||||
0x160 (PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
|
||||
OMAP4_IOPAD(0x120, PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */
|
||||
OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcpdm_pins: pinmux_mcpdm_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xc6 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_ul_data.abe_pdm_ul_data */
|
||||
0xc8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_dl_data.abe_pdm_dl_data */
|
||||
0xca (PIN_INPUT_PULLUP | MUX_MODE0) /* abe_pdm_frame.abe_pdm_frame */
|
||||
0xcc (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_lb_clk.abe_pdm_lb_clk */
|
||||
0xce (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
|
||||
OMAP4_IOPAD(0x106, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_ul_data.abe_pdm_ul_data */
|
||||
OMAP4_IOPAD(0x108, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_dl_data.abe_pdm_dl_data */
|
||||
OMAP4_IOPAD(0x10a, PIN_INPUT_PULLUP | MUX_MODE0) /* abe_pdm_frame.abe_pdm_frame */
|
||||
OMAP4_IOPAD(0x10c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_lb_clk.abe_pdm_lb_clk */
|
||||
OMAP4_IOPAD(0x10e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp1_pins: pinmux_mcbsp1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xbe (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
|
||||
0xc0 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
|
||||
0xc2 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */
|
||||
0xc4 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
|
||||
OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
|
||||
OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
|
||||
OMAP4_IOPAD(0x102, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */
|
||||
OMAP4_IOPAD(0x104, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_dpi_pins: pinmux_dss_dpi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x122 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data23 */
|
||||
0x124 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data22 */
|
||||
0x126 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data21 */
|
||||
0x128 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data20 */
|
||||
0x12a (PIN_OUTPUT | MUX_MODE5) /* dispc2_data19 */
|
||||
0x12c (PIN_OUTPUT | MUX_MODE5) /* dispc2_data18 */
|
||||
0x12e (PIN_OUTPUT | MUX_MODE5) /* dispc2_data15 */
|
||||
0x130 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data14 */
|
||||
0x132 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data13 */
|
||||
0x134 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data12 */
|
||||
0x136 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data11 */
|
||||
OMAP4_IOPAD(0x162, PIN_OUTPUT | MUX_MODE5) /* dispc2_data23 */
|
||||
OMAP4_IOPAD(0x164, PIN_OUTPUT | MUX_MODE5) /* dispc2_data22 */
|
||||
OMAP4_IOPAD(0x166, PIN_OUTPUT | MUX_MODE5) /* dispc2_data21 */
|
||||
OMAP4_IOPAD(0x168, PIN_OUTPUT | MUX_MODE5) /* dispc2_data20 */
|
||||
OMAP4_IOPAD(0x16a, PIN_OUTPUT | MUX_MODE5) /* dispc2_data19 */
|
||||
OMAP4_IOPAD(0x16c, PIN_OUTPUT | MUX_MODE5) /* dispc2_data18 */
|
||||
OMAP4_IOPAD(0x16e, PIN_OUTPUT | MUX_MODE5) /* dispc2_data15 */
|
||||
OMAP4_IOPAD(0x170, PIN_OUTPUT | MUX_MODE5) /* dispc2_data14 */
|
||||
OMAP4_IOPAD(0x172, PIN_OUTPUT | MUX_MODE5) /* dispc2_data13 */
|
||||
OMAP4_IOPAD(0x174, PIN_OUTPUT | MUX_MODE5) /* dispc2_data12 */
|
||||
OMAP4_IOPAD(0x176, PIN_OUTPUT | MUX_MODE5) /* dispc2_data11 */
|
||||
|
||||
0x174 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data10 */
|
||||
0x176 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data9 */
|
||||
0x178 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data16 */
|
||||
0x17a (PIN_OUTPUT | MUX_MODE5) /* dispc2_data17 */
|
||||
0x17c (PIN_OUTPUT | MUX_MODE5) /* dispc2_hsync */
|
||||
0x17e (PIN_OUTPUT | MUX_MODE5) /* dispc2_pclk */
|
||||
0x180 (PIN_OUTPUT | MUX_MODE5) /* dispc2_vsync */
|
||||
0x182 (PIN_OUTPUT | MUX_MODE5) /* dispc2_de */
|
||||
0x184 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data8 */
|
||||
0x186 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data7 */
|
||||
0x188 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data6 */
|
||||
0x18a (PIN_OUTPUT | MUX_MODE5) /* dispc2_data5 */
|
||||
0x18c (PIN_OUTPUT | MUX_MODE5) /* dispc2_data4 */
|
||||
0x18e (PIN_OUTPUT | MUX_MODE5) /* dispc2_data3 */
|
||||
OMAP4_IOPAD(0x1b4, PIN_OUTPUT | MUX_MODE5) /* dispc2_data10 */
|
||||
OMAP4_IOPAD(0x1b6, PIN_OUTPUT | MUX_MODE5) /* dispc2_data9 */
|
||||
OMAP4_IOPAD(0x1b8, PIN_OUTPUT | MUX_MODE5) /* dispc2_data16 */
|
||||
OMAP4_IOPAD(0x1ba, PIN_OUTPUT | MUX_MODE5) /* dispc2_data17 */
|
||||
OMAP4_IOPAD(0x1bc, PIN_OUTPUT | MUX_MODE5) /* dispc2_hsync */
|
||||
OMAP4_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE5) /* dispc2_pclk */
|
||||
OMAP4_IOPAD(0x1c0, PIN_OUTPUT | MUX_MODE5) /* dispc2_vsync */
|
||||
OMAP4_IOPAD(0x1c2, PIN_OUTPUT | MUX_MODE5) /* dispc2_de */
|
||||
OMAP4_IOPAD(0x1c4, PIN_OUTPUT | MUX_MODE5) /* dispc2_data8 */
|
||||
OMAP4_IOPAD(0x1c6, PIN_OUTPUT | MUX_MODE5) /* dispc2_data7 */
|
||||
OMAP4_IOPAD(0x1c8, PIN_OUTPUT | MUX_MODE5) /* dispc2_data6 */
|
||||
OMAP4_IOPAD(0x1ca, PIN_OUTPUT | MUX_MODE5) /* dispc2_data5 */
|
||||
OMAP4_IOPAD(0x1cc, PIN_OUTPUT | MUX_MODE5) /* dispc2_data4 */
|
||||
OMAP4_IOPAD(0x1ce, PIN_OUTPUT | MUX_MODE5) /* dispc2_data3 */
|
||||
|
||||
0x190 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data2 */
|
||||
0x192 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data1 */
|
||||
0x194 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data0 */
|
||||
OMAP4_IOPAD(0x1d0, PIN_OUTPUT | MUX_MODE5) /* dispc2_data2 */
|
||||
OMAP4_IOPAD(0x1d2, PIN_OUTPUT | MUX_MODE5) /* dispc2_data1 */
|
||||
OMAP4_IOPAD(0x1d4, PIN_OUTPUT | MUX_MODE5) /* dispc2_data0 */
|
||||
>;
|
||||
};
|
||||
|
||||
tfp410_pins: pinmux_tfp410_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x144 (PIN_OUTPUT | MUX_MODE3) /* gpio_0 */
|
||||
OMAP4_IOPAD(0x184, PIN_OUTPUT | MUX_MODE3) /* gpio_0 */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_hdmi_pins: pinmux_dss_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
|
||||
0x5c (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */
|
||||
0x5e (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */
|
||||
OMAP4_IOPAD(0x09a, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
|
||||
OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */
|
||||
OMAP4_IOPAD(0x09e, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
tpd12s015_pins: pinmux_tpd12s015_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x22 (PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */
|
||||
0x48 (PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */
|
||||
0x58 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */
|
||||
OMAP4_IOPAD(0x062, PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */
|
||||
OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */
|
||||
OMAP4_IOPAD(0x098, PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */
|
||||
>;
|
||||
};
|
||||
|
||||
hsusbb1_pins: pinmux_hsusbb1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x82 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */
|
||||
0x84 (PIN_OUTPUT | MUX_MODE4) /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */
|
||||
0x86 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dir.usbb1_ulpiphy_dir */
|
||||
0x88 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_nxt.usbb1_ulpiphy_nxt */
|
||||
0x8a (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat0.usbb1_ulpiphy_dat0 */
|
||||
0x8c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat1.usbb1_ulpiphy_dat1 */
|
||||
0x8e (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat2.usbb1_ulpiphy_dat2 */
|
||||
0x90 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat3.usbb1_ulpiphy_dat3 */
|
||||
0x92 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat4.usbb1_ulpiphy_dat4 */
|
||||
0x94 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat5.usbb1_ulpiphy_dat5 */
|
||||
0x96 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat6.usbb1_ulpiphy_dat6 */
|
||||
0x98 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat7.usbb1_ulpiphy_dat7 */
|
||||
OMAP4_IOPAD(0x0c2, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */
|
||||
OMAP4_IOPAD(0x0c4, PIN_OUTPUT | MUX_MODE4) /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */
|
||||
OMAP4_IOPAD(0x0c6, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dir.usbb1_ulpiphy_dir */
|
||||
OMAP4_IOPAD(0x0c8, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_nxt.usbb1_ulpiphy_nxt */
|
||||
OMAP4_IOPAD(0x0ca, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat0.usbb1_ulpiphy_dat0 */
|
||||
OMAP4_IOPAD(0x0cc, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat1.usbb1_ulpiphy_dat1 */
|
||||
OMAP4_IOPAD(0x0ce, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat2.usbb1_ulpiphy_dat2 */
|
||||
OMAP4_IOPAD(0x0d0, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat3.usbb1_ulpiphy_dat3 */
|
||||
OMAP4_IOPAD(0x0d2, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat4.usbb1_ulpiphy_dat4 */
|
||||
OMAP4_IOPAD(0x0d4, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat5.usbb1_ulpiphy_dat5 */
|
||||
OMAP4_IOPAD(0x0d6, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat6.usbb1_ulpiphy_dat6 */
|
||||
OMAP4_IOPAD(0x0d8, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat7.usbb1_ulpiphy_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xe2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
|
||||
0xe4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
|
||||
OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
|
||||
OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xe6 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
|
||||
0xe8 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
|
||||
OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
|
||||
OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xea (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
|
||||
0xec (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
|
||||
OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
|
||||
OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c4_pins: pinmux_i2c4_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xee (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
|
||||
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
|
||||
OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
|
||||
OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
@ -331,24 +331,24 @@
|
|||
*/
|
||||
wl12xx_gpio: pinmux_wl12xx_gpio {
|
||||
pinctrl-single,pins = <
|
||||
0x26 (PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 */
|
||||
0x2c (PIN_OUTPUT | MUX_MODE3) /* gpmc_a22.gpio_46 */
|
||||
0x30 (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a24.gpio_48 */
|
||||
0x32 (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a25.gpio_49 */
|
||||
OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 */
|
||||
OMAP4_IOPAD(0x06c, PIN_OUTPUT | MUX_MODE3) /* gpmc_a22.gpio_46 */
|
||||
OMAP4_IOPAD(0x070, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a24.gpio_48 */
|
||||
OMAP4_IOPAD(0x072, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a25.gpio_49 */
|
||||
>;
|
||||
};
|
||||
|
||||
/* wl12xx GPIO inputs and SDIO pins */
|
||||
wl12xx_pins: pinmux_wl12xx_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x38 (PIN_INPUT | MUX_MODE3) /* gpmc_ncs2.gpio_52 */
|
||||
0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
|
||||
0x108 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
|
||||
0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
|
||||
0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
|
||||
0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
|
||||
0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */
|
||||
0x112 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
|
||||
OMAP4_IOPAD(0x078, PIN_INPUT | MUX_MODE3) /* gpmc_ncs2.gpio_52 */
|
||||
OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
|
||||
OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
|
||||
OMAP4_IOPAD(0x14a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
|
||||
OMAP4_IOPAD(0x14c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
|
||||
OMAP4_IOPAD(0x14e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
|
||||
OMAP4_IOPAD(0x150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */
|
||||
OMAP4_IOPAD(0x152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -356,8 +356,8 @@
|
|||
&omap4_pmx_wkup {
|
||||
led_wkgpio_pins: pinmux_leds_wkpins {
|
||||
pinctrl-single,pins = <
|
||||
0x1a (PIN_OUTPUT | MUX_MODE3) /* gpio_wk7 */
|
||||
0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
|
||||
OMAP4_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE3) /* gpio_wk7 */
|
||||
OMAP4_IOPAD(0x05c, PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -34,23 +34,23 @@
|
|||
/* PandaboardES has external pullups on SCL & SDA */
|
||||
&dss_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
|
||||
0x5c (PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */
|
||||
0x5e (PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */
|
||||
OMAP4_IOPAD(0x09a, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
|
||||
OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */
|
||||
OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
&omap4_pmx_core {
|
||||
led_gpio_pins: gpio_led_pmx {
|
||||
pinctrl-single,pins = <
|
||||
0xb6 (PIN_OUTPUT | MUX_MODE3) /* gpio_110 */
|
||||
OMAP4_IOPAD(0x0f6, PIN_OUTPUT | MUX_MODE3) /* gpio_110 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&led_wkgpio_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
|
||||
OMAP4_IOPAD(0x05c, PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -10,8 +10,8 @@
|
|||
/* SDP boards with 4430 ES2.3+ or 4460 have external pullups on SCL & SDA */
|
||||
&dss_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
|
||||
0x5c (PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */
|
||||
0x5e (PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */
|
||||
OMAP4_IOPAD(0x09a, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
|
||||
OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */
|
||||
OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */
|
||||
>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -212,143 +212,143 @@
|
|||
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xd8 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
|
||||
0xda (PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
|
||||
0xdc (PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_rx.uart2_rx */
|
||||
0xde (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
|
||||
OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
|
||||
OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
|
||||
OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_rx.uart2_rx */
|
||||
OMAP4_IOPAD(0x11e, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
|
||||
0x102 (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
|
||||
0x104 (PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
0x106 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
OMAP4_IOPAD(0x140, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
|
||||
OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
|
||||
OMAP4_IOPAD(0x144, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
OMAP4_IOPAD(0x146, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
>;
|
||||
};
|
||||
|
||||
uart4_pins: pinmux_uart4_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x11c (PIN_INPUT | MUX_MODE0) /* uart4_rx.uart4_rx */
|
||||
0x11e (PIN_OUTPUT | MUX_MODE0) /* uart4_tx.uart4_tx */
|
||||
OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0) /* uart4_rx.uart4_rx */
|
||||
OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0) /* uart4_tx.uart4_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
twl6040_pins: pinmux_twl6040_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */
|
||||
0x160 (PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
|
||||
OMAP4_IOPAD(0x120, PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */
|
||||
OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcpdm_pins: pinmux_mcpdm_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xc6 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_ul_data.abe_pdm_ul_data */
|
||||
0xc8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_dl_data.abe_pdm_dl_data */
|
||||
0xca (PIN_INPUT_PULLUP | MUX_MODE0) /* abe_pdm_frame.abe_pdm_frame */
|
||||
0xcc (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_lb_clk.abe_pdm_lb_clk */
|
||||
0xce (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
|
||||
OMAP4_IOPAD(0x106, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_ul_data.abe_pdm_ul_data */
|
||||
OMAP4_IOPAD(0x108, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_dl_data.abe_pdm_dl_data */
|
||||
OMAP4_IOPAD(0x10a, PIN_INPUT_PULLUP | MUX_MODE0) /* abe_pdm_frame.abe_pdm_frame */
|
||||
OMAP4_IOPAD(0x10c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_lb_clk.abe_pdm_lb_clk */
|
||||
OMAP4_IOPAD(0x10e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
|
||||
>;
|
||||
};
|
||||
|
||||
dmic_pins: pinmux_dmic_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xd0 (PIN_OUTPUT | MUX_MODE0) /* abe_dmic_clk1.abe_dmic_clk1 */
|
||||
0xd2 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din1.abe_dmic_din1 */
|
||||
0xd4 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din2.abe_dmic_din2 */
|
||||
0xd6 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din3.abe_dmic_din3 */
|
||||
OMAP4_IOPAD(0x110, PIN_OUTPUT | MUX_MODE0) /* abe_dmic_clk1.abe_dmic_clk1 */
|
||||
OMAP4_IOPAD(0x112, PIN_INPUT | MUX_MODE0) /* abe_dmic_din1.abe_dmic_din1 */
|
||||
OMAP4_IOPAD(0x114, PIN_INPUT | MUX_MODE0) /* abe_dmic_din2.abe_dmic_din2 */
|
||||
OMAP4_IOPAD(0x116, PIN_INPUT | MUX_MODE0) /* abe_dmic_din3.abe_dmic_din3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp1_pins: pinmux_mcbsp1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xbe (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
|
||||
0xc0 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
|
||||
0xc2 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */
|
||||
0xc4 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
|
||||
OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
|
||||
OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
|
||||
OMAP4_IOPAD(0x102, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */
|
||||
OMAP4_IOPAD(0x104, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp2_pins: pinmux_mcbsp2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xb6 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx.abe_mcbsp2_clkx */
|
||||
0xb8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dr.abe_mcbsp2_dr */
|
||||
0xba (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dx.abe_mcbsp2_dx */
|
||||
0xbc (PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx.abe_mcbsp2_fsx */
|
||||
OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx.abe_mcbsp2_clkx */
|
||||
OMAP4_IOPAD(0x0f8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dr.abe_mcbsp2_dr */
|
||||
OMAP4_IOPAD(0x0fa, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dx.abe_mcbsp2_dx */
|
||||
OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx.abe_mcbsp2_fsx */
|
||||
>;
|
||||
};
|
||||
|
||||
mcspi1_pins: pinmux_mcspi1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xf2 (PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
|
||||
0xf4 (PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
|
||||
0xf6 (PIN_INPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
|
||||
0xf8 (PIN_INPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
|
||||
OMAP4_IOPAD(0x132, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
|
||||
OMAP4_IOPAD(0x134, PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
|
||||
OMAP4_IOPAD(0x136, PIN_INPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
|
||||
OMAP4_IOPAD(0x138, PIN_INPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_hdmi_pins: pinmux_dss_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
|
||||
0x5c (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */
|
||||
0x5e (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */
|
||||
OMAP4_IOPAD(0x09a, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
|
||||
OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */
|
||||
OMAP4_IOPAD(0x09e, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
tpd12s015_pins: pinmux_tpd12s015_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x22 (PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */
|
||||
0x48 (PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */
|
||||
0x58 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */
|
||||
OMAP4_IOPAD(0x062, PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */
|
||||
OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */
|
||||
OMAP4_IOPAD(0x098, PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xe2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
|
||||
0xe4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
|
||||
OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
|
||||
OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xe6 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
|
||||
0xe8 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
|
||||
OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
|
||||
OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xea (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
|
||||
0xec (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
|
||||
OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
|
||||
OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c4_pins: pinmux_i2c4_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xee (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
|
||||
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
|
||||
OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
|
||||
OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
/* wl12xx GPIO output for WLAN_EN */
|
||||
wl12xx_gpio: pinmux_wl12xx_gpio {
|
||||
pinctrl-single,pins = <
|
||||
0x3c (PIN_OUTPUT | MUX_MODE3) /* gpmc_nwp.gpio_54 */
|
||||
OMAP4_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE3) /* gpmc_nwp.gpio_54 */
|
||||
>;
|
||||
};
|
||||
|
||||
/* wl12xx GPIO inputs and SDIO pins */
|
||||
wl12xx_pins: pinmux_wl12xx_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
|
||||
0x108 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
|
||||
0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
|
||||
0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
|
||||
0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
|
||||
0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */
|
||||
0x112 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
|
||||
OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
|
||||
OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
|
||||
OMAP4_IOPAD(0x14a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
|
||||
OMAP4_IOPAD(0x14c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
|
||||
OMAP4_IOPAD(0x14e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
|
||||
OMAP4_IOPAD(0x150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */
|
||||
OMAP4_IOPAD(0x152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -348,12 +348,22 @@
|
|||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
elm: elm@48078000 {
|
||||
compatible = "ti,am3352-elm";
|
||||
reg = <0x48078000 0x2000>;
|
||||
interrupts = <4>;
|
||||
ti,hwmods = "elm";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpmc: gpmc@50000000 {
|
||||
compatible = "ti,omap4430-gpmc";
|
||||
reg = <0x50000000 0x1000>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&sdma 4>;
|
||||
dma-names = "rxtx";
|
||||
gpmc,num-cs = <8>;
|
||||
gpmc,num-waitpins = <4>;
|
||||
ti,hwmods = "gpmc";
|
||||
|
|
|
|||
|
|
@ -139,60 +139,60 @@
|
|||
|
||||
twl6040_pins: pinmux_twl6040_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x17e (PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */
|
||||
OMAP5_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcpdm_pins: pinmux_mcpdm_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x142 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
|
||||
0x15c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_ul_data.abemcpdm_ul_data */
|
||||
0x15e (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_dl_data.abemcpdm_dl_data */
|
||||
0x160 (PIN_INPUT_PULLUP | MUX_MODE0) /* abemcpdm_frame.abemcpdm_frame */
|
||||
0x162 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_lb_clk.abemcpdm_lb_clk */
|
||||
OMAP5_IOPAD(0x182, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
|
||||
OMAP5_IOPAD(0x19c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_ul_data.abemcpdm_ul_data */
|
||||
OMAP5_IOPAD(0x19e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_dl_data.abemcpdm_dl_data */
|
||||
OMAP5_IOPAD(0x1a0, PIN_INPUT_PULLUP | MUX_MODE0) /* abemcpdm_frame.abemcpdm_frame */
|
||||
OMAP5_IOPAD(0x1a2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_lb_clk.abemcpdm_lb_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp1_pins: pinmux_mcbsp1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */
|
||||
0x14e (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* abedmic_clk3.abemcbsp1_dx */
|
||||
0x150 (PIN_INPUT | MUX_MODE1) /* abeslimbus1_clock.abemcbsp1_clkx */
|
||||
0x152 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* abeslimbus1_data.abemcbsp1_dr */
|
||||
OMAP5_IOPAD(0x18c, PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */
|
||||
OMAP5_IOPAD(0x18e, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* abedmic_clk3.abemcbsp1_dx */
|
||||
OMAP5_IOPAD(0x190, PIN_INPUT | MUX_MODE1) /* abeslimbus1_clock.abemcbsp1_clkx */
|
||||
OMAP5_IOPAD(0x192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* abeslimbus1_data.abemcbsp1_dr */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp2_pins: pinmux_mcbsp2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dr.abemcbsp2_dr */
|
||||
0x156 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dx.abemcbsp2_dx */
|
||||
0x158 (PIN_INPUT | MUX_MODE0) /* abemcbsp2_fsx.abemcbsp2_fsx */
|
||||
0x15a (PIN_INPUT | MUX_MODE0) /* abemcbsp2_clkx.abemcbsp2_clkx */
|
||||
OMAP5_IOPAD(0x194, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dr.abemcbsp2_dr */
|
||||
OMAP5_IOPAD(0x196, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dx.abemcbsp2_dx */
|
||||
OMAP5_IOPAD(0x198, PIN_INPUT | MUX_MODE0) /* abemcbsp2_fsx.abemcbsp2_fsx */
|
||||
OMAP5_IOPAD(0x19a, PIN_INPUT | MUX_MODE0) /* abemcbsp2_clkx.abemcbsp2_clkx */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1b2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
|
||||
0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
|
||||
OMAP5_IOPAD(0x1f2, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
|
||||
OMAP5_IOPAD(0x1f4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
mcspi2_pins: pinmux_mcspi2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */
|
||||
0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */
|
||||
0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */
|
||||
0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0 */
|
||||
OMAP5_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0) /* mcspi2_clk */
|
||||
OMAP5_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0) /* mcspi2_simo */
|
||||
OMAP5_IOPAD(0x100, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */
|
||||
OMAP5_IOPAD(0x102, PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcspi3_pins: pinmux_mcspi3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x78 (PIN_INPUT | MUX_MODE1) /* mcspi3_somi */
|
||||
0x7a (PIN_INPUT | MUX_MODE1) /* mcspi3_cs0 */
|
||||
0x7c (PIN_INPUT | MUX_MODE1) /* mcspi3_simo */
|
||||
0x7e (PIN_INPUT | MUX_MODE1) /* mcspi3_clk */
|
||||
OMAP5_IOPAD(0x0b8, PIN_INPUT | MUX_MODE1) /* mcspi3_somi */
|
||||
OMAP5_IOPAD(0x0ba, PIN_INPUT | MUX_MODE1) /* mcspi3_cs0 */
|
||||
OMAP5_IOPAD(0x0bc, PIN_INPUT | MUX_MODE1) /* mcspi3_simo */
|
||||
OMAP5_IOPAD(0x0be, PIN_INPUT | MUX_MODE1) /* mcspi3_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
@ -215,59 +215,59 @@
|
|||
|
||||
usbhost_pins: pinmux_usbhost_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
|
||||
0x86 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */
|
||||
OMAP5_IOPAD(0x0c4, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
|
||||
OMAP5_IOPAD(0x0c6, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */
|
||||
|
||||
0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
|
||||
0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */
|
||||
OMAP5_IOPAD(0x1de, PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
|
||||
OMAP5_IOPAD(0x1e0, PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */
|
||||
|
||||
0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
|
||||
0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
|
||||
OMAP5_IOPAD(0x0b0, PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
|
||||
OMAP5_IOPAD(0x0ae, PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
|
||||
>;
|
||||
};
|
||||
|
||||
led_gpio_pins: pinmux_led_gpio_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x196 (PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */
|
||||
OMAP5_IOPAD(0x1d6, PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins: pinmux_uart1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x60 (PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */
|
||||
0x62 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */
|
||||
0x64 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */
|
||||
0x66 (PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */
|
||||
OMAP5_IOPAD(0x0a0, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */
|
||||
OMAP5_IOPAD(0x0a2, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */
|
||||
OMAP5_IOPAD(0x0a4, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */
|
||||
OMAP5_IOPAD(0x0a6, PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x19a (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */
|
||||
0x19c (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */
|
||||
OMAP5_IOPAD(0x1da, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */
|
||||
OMAP5_IOPAD(0x1dc, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */
|
||||
>;
|
||||
};
|
||||
|
||||
uart5_pins: pinmux_uart5_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */
|
||||
0x172 (PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */
|
||||
0x174 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */
|
||||
0x176 (PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */
|
||||
OMAP5_IOPAD(0x1b0, PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */
|
||||
OMAP5_IOPAD(0x1b2, PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */
|
||||
OMAP5_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */
|
||||
OMAP5_IOPAD(0x1b6, PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_hdmi_pins: pinmux_dss_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0fc (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
|
||||
0x100 (PIN_INPUT | MUX_MODE0) /* hdmi_ddc_scl.hdmi_ddc_scl */
|
||||
0x102 (PIN_INPUT | MUX_MODE0) /* hdmi_ddc_sda.hdmi_ddc_sda */
|
||||
OMAP5_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
|
||||
OMAP5_IOPAD(0x140, PIN_INPUT | MUX_MODE0) /* hdmi_ddc_scl.hdmi_ddc_scl */
|
||||
OMAP5_IOPAD(0x142, PIN_INPUT | MUX_MODE0) /* hdmi_ddc_sda.hdmi_ddc_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
tpd12s015_pins: pinmux_tpd12s015_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0fe (PIN_INPUT_PULLDOWN | MUX_MODE6) /* hdmi_hpd.gpio7_193 */
|
||||
OMAP5_IOPAD(0x13e, PIN_INPUT_PULLDOWN | MUX_MODE6) /* hdmi_hpd.gpio7_193 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -280,13 +280,13 @@
|
|||
|
||||
usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
|
||||
OMAP5_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
|
||||
>;
|
||||
};
|
||||
|
||||
wlcore_irq_pin: pinmux_wlcore_irq_pin {
|
||||
pinctrl-single,pins = <
|
||||
OMAP5_IOPAD(0x040, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE6) /* llia_wakereqin.gpio1_wk14 */
|
||||
OMAP5_IOPAD(0x40, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE6) /* llia_wakereqin.gpio1_wk14 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -175,7 +175,7 @@
|
|||
|
||||
ads7846_pins: pinmux_ads7846_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x02 (PIN_INPUT_PULLDOWN | MUX_MODE6) /* llib_wakereqin.gpio1_wk15 */
|
||||
OMAP5_IOPAD(0x0042, PIN_INPUT_PULLDOWN | MUX_MODE6) /* llib_wakereqin.gpio1_wk15 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -40,8 +40,8 @@
|
|||
&omap5_pmx_core {
|
||||
i2c5_pins: pinmux_i2c5_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */
|
||||
0x188 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */
|
||||
OMAP5_IOPAD(0x1c6, PIN_INPUT | MUX_MODE0) /* i2c5_scl */
|
||||
OMAP5_IOPAD(0x1c8, PIN_INPUT | MUX_MODE0) /* i2c5_sda */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -391,6 +391,8 @@
|
|||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&sdma 4>;
|
||||
dma-names = "rxtx";
|
||||
gpmc,num-cs = <8>;
|
||||
gpmc,num-waitpins = <4>;
|
||||
ti,hwmods = "gpmc";
|
||||
|
|
|
|||
|
|
@ -1,56 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Integrated Power Management Chip
|
||||
* http://www.ti.com/lit/ds/symlink/tps65217.pdf
|
||||
*/
|
||||
|
||||
&tps {
|
||||
compatible = "ti,tps65217";
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dcdc1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-compatible = "dcdc1";
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
regulator-compatible = "dcdc2";
|
||||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
regulator-compatible = "dcdc3";
|
||||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-compatible = "ldo1";
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-compatible = "ldo2";
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-compatible = "ldo3";
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-compatible = "ldo4";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -19,7 +19,7 @@
|
|||
*/
|
||||
twl4030_pins: pinmux_twl4030_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1b0 (PIN_INPUT_PULLUP | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* sys_nirq.sys_nirq */
|
||||
OMAP3_CORE1_IOPAD(0x21e0, PIN_INPUT_PULLUP | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* sys_nirq.sys_nirq */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
&omap4_pmx_wkup {
|
||||
twl6030_wkup_pins: pinmux_twl6030_wkup_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */
|
||||
OMAP4_IOPAD(0x054, PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -32,7 +32,7 @@
|
|||
&omap4_pmx_core {
|
||||
twl6030_pins: pinmux_twl6030_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */
|
||||
OMAP4_IOPAD(0x19e, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -31,5 +31,11 @@
|
|||
#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP)
|
||||
#define PIN_INPUT_PULLDOWN (INPUT_EN)
|
||||
|
||||
/*
|
||||
* Macro to allow using the absolute physical address instead of the
|
||||
* padconf registers instead of the offset from padconf base.
|
||||
*/
|
||||
#define AM4372_IOPAD(pa, val) (((pa) & 0xffff) - 0x0800) (val)
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -67,5 +67,11 @@
|
|||
#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
|
||||
#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)
|
||||
|
||||
/*
|
||||
* Macro to allow using the absolute physical address instead of the
|
||||
* padconf registers instead of the offset from padconf base.
|
||||
*/
|
||||
#define DRA7XX_CORE_IOPAD(pa, val) (((pa) & 0xffff) - 0x3400) (val)
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -63,8 +63,6 @@
|
|||
#define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
|
||||
#define DM816X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
|
||||
#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
|
||||
#define AM4372_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
|
||||
#define DRA7XX_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x3400) (val)
|
||||
|
||||
/*
|
||||
* Macros to allow using the offset from the padconf physical address
|
||||
|
|
|
|||
Loading…
Reference in New Issue