[media] lgdt3305: add support for fixed tp clock mode
Add support for controlling TP clock mode for VSB and QAM annex-B/C mode. Gated clock mode is the default value, and does not support QAM annex-C. The patch enables setting this control to fixed clock mode. Signed-off-by: Michael Ira Krufky <mkrufky@linuxtv.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
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@ -241,6 +241,7 @@ static int lgdt3305_mpeg_mode_polarity(struct lgdt3305_state *state)
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u8 val;
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int ret;
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enum lgdt3305_tp_clock_edge edge = state->cfg->tpclk_edge;
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enum lgdt3305_tp_clock_mode mode = state->cfg->tpclk_mode;
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enum lgdt3305_tp_valid_polarity valid = state->cfg->tpvalid_polarity;
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lg_dbg("edge = %d, valid = %d\n", edge, valid);
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@ -253,6 +254,8 @@ static int lgdt3305_mpeg_mode_polarity(struct lgdt3305_state *state)
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if (edge)
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val |= 0x08;
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if (mode)
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val |= 0x40;
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if (valid)
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val |= 0x01;
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@ -37,6 +37,11 @@ enum lgdt3305_tp_clock_edge {
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LGDT3305_TPCLK_FALLING_EDGE = 1,
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};
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enum lgdt3305_tp_clock_mode {
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LGDT3305_TPCLK_GATED = 0,
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LGDT3305_TPCLK_FIXED = 1,
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};
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enum lgdt3305_tp_valid_polarity {
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LGDT3305_TP_VALID_LOW = 0,
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LGDT3305_TP_VALID_HIGH = 1,
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@ -70,6 +75,7 @@ struct lgdt3305_config {
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enum lgdt3305_mpeg_mode mpeg_mode;
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enum lgdt3305_tp_clock_edge tpclk_edge;
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enum lgdt3305_tp_clock_mode tpclk_mode;
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enum lgdt3305_tp_valid_polarity tpvalid_polarity;
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enum lgdt_demod_chip_type demod_chip;
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};
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